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STMicroelectronics STM32H563AII3Q
- Part No.:
- STM32H563AII3Q
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 169-UFBGA
- Datasheet:
-
STM32H563AII3Q.pdf
- Description:
- IC MCU 32BIT 1MB FLASH 100LQFP
- Quantity:
- Payment:
- Shipping:
Inventory:3,929
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Product details
Overview
STM32H563AII3Q from STMicroelectronics is a high-security, high-performance Arm® Cortex®-M33 32-bit microcontroller with TrustZone®, FPU, and 250 MHz operation delivering 375 DMIPS. It integrates 2 Mbyte flash with ECC, 640 Kbyte SRAM (including ECC-protected SRAM2/SRAM3), CORDIC/FMAC math accelerators, dual FDCAN, USB Type-C®/PD controller, and Ethernet MAC - deployed in industrial gateways requiring secure firmware updates and real-time connectivity.
For engineers reviewing the STM32H563AII3Q datasheet, STM32H563AII3Q pinout, STM32H563AII3Q application, or STM32H563AII3Q equivalent, key selection criteria include TrustZone-enabled peripheral isolation, dual-bank read-while-write flash for OTA updates, 1.71–3.6 V supply range with SMPS support, and UFBGA169 (7 × 7 mm) package compatibility with high-density PCB layouts.
Technical Context
The device implements Armv8-M mainline security with configurable SAU regions and GTZC-managed memory/peripheral partitioning. Its dual GPDMA controllers offload CPU during concurrent high-bandwidth transfers across Octo-SPI, FMC, and Ethernet interfaces.
ART Accelerator includes 8-Kbyte instruction cache and 4-Kbyte data cache to sustain zero-wait-state execution from flash and external memories. The CORDIC coprocessor accelerates trigonometric computations for motor control loops, while FMAC enables real-time FIR/IIR filtering without CPU intervention.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M33 with TrustZone®, FPU, MPU - enables secure, deterministic real-time execution at 250 MHz. |
| Flash Memory | 2 Mbyte embedded flash with ECC and dual-bank RWW - supports seamless firmware upgrades without service interruption. |
| SRAM | 640 Kbyte total: 64 Kbyte SRAM2 (ECC), 320 Kbyte SRAM3 (flexible ECC), 4 Kbyte backup SRAM - retains critical state in Stop/Standby modes. |
| Clocks & Oscillators | Internal 64 MHz HSI + 48 MHz HSI48 + 4 MHz CSI + 32 kHz LSI; external 4–50 MHz HSE + 32.768 kHz LSE - enables precise timing and low-power RTC operation. |
| Security Features | TrustZone-aware peripherals, SFI, HASH/ECDSA/PKA accelerators, NIST SP800-90B TRNG, active tampers - meets IEC 62443-3-3 SL2 requirements. |
| Communication Interfaces | 2× FDCAN, 12× USART/LPUART, 4× I²C, 1× I³C, 6× SPI, 2× SAI, 1× Ethernet MAC, 1× USB FS, 1× UCPD - supports multi-protocol industrial edge node connectivity. |
| Analog Peripherals | 2× 12-bit ADCs (5 Msps), 1× 12-bit dual-channel DAC, digital temperature sensor - enables closed-loop analog sensing and actuation. |
Pinout & Package
STM32H563AII3Q uses a 169-ball UFBGA package (7 × 7 mm, 0.5 mm pitch) with 140 fast I/Os (most 5 V-tolerant) and ten I/Os supporting independent 1.08–3.6 V supply domains. Pin functions are validated per ST's DS14258 Rev 6, Section 4.2.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VDDA, VSS, VSSA | Power supply and ground | Dual-domain power: VDD/VSS for digital logic; VDDA/VSSA for analog subsystem - ensures noise isolation for ADC/DAC operation. |
| NRST | Active-low reset input | Asynchronous reset with internal pull-up; compatible with external reset supervisors and push-button recovery circuits. |
| BOOT0 | Boot mode selection | Configures boot source (system memory, flash, or FMC) at power-on; level sampled during reset sequence. |
| PA13/PA14 | SWD debug interface | Serial Wire Debug (SWDIO/SWCLK) - enables authenticated debug access under TrustZone life cycle control. |
| PC11/PC12 | FDCAN1 TX/RX | Differential CAN FD transceiver interface - supports up to 5 Mbps bit rate with flexible data-length configuration. |
| PD0/PD1 | USART2 TX/RX | Full-duplex asynchronous communication - usable for bootloader UART, diagnostics, or host MCU bridging. |
Key Features
| Feature | Design Value |
|---|---|
| TrustZone Security Architecture | Hardware-enforced separation of secure/non-secure code and data via SAU and GTZC - eliminates software-only privilege escalation risks. |
| Math Acceleration Engine | CORDIC + FMAC co-processors reduce CPU load by >70% in motor control and signal processing workloads - verified in ST AN5297. |
| Flexible Power Management | SMPS regulator with scalable output (0.6–1.4 V) plus LDO option - achieves 45 µA/MHz in Run mode and 2.5 µA in Standby with RTC. |
| Secure Firmware Installation (SFI) | Hardware-verified signature check during flash programming - prevents unauthorized firmware injection even with physical debugger access. |
| Octo-SPI Interface | Supports x8/x4/x1 serial NOR/NAND/PSRAM/HyperRAM with execute-in-place (XIP) - enables cost-effective external memory expansion without bus bottlenecks. |
Applications
| Industrial Gateway | Secure Edge Node |
|---|---|
Use Scenario: Protocol translation between Modbus RTU field devices and cloud MQTT brokers over Ethernet/USB-C. IC Role / Device Role / Timing Role: Main application processor executing Linux-based edge runtime with hardware-accelerated crypto and real-time FDCAN handling. Use Value: Dual-bank flash enables atomic OTA updates; TrustZone isolates secure boot and TLS stack from untrusted application containers. |
Use Scenario: Tamper-resistant sensor aggregator in smart metering systems with battery backup and remote firmware validation. IC Role / Device Role / Timing Role: Secure system controller managing ADC sampling, tamper detection, and ECDSA-signed firmware verification. Use Value: Active tampers + 32-bit backup registers retain cryptographic keys across power loss; TRNG feeds secure key generation. |
| Programmable Logic Controller (PLC) | Medical Data Logger |
Use Scenario: Deterministic I/O scanning and motion control in compact PLC modules with EtherCAT slave capability. IC Role / Device Role / Timing Role: Real-time controller running IEC 61131-3 runtime with sub-100 µs jitter on timer outputs and FDCAN synchronization. Use Value: Low-power timers available in Stop mode maintain precise scheduling; FMAC filters analog sensor inputs before PID computation. |
Use Scenario: Portable ECG/SpO₂ monitor requiring FDA-grade data integrity, battery longevity, and encrypted local storage. IC Role / Device Role / Timing Role: Signal acquisition and secure data packaging unit with dual ADC channels, DAC for calibration, and AES-256 encryption acceleration. Use Value: 12-bit ADCs achieve 70 dB SNR at 5 Msps; backup SRAM preserves patient session data during battery swaps. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-security MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32H753IIK | No TrustZone; Cortex-M7 @ 480 MHz; 2 Mbyte flash but no dual-bank RWW; lacks UCPD and FDCAN. | Suitable for non-security-critical high-throughput DSP tasks, but cannot meet IEC 62443 or PSA Certified Level 2 requirements. | Select when raw compute (CoreMark® 2600+) outweighs hardware security and automotive-grade CAN FD support. |
| NXP i.MX RT1176AVM8B | Cortex-M7 + Cortex-M4 dual-core; 1 Mbyte on-chip RAM; no embedded flash; requires external QSPI boot; no TrustZone on M4 core. | Better for asymmetric multiprocessing (e.g., M7 for UI, M4 for real-time control), but adds BOM cost and layout complexity for external memory. | Select when deterministic dual-core partitioning is required and external flash is acceptable for boot and firmware storage. |
Compared with STM32H563AII3Q, the STM32H753IIK trades security for higher clock speed and lacks modern peripherals like UCPD and FDCAN, while the i.MX RT1176 demands external memory and offers no unified TrustZone enforcement across both cores.
Availability
STM32H563AII3Q is available at Aetrix Electronics and suitable for industrial gateways, secure edge nodes, programmable logic controllers, and medical data loggers requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for STM32H563AII3Q includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power ICs, sensors, and analog components for industrial, automotive, and consumer markets.
The STM32H5 series targets high-assurance embedded systems demanding hardware-enforced security, real-time determinism, and energy efficiency - specifically engineered for industrial IoT, smart infrastructure, and certified medical devices.
FAQ
What is the maximum operating frequency and associated performance metric?
The STM32H563AII3Q operates at up to 250 MHz and delivers 375 DMIPS (Dhrystone 2.1) and 1023 CoreMark® (4.092 CoreMark®/MHz). This performance is sustained across voltage ranges (1.71–3.6 V) and ambient temperatures (–40°C to +125°C) with ART Accelerator enabled for zero-wait-state flash execution.
Does this MCU support secure over-the-air (OTA) firmware updates?
Yes. STM32H563AII3Q supports secure OTA updates via Secure Firmware Installation (SFI), which performs hardware-accelerated ECDSA signature verification before flash programming. Dual-bank flash allows atomic switching between active and updated firmware images without system downtime.
What package type and pin count does STM32H563AII3Q use?
STM32H563AII3Q uses a 169-ball Ultra-Fine Pitch Ball Grid Array (UFBGA169) package measuring 7 × 7 mm with 0.5 mm ball pitch. It provides 140 general-purpose I/Os, including 10 with independent VDDIO supply down to 1.08 V, validated per ST's DS14258 Rev 6, Section 6.7.
How does the TrustZone implementation differ from earlier STM32 families?
This MCU implements Armv8-M mainline TrustZone with eight configurable SAU regions, GTZC-managed peripheral security attribution, and TrustZone-aware DMA/GPDMA controllers. Unlike legacy STM32L5 or H7 variants, it enforces secure/non-secure isolation at the interconnect matrix level and supports authenticated debug with flexible life cycle states (Open/Restricted/Secure).
STM32H563AII3Q Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 169-UFBGA
- Series:
- STM32H5
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-M33
- Core Size:
- 32-Bit
- Speed:
- 250MHz
- Connectivity:
- CANbus, Ethernet, FIFO, I2C, IrDA, LINbus, SCI, SDIO, SMBus, SPI, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, DMA, I2S, PDR, POR, PWM, SHA, TRNG, Voltage Detect, WDT
- Number of I/O:
- 134
- Program Memory Size:
- 2MB (2M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 640K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 3.6V
- Data Converters:
- A/D 20x12b SAR; D/A 2x12b
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32H563AII3Q FAQ
1.How can I place an order for STM32H563AII3Q through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32H563AII3Q on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32H563AII3Q reliable?
The price and inventory of STM32H563AII3Q are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32H563AII3Q is usually 5 days.
3.What payment methods are accepted for STM32H563AII3Q?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32H563AII3Q transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32H563AII3Q?
STM32H563AII3Q orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32H563AII3Q order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32H563AII3Q?
For technical support, including STM32H563AII3Q datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32H563AII3Q requirements.
6.How does Aetrix verify that STM32H563AII3Q is sourced from the original manufacturer or authorized distributors?
All STM32H563AII3Q products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32H563AII3Q meets industry standards.
7.What is the process for return or replacement of STM32H563AII3Q?
All STM32H563AII3Q units undergo pre-shipment inspection (PSI). If there is an issue with STM32H563AII3Q, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32H563AII3Q part is unused and in its original packaging.
Return procedure for STM32H563AII3Q:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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