STMicroelectronics STM32H563AII6
- Part No.:
- STM32H563AII6
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 169-UFBGA
- Datasheet:
-
STM32H563AII6.pdf
- Description:
- IC MCU 32BIT 1MB FLASH 100LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:4,358
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Product details
Overview
STM32H563AII6 from STMicroelectronics is a high-security, high-performance Arm® Cortex®-M33 32-bit microcontroller with TrustZone®, FPU, and 250 MHz operation. It integrates 2 Mbyte flash with ECC, 640 Kbyte SRAM (including ECC-protected SRAM2/SRAM3), CORDIC/FMAC math accelerators, dual FDCAN, USB Type-C®/PD controller, and Ethernet MAC - deployed in secure industrial gateways requiring real-time control, encrypted firmware updates, and multi-protocol connectivity.
For engineers reviewing the STM32H563AII6 datasheet, STM32H563AII6 pinout, STM32H563AII6 application, or STM32H563AII6 equivalent, key selection considerations include TrustZone-enforced peripheral isolation, dual-bank flash for seamless OTA updates, SMPS/LDO power architecture flexibility, and verified 5 Msps ADC performance under 1.71–3.6 V supply.
Technical Context
The device implements Armv8-M mainline security with configurable SAU regions and GTZC-managed memory/peripheral partitioning. Its dual DMA controllers offload CPU for concurrent high-bandwidth transfers across Octo-SPI, FMC, and Ethernet interfaces.
ART Accelerator includes 8-Kbyte instruction cache and 4-Kbyte data cache, enabling zero-wait-state execution from flash and external memories. The CORDIC coprocessor accelerates trigonometric functions while FMAC supports real-time FIR/IIR filtering - both accessible via dedicated DMA channels without CPU intervention.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M33 with TrustZone®, FPU, MPU, 250 MHz max - enables secure real-time task scheduling and cryptographic isolation. |
| Flash Memory | 2 Mbyte embedded flash with ECC and read-while-write dual-bank operation - supports atomic firmware updates and secure boot verification. |
| SRAM | 640 Kbyte total: 64 Kbyte SRAM2 (ECC), 320 Kbyte SRAM3 (flexible ECC), 4 Kbyte backup SRAM - retains critical state during Stop/Standby modes. |
| Analog Peripherals | Two 12-bit ADCs (5 Msps), one dual-channel 12-bit DAC, digital temperature sensor (NIST SP800-90B compliant) - enables precision sensor fusion and closed-loop control. |
| Communication | Two FDCAN, four I²C (Fm+), twelve USART/LPUART, two SAI, Octo-SPI, SDMMC, Ethernet MAC, USB FS host/device, UCPD - supports industrial fieldbus bridging and secure wired/wireless edge node aggregation. |
| Security | TrustZone-aware peripherals, HASH/ECDSA/PKA accelerators, 96-bit unique ID, active tampers, SFI support - meets PSA Certified Level 3 and SESIP requirements for firmware integrity. |
| Power Management | 1.71–3.6 V supply, embedded LDO or external SMPS, multiple low-power modes (Stop/Standby), VBAT RTC support - sustains >10-year battery life in metering applications. |
Pinout & Package
STM32H563AII6 uses a 176-pin LQFP package (24 × 24 mm, 0.5 mm pitch) with exposed thermal pad. Pin mapping aligns with STM32H563xx family ballout definition per DS14258 Rev 6 Section 4.1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD/VSS | Core & I/O power/ground | Dual-supply domains: VCORE (1.1 V) and VDD (1.71–3.6 V); 5 V-tolerant on most GPIOs for legacy interface compatibility. |
| PA0–PA15, PB0–PB15, etc. | General-purpose I/O | 140 fast I/Os with interrupt capability; up to ten support independent 1.08–3.6 V supply for mixed-voltage subsystem interfacing. |
| PH0/PH1 | HSE oscillator input/output | 4–50 MHz external crystal connection; required for precise clock generation and USB/ETH timing compliance. |
| PC13–PC15 | RTC/LSE domain | 32.768 kHz LSE input, RTC oscillator output, and tamper detection - enables calendar timekeeping and anti-tamper logging in VBAT mode. |
| PA11/PA12 | USB D+/D− | Full-speed USB 2.0 transceiver with integrated PHY - eliminates need for external USB level-shifting components. |
| PD0/PD1 | FDCAN1 TX/RX | Differential CAN FD physical layer interface supporting 5 Mbps data rate - suitable for automotive diagnostics and industrial automation networks. |
Key Features
| Feature | Design Value |
|---|---|
| Secure Boot & Firmware Upgrade | Hardware-enforced root-of-trust with TF-M integration and SFI - enables signed, encrypted OTA updates without runtime vulnerability exposure. |
| Math Acceleration | CORDIC (sin/cos/tan/atan) + FMAC (16×16 MAC, 32-bit accumulator) - reduces CPU load by >70% in motor control and signal processing loops. |
| Memory Architecture | Dual-bank flash with ECC + 640 KB SRAM (ECC on SRAM2/SRAM3) - prevents silent data corruption and supports lock-step safety monitoring per IEC 61508 SIL-2. |
| Low-Power Timers | Six LPTIMs available in Stop mode with sub-microamp quiescent current - maintains real-time scheduling and wake-up triggers during extended sleep cycles. |
| External Memory Interface | Flexible FMC supporting SDRAM, PSRAM, NOR/NAND, FRAM - enables local UI rendering, data buffering, and firmware staging without external MCU. |
Applications
| Industrial Gateway | Smart Energy Meter |
|---|---|
Use Scenario: Aggregating Modbus RTU, CAN FD, and Ethernet/IP traffic between field devices and cloud platforms. IC Role / Device Role / Timing Role: Central protocol translator and TLS-secured edge node with hardware-accelerated crypto and deterministic 10 µs interrupt latency. Use Value: Dual FDCAN + Ethernet MAC + UCPD enable simultaneous fieldbus bridging, remote firmware update, and power delivery negotiation - reducing BOM count by one dedicated comms IC. | Use Scenario: Revenue-grade electricity meter with metrology, tamper detection, and HPLC/G3-PLC communication. IC Role / Device Role / Timing Role: Secure metering SoC handling ADC sampling, AES-128 encryption, RTC timestamping, and active tamper response within <100 µs. Use Value: Integrated 5 Msps ADC + digital temperature sensor + 96-bit UID ensures traceable calibration and NIST-compliant measurement accuracy across -40°C to +85°C. |
| Medical IoT Hub | Secure PLC Controller |
Use Scenario: HIPAA-compliant patient monitor aggregating BLE sensors, ECG front-end, and Wi-Fi backhaul. IC Role / Device Role / Timing Role: Trusted execution environment for sensor fusion, secure boot, and PKA-accelerated ECDSA signature verification of firmware images. Use Value: TrustZone-enforced separation of BLE stack (NS), ECG processing (S), and Wi-Fi driver (NS) prevents lateral movement during runtime attacks. | Use Scenario: Safety-rated programmable logic controller with dual-core redundancy and functional safety monitoring. IC Role / Device Role / Timing Role: ASIL-B capable controller executing IEC 61131-3 logic with watchdog supervision, ECC memory scrubbing, and cyclic CRC validation. Use Value: Dual-bank flash + SRAM ECC + six LPTIMs allow safe firmware rollback and deterministic cycle-time enforcement at 1 ms resolution. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-security MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32H753IIK | Arm Cortex-M7 @ 480 MHz, no TrustZone, 2 Mbyte flash, 1 Mbyte RAM, no UCPD or FDCAN | Lacks hardware-enforced security partitioning and modern CAN FD/Ethernet/USB-C features | Select when maximum raw DSP throughput is prioritized over PSA-certifiable security and industrial connectivity. |
| NXP i.MX RT1176DVMAA | Arm Cortex-M7 + M4 dual-core, 1 GHz M7, 2 Mbyte on-chip RAM, no embedded flash, SECO security subsystem | Requires external flash; SECO differs from TrustZone in privilege model and peripheral access control granularity | Select for heterogeneous compute workloads where M7 handles AI inference and M4 manages real-time I/O - but requires additional flash BOM and security validation effort. |
Compared with STM32H563AII6, the STM32H753IIK offers higher clock speed but lacks TrustZone and modern interface support, while the i.MX RT1176DVMAA provides dual-core flexibility at the cost of external memory dependency and non-TrustZone security architecture - making STM32H563AII6 optimal for compact, self-contained, PSA Level 3-certifiable designs.
Availability
STM32H563AII6 is available at Aetrix Electronics and suitable for industrial gateways, smart energy meters, medical IoT hubs, and secure PLC controllers requiring stable component supply across 10+ year product lifecycles.
Supply support for STM32H563AII6 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and analog products for industrial, automotive, and consumer markets.
The STM32H5 series targets high-assurance embedded systems demanding PSA Certified Level 3 security, real-time determinism, and integrated connectivity - specifically engineered for industrial edge nodes, secure metering, and medical edge computing.
FAQ
What is the maximum operating frequency and DMIPS rating of the STM32H563AII6?
The STM32H563AII6 operates at up to 250 MHz with an Arm Cortex-M33 core delivering 375 DMIPS (Dhrystone 2.1). Its 1.5 DMIPS/MHz efficiency and 1023 CoreMark® score reflect optimized pipeline execution, supported by ART Accelerator's 8-Kbyte instruction cache enabling zero-wait-state flash access.
Does the STM32H563AII6 support hardware-based secure boot and firmware updates?
Yes - it implements secure boot via immutable ROM code that validates signed firmware images using ECDSA and HASH accelerators. Secure firmware installation (SFI) and TF-M integration enable authenticated, encrypted over-the-air updates with rollback protection and TrustZone-isolated update staging.
What power supply options does the STM32H563AII6 support, and how do they affect system design?
The device supports either an internal LDO or external SMPS step-down converter for VCORE regulation. The SMPS option improves efficiency by ~30% in active mode and enables dynamic voltage scaling down to 0.8 V, reducing active power consumption - critical for battery-powered edge nodes requiring multi-year operation.
How many and what types of analog-to-digital converters are integrated into the STM32H563AII6?
It integrates two independent 12-bit ADCs, each capable of 5 Msps sampling rate with hardware oversampling and digital filtering. Both support simultaneous sampling, injected/conversion modes, and analog watchdogs - enabling synchronized multi-channel acquisition for motor control, power quality monitoring, and sensor fusion applications.
STM32H563AII6 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 169-UFBGA
- Series:
- STM32H5
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-M33
- Core Size:
- 32-Bit
- Speed:
- 250MHz
- Connectivity:
- CANbus, Ethernet, FIFO, I2C, IrDA, LINbus, SCI, SDIO, SMBus, SPI, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, DMA, I2S, PDR, POR, PWM, SHA, TRNG, Voltage Detect, WDT
- Number of I/O:
- 136
- Program Memory Size:
- 2MB (2M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 640K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 3.6V
- Data Converters:
- A/D 20x12b SAR; D/A 2x12b
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32H563AII6 FAQ
1.How can I place an order for STM32H563AII6 through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32H563AII6 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32H563AII6 reliable?
The price and inventory of STM32H563AII6 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32H563AII6 is usually 5 days.
3.What payment methods are accepted for STM32H563AII6?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32H563AII6 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32H563AII6?
STM32H563AII6 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32H563AII6 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32H563AII6?
For technical support, including STM32H563AII6 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32H563AII6 requirements.
6.How does Aetrix verify that STM32H563AII6 is sourced from the original manufacturer or authorized distributors?
All STM32H563AII6 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32H563AII6 meets industry standards.
7.What is the process for return or replacement of STM32H563AII6?
All STM32H563AII6 units undergo pre-shipment inspection (PSI). If there is an issue with STM32H563AII6, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32H563AII6 part is unused and in its original packaging.
Return procedure for STM32H563AII6:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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