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STMicroelectronics STM32H563RIV6
- Part No.:
- STM32H563RIV6
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 68-VFQFN Exposed Pad
- Datasheet:
-
STM32H563RIV6.pdf
- Description:
- IC MCU 32BIT 1MB FLASH 68VFQFPN
- Quantity:
- Payment:
- Shipping:
Inventory:2,012
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Product details
Overview
STM32H563RIV6 from STMicroelectronics is a high-security, high-performance Arm® Cortex®-M33 32-bit microcontroller with TrustZone®, FPU, and math accelerators (CORDIC, FMAC), operating at up to 250 MHz (375 DMIPS), featuring 2-Mbyte ECC flash, 640-Kbyte SRAM (with flexible ECC), and dual DMA controllers. It targets secure industrial control, IoT edge nodes, and automotive body electronics requiring real-time deterministic execution, cryptographic integrity, and low-power operation across extended temperature ranges.
For engineers reviewing the STM32H563RIV6 datasheet, STM32H563RIV6 pinout, STM32H563RIV6 application, or STM32H563RIV6 equivalent, key selection considerations include TrustZone-enforced peripheral isolation, dual-bank flash with read-while-write capability, integrated SMPS regulator support, 12-bit ADCs delivering 5 Msps, and hardware-accelerated ECDSA signature verification for firmware authenticity.
Technical Context
The STM32H563RIV6 implements Armv8-M mainline security with configurable SAU regions and TrustZone-aware peripherals including GTZC-managed memory, flash, SRAM, and DMA. Its ART Accelerator includes an 8-Kbyte instruction cache and 4-Kbyte data cache to eliminate wait states during flash and external memory access.
It integrates two math accelerators: CORDIC for real-time trigonometric computation and FMAC for high-throughput digital filtering. Clock management supports multiple internal oscillators (64 MHz HSI, 48 MHz HSI48, 4 MHz CSI) and external sources (4–50 MHz HSE, 32.768 kHz LSE), with dual PLLs for independent system and peripheral clock domains.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M33 with TrustZone, FPU, MPU, 250 MHz max frequency (375 DMIPS @ Dhrystone 2.1) |
| Memory | 2-Mbyte embedded flash with ECC and read-while-write; 640-Kbyte SRAM (64-Kbyte SRAM2 + 320-Kbyte SRAM3, both with configurable ECC) |
| Analog Peripherals | Two 12-bit ADCs (5 Msps), one 12-bit dual-channel DAC, digital temperature sensor (NIST SP800-90B compliant) |
| Security | TrustZone with up to eight SAU regions, HASH accelerator, PKA, ECDSA verification, SFI, active tampers, 96-bit unique ID |
| Timers & Connectivity | 24 timers (including six low-power 16-bit timers), two FDCAN, four I2C (Fm+), 12 USART/LPUART, two SAI, Ethernet MAC, USB 2.0 FS, UCPD |
| Power & Package | 1.71–3.6 V supply; SMPS or LDO regulation; LQFP64 (10 × 10 mm) package with 51 user I/Os (most 5 V-tolerant) |
Pinout & Package
LQFP64 (10 × 10 mm, 0.5 mm pitch) package with exposed thermal pad; 64-pin layout supporting 51 general-purpose I/Os, 5 power/ground pins, and dedicated debug, reset, and clock terminals.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VSS | Core & I/O power supply / ground | Dual-supply domain: VDD powers core/digital logic; VSS provides reference return; decoupling required per datasheet Section 5.3.6 |
| PA0–PA15, PB0–PB15, PC0–PC15, PD0–PD15, PE0–PE15 | General-purpose I/Os | 51 total user-accessible pins; most support 5 V tolerance, interrupt generation, and multiple alternate functions (e.g., USART, SPI, TIM) |
| NRST | Active-low reset input | Asynchronous reset signal; internal pull-up; compatible with open-drain reset supervisors and push-button debouncing circuits |
| SWDIO / SWCLK | Serial Wire Debug interface | Two-pin debug port supporting authenticated SWD; enables secure firmware update and lifecycle-controlled debug access |
| BOOT0 | Boot mode selection | Configures boot source (system memory, flash, or FMC); level sampled at reset; requires external pull-up/down per boot configuration table |
Key Features
| Feature | Design Value |
|---|---|
| TrustZone Security Architecture | Hardware-enforced isolation between secure/non-secure worlds with configurable SAU regions and GTZC-managed peripherals |
| ART Accelerator Caching | 8-Kbyte instruction cache + 4-Kbyte data cache enabling zero-wait-state execution from flash and external memories |
| Math Acceleration Engine | CORDIC coprocessor for real-time sin/cos/tan/arctan and FMAC for FIR/IIR filter acceleration without CPU load |
| Flexible Power Management | Integrated SMPS regulator with scalable output (0.6–1.4 V) and three low-power modes (Sleep, Stop, Standby) with RTC retention |
| Secure Firmware Installation | SFI mechanism enabling cryptographically signed firmware updates verified by PKA and HASH before execution |
Applications
| Industrial PLC Controller | Secure IoT Gateway |
|---|---|
Use Scenario: Real-time motion control in factory automation with deterministic I/O response and encrypted fieldbus communication. IC Role / Device Role / Timing Role: Main controller executing safety-critical ladder logic and CANopen/FDCAN stack with TrustZone-isolated secure boot and runtime firmware validation. Use Value: Dual-bank flash enables seamless over-the-air firmware updates without halting control loops; 250 MHz M33 ensures sub-millisecond task scheduling. |
Use Scenario: Edge node aggregating sensor data from BLE/Zigbee networks and forwarding via TLS-secured Ethernet or USB-C PD link. IC Role / Device Role / Timing Role: Secure host processor managing cryptographic key storage, ECDSA-signed OTA updates, and hardware-accelerated AES-GCM encryption for payload confidentiality. Use Value: Integrated PKA and HASH reduce MCU overhead by >90% vs. software-only crypto; 640-Kbyte SRAM buffers multi-protocol packet queues. |
| Automotive Body Control Module | Medical Diagnostic Handheld |
Use Scenario: Centralized lighting, window lift, and door lock control with ASIL-B compliance and tamper detection. IC Role / Device Role / Timing Role: Safety-monitored MCU running ISO 26262-compliant diagnostics, using active tampers and backup SRAM to preserve fault logs during power loss. Use Value: 4-Kbyte backup SRAM retains critical event history in Standby mode; TrustZone isolates safety monitor from application firmware. |
Use Scenario: Portable ultrasound or ECG device requiring low-noise analog acquisition, real-time DSP, and HIPAA-compliant data export. IC Role / Device Role / Timing Role: Signal processing hub interfacing 12-bit ADCs (5 Msps) with CORDIC/FMAC for beamforming and filtering, then encrypting results before USB transfer. Use Value: On-chip FMAC performs 1024-point FIR filtering in <10 µs; dual 12-bit DAC channels drive precision analog front-end calibration signals. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-security MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32H753VI | No TrustZone; Cortex-M7 core (480 MHz); 2-Mbyte flash but no built-in SMPS; lacks CORDIC/FMAC | Better raw performance for non-secure DSP workloads; no hardware root-of-trust or secure firmware installation | Select when maximum floating-point throughput is prioritized over cryptographic isolation and secure boot enforcement |
| NXP i.MX RT1176 | Cortex-M7 + M4 dual-core; 1 GHz M7; no TrustZone on M4; separate secure element required for PKA/ECDSA | Higher compute density for AI inference; relies on external SE for secure key storage and signing | Select when heterogeneous processing (M7 for ML, M4 for control) is needed and external secure element integration is acceptable |
Compared with STM32H563RIV6, the STM32H753VI trades security architecture for higher clock speed and lacks math accelerators, while the i.MX RT1176 offers dual-core flexibility but requires external components to match the integrated TrustZone, PKA, and SFI capabilities of the H563.
Availability
STM32H563RIV6 is available at Aetrix Electronics and suitable for industrial PLC controllers, secure IoT gateways, automotive body control modules, and medical diagnostic handhelds requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for STM32H563RIV6 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, specializing in microcontrollers, power management, sensors, and automotive ICs with strong emphasis on industrial and automotive reliability.
The STM32H5 series is designed for high-assurance embedded systems demanding hardware-enforced security, deterministic real-time performance, and energy efficiency - targeting applications where firmware integrity, peripheral isolation, and cryptographic acceleration are mandatory.
FAQ
What is the maximum operating frequency and corresponding DMIPS rating?
The STM32H563RIV6 operates at up to 250 MHz, achieving 375 DMIPS (Dhrystone 2.1) with its Arm Cortex-M33 core. This performance is sustained with zero-wait-state execution enabled by the 8-Kbyte instruction cache and ART Accelerator, even when fetching from embedded flash memory.
Does the device support hardware-accelerated cryptographic operations?
Yes - it integrates HASH (SHA-1/SHA-224/SHA-256), PKA (RSA/ECC/ECDSA), true random number generator (NIST SP800-90B compliant), and SFI (Secure Firmware Installation) for cryptographically signed firmware updates verified prior to execution.
What are the supported low-power modes and their key characteristics?
It supports Sleep, Stop, and Standby modes. In Stop mode, six low-power 16-bit timers remain active; in Standby, only RTC, 32 backup registers, and 4-Kbyte backup SRAM retain state. VBAT supplies RTC during main power loss, and the SMPS regulator can be disabled to minimize quiescent current.
How many I/O pins are available in the LQFP64 package, and what is their voltage tolerance?
The LQFP64 package provides 51 user-accessible I/O pins. Most are 5 V-tolerant on inputs, allowing direct interfacing with legacy 5 V logic without level shifters. Pin functions include GPIO, alternate peripherals (USART, SPI, TIM, I2C), and dedicated debug/reset signals.
STM32H563RIV6 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 68-VFQFN Exposed Pad
- Series:
- STM32H5
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-M33
- Core Size:
- 32-Bit
- Speed:
- 250MHz
- Connectivity:
- CANbus, Ethernet, FIFO, I2C, IrDA, LINbus, SCI, SDIO, SMBus, SPI, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, DMA, I2S, PDR, POR, PWM, SHA, TRNG, Voltage Detect, WDT
- Number of I/O:
- 53
- Program Memory Size:
- 2MB (2M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 640K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 3.6V
- Data Converters:
- A/D 16x12b SAR; D/A 2x12b
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32H563RIV6 FAQ
1.How can I place an order for STM32H563RIV6 through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32H563RIV6 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32H563RIV6 reliable?
The price and inventory of STM32H563RIV6 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32H563RIV6 is usually 5 days.
3.What payment methods are accepted for STM32H563RIV6?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32H563RIV6 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32H563RIV6?
STM32H563RIV6 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32H563RIV6 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32H563RIV6?
For technical support, including STM32H563RIV6 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32H563RIV6 requirements.
6.How does Aetrix verify that STM32H563RIV6 is sourced from the original manufacturer or authorized distributors?
All STM32H563RIV6 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32H563RIV6 meets industry standards.
7.What is the process for return or replacement of STM32H563RIV6?
All STM32H563RIV6 units undergo pre-shipment inspection (PSI). If there is an issue with STM32H563RIV6, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32H563RIV6 part is unused and in its original packaging.
Return procedure for STM32H563RIV6:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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