STMicroelectronics STM32H563VIT3Q
- Part No.:
- STM32H563VIT3Q
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 100-LQFP
- Datasheet:
-
STM32H563VIT3Q.pdf
- Description:
- IC MCU 32BIT 2MB FLASH 100LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:2,310
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Product details
Overview
STM32H563VIT3Q from STMicroelectronics is a high-security, high-performance Arm® Cortex®-M33 32-bit microcontroller with TrustZone®, FPU, and math accelerators (CORDIC, FMAC), operating at up to 250 MHz (375 DMIPS), featuring 2-Mbyte ECC flash, 640-Kbyte SRAM (with flexible ECC), and dual DMA controllers. It targets secure industrial control, IoT edge nodes, and automotive body electronics requiring real-time deterministic execution and firmware integrity.
For engineers reviewing the STM32H563VIT3Q datasheet, STM32H563VIT3Q pinout, STM32H563VIT3Q application, or STM32H563VIT3Q equivalent, key selection criteria include TrustZone-enforced peripheral isolation, dual-bank read-while-write flash for secure OTA updates, 24 timers including six low-power 16-bit timers, dual FDCAN interfaces, and hardware-accelerated ECDSA signature verification for secure boot.
Technical Context
The device implements Armv8-M mainline security with configurable SAU regions and GTZC-based memory/peripheral protection. Its dual-core debug architecture supports authenticated SWD/JTAG access and ETM trace, while secure life cycle management enables controlled debug authentication and SFI-based firmware installation.
Power management integrates an SMPS step-down converter with scalable output, POR/PDR/PVD/BOR supervision, and three ultra-low-power modes (Sleep, Stop, Standby) with VBAT-backed RTC and 32 backup registers. The ART Accelerator includes 8-Kbyte instruction cache and 4-Kbyte data cache for zero-wait-state execution from flash and external memories.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M33 with TrustZone, FPU, MPU, 250 MHz max frequency (375 DMIPS @ Dhrystone 2.1) |
| Memory | 2-Mbyte embedded flash with ECC and read-while-write; 640-Kbyte SRAM (64-Kbyte SRAM2 + 320-Kbyte SRAM3, both with configurable ECC) |
| Security | TrustZone-aware peripherals, up to eight SAU regions, HASH/ECDSA/RNG accelerators, 96-bit unique ID, active tampers |
| Timers & PWM | Up to 24 timers: 18×16-bit (6 low-power), 2×32-bit with quadrature encoder input, 2 watchdogs, 2 SysTick |
| Communication | 2×FDCAN, 4×I²C (Fm+), 12×U(S)ART/LPUART, 6×SPI/I²S, 2×SAI, 1×Ethernet MAC, 1×USB FS host/device, 1×UCPD |
| Analog | 2×12-bit ADC (5 Msps), 1×12-bit dual-channel DAC, digital temperature sensor (NIST SP800-90B compliant) |
| Package | LQFP100 (14 × 14 mm), 100-pin, ECOPACK2-compliant, lead-free, RoHS-compliant |
Pinout & Package
LQFP100 package: 100-pin, 0.5 mm pitch, 14 × 14 mm body size, exposed pad for thermal dissipation, ECOPACK2-compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD/VSS | Core power supply / ground | 1.71–3.6 V application supply; dedicated VDDA/VSSA for analog domain; VCAP pins for SMPS decoupling |
| PA0–PA15, PB0–PB15, etc. | General-purpose I/O | Up to 140 fast I/Os; most 5 V-tolerant; ten I/Os support independent 1.08–3.6 V supply for mixed-voltage interfacing |
| NRST | Reset input | Active-low reset with internal pull-up; supports external reset assertion and programmable reset source detection |
| BOOT0 | Boot mode selection | Configures boot source (system memory, embedded flash, or FMC); level-sampled at reset release |
| SWCLK/SWDIO | Debug interface | Serial Wire Debug (SWD) signals; support authenticated debug access and trace via ETM |
Key Features
| Feature | Design Value |
|---|---|
| TrustZone-enforced peripheral isolation | GTZC controller enforces secure/non-secure access to memories and peripherals; SAU regions define memory protection boundaries |
| Secure firmware installation (SFI) | Hardware-assisted validation of signed firmware images using ECDSA; prevents unauthorized code execution during boot |
| Math acceleration | CORDIC coprocessor computes sin/cos/tan/log/exp in <100 cycles; FMAC performs parallel FIR/IIR filtering with 32-bit precision |
| Dual-bank flash with RWW | Enables seamless firmware updates: execute from Bank A while programming Bank B, eliminating system downtime |
| Flexible power architecture | Integrated SMPS with programmable output voltage (0.6–1.4 V) reduces system BOM cost and improves efficiency vs. external LDO |
Applications
| Industrial PLC Controller | Secure IoT Gateway |
|---|---|
|
Use Scenario: Real-time motion control and fieldbus communication in factory automation systems with functional safety requirements. IC Role / Device Role / Timing Role: Primary application processor executing deterministic control loops, managing EtherCAT/PROFINET stacks, and enforcing secure firmware updates. Use Value: Dual-bank flash RWW enables zero-downtime field upgrades; FDCAN and Ethernet MAC support industrial protocol coexistence; TrustZone isolates safety-critical tasks from user applications. |
Use Scenario: Edge node aggregating sensor data from BLE/Zigbee subnets and forwarding encrypted payloads to cloud via TLS-secured Wi-Fi/Ethernet. IC Role / Device Role / Timing Role: Secure root-of-trust for key provisioning, cryptographic offload (HASH/ECDSA/RNG), and trusted execution environment for TLS stack. Use Value: Hardware RNG compliant with NIST SP800-90B ensures cryptographically strong keys; SFI and secure debug authentication prevent firmware tampering and reverse engineering. |
| Automotive Body Control Module | Medical Diagnostic Handheld |
|
Use Scenario: Centralized lighting, window lift, and door lock control in 12 V vehicle architectures with ASIL-B readiness. IC Role / Device Role / Timing Role: Safety-monitored MCU handling CAN FD communication, PWM-driven LED drivers, and LIN slave interfaces. Use Value: Six low-power timers maintain precise PWM timing in Stop mode; dual FDCAN supports redundancy and diagnostics; VBAT-backed RTC enables event logging across ignition cycles. |
Use Scenario: Portable ultrasound or ECG device requiring low-noise analog acquisition, battery longevity, and HIPAA-compliant data encryption. IC Role / Device Role / Timing Role: Signal processing hub acquiring 12-bit ADC data at 5 Msps, applying CORDIC-based beamforming, and encrypting results before storage. Use Value: 12-bit dual-channel DAC generates calibrated reference waveforms; digital temperature sensor monitors thermal drift for ADC calibration; 640-Kbyte SRAM buffers multi-frame acquisitions without external DRAM. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-security MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32H753VI | No TrustZone; Cortex-M7 core; higher clock (480 MHz) but no SAU/secure debug; lacks SFI and ECDSA accelerator | Suitable for non-security-critical high-throughput DSP tasks; no certified secure boot path | Select when raw performance > security certification; requires software-only secure boot implementation |
| RA6M5GFP | Arm Cortex-M33 with TrustZone; 200 MHz; 2-Mbyte flash; no CORDIC/FMAC; single FDCAN; different peripheral set (no UCPD, no Octo-SPI) | Targeted at industrial HMI and motor control; weaker crypto acceleration and fewer communication options | Select for Renesas ecosystem alignment; lower peripheral integration reduces design flexibility for complex gateways |
Compared with STM32H563VIT3Q, STM32H753VI trades security features for peak compute throughput, while RA6M5GFP offers comparable TrustZone but lacks math accelerators and dual FDCAN-making STM32H563VIT3Q optimal for secure, math-intensive, multi-interface edge nodes.
Availability
STM32H563VIT3Q is available at Aetrix Electronics and suitable for industrial PLC controllers, secure IoT gateways, automotive body control modules, and medical diagnostic handhelds requiring stable component supply, long-term lifecycle assurance, and full traceability.
Supply support for STM32H563VIT3Q includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in microcontrollers, power management, sensors, and automotive ICs with over 40 years of industrial-grade reliability.
The STM32H5 series is designed for high-assurance embedded applications demanding hardware-enforced security, deterministic real-time performance, and energy-efficient operation across industrial, automotive, and medical domains.
FAQ
What is the maximum operating frequency and associated performance metric?
The STM32H563VIT3Q operates at up to 250 MHz, delivering 375 DMIPS (Dhrystone 2.1) and 1023 CoreMark® (4.092 CoreMark®/MHz). This performance is sustained with zero wait states thanks to the 8-Kbyte instruction cache (ART Accelerator), enabling deterministic real-time execution critical for control loops and protocol stacks.
How does TrustZone implementation differ from standard Cortex-M33 deployments?
This device implements Armv8-M mainline TrustZone with ST's Global TrustZone Controller (GTZC), supporting up to eight configurable SAU regions and TrustZone-aware peripherals (e.g., GTZC-secured FMC, OCTOSPI, and DMA). Unlike generic M33 cores, it includes secure debug authentication, SFI for signed firmware installation, and active tamper detection-meeting PSA Level 3 certification requirements.
Which power-saving features are available in Stop mode?
In Stop mode, six 16-bit low-power timers remain active with full PWM/IC/OC capability, the RTC continues running on VBAT, and the digital temperature sensor (DTS) maintains periodic sampling. The SMPS regulator stays enabled, allowing fast wake-up (<5 µs) while consuming only 12 µA typical-enabling battery-powered applications with multi-year runtime.
What external memory interfaces does the STM32H563VIT3Q support?
The device integrates a Flexible Memory Controller (FMC) supporting SRAM, PSRAM, SDRAM/LPSDR, FRAM, and NOR/NAND memories with up to 16-bit data bus width, plus a dedicated Octo-SPI interface for serial PSRAM/NAND/NOR and HyperRAM/HyperFlash. These interfaces enable expansion beyond on-chip memory for GUI frame buffers, firmware staging, or high-speed data logging.
STM32H563VIT3Q Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 100-LQFP
- Series:
- STM32H5
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-M33
- Core Size:
- 32-Bit
- Speed:
- 250MHz
- Connectivity:
- CANbus, FIFO, I2C, IrDA, LINbus, SCI, SDIO, SMBus, SPI, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, DMA, I2S, PDR, POR, PWM, SHA, TRNG, Voltage Detect, WDT
- Number of I/O:
- 80
- Program Memory Size:
- 2MB (2M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 640K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 3.6V
- Data Converters:
- A/D 16x12b SAR; D/A 2x12b
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32H563VIT3Q FAQ
1.How can I place an order for STM32H563VIT3Q through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32H563VIT3Q on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32H563VIT3Q reliable?
The price and inventory of STM32H563VIT3Q are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32H563VIT3Q is usually 5 days.
3.What payment methods are accepted for STM32H563VIT3Q?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32H563VIT3Q transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32H563VIT3Q?
STM32H563VIT3Q orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32H563VIT3Q order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32H563VIT3Q?
For technical support, including STM32H563VIT3Q datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32H563VIT3Q requirements.
6.How does Aetrix verify that STM32H563VIT3Q is sourced from the original manufacturer or authorized distributors?
All STM32H563VIT3Q products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32H563VIT3Q meets industry standards.
7.What is the process for return or replacement of STM32H563VIT3Q?
All STM32H563VIT3Q units undergo pre-shipment inspection (PSI). If there is an issue with STM32H563VIT3Q, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32H563VIT3Q part is unused and in its original packaging.
Return procedure for STM32H563VIT3Q:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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