STMicroelectronics STM32H563VIT6
- Part No.:
- STM32H563VIT6
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 100-LQFP
- Datasheet:
-
STM32H563VIT6.pdf
- Description:
- IC MCU 32BIT 2MB FLASH 100LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:798
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Product details
Overview
STM32H563VIT6 from STMicroelectronics is a high-performance, secure Arm® Cortex®-M33 32-bit microcontroller with TrustZone®, FPU, and 250 MHz operation delivering 375 DMIPS. It integrates 2 Mbyte flash with ECC, 640 Kbyte SRAM (including ECC-protected SRAM2/SRAM3), CORDIC/FMAC math accelerators, dual FDCAN, USB Type-C®/PD controller, and Ethernet MAC - deployed in industrial gateways requiring real-time control, secure firmware updates, and multi-protocol connectivity.
For engineers reviewing the STM32H563VIT6 datasheet, STM32H563VIT6 pinout, STM32H563VIT6 application, or STM32H563VIT6 equivalent, key selection criteria include TrustZone-enforced secure boot, dual-bank flash for seamless OTA updates, 140 5 V-tolerant GPIOs, integrated SMPS regulator for power efficiency, and hardware-accelerated cryptographic functions (ECDSA, HASH, RNG).
Technical Context
The STM32H563VIT6 implements a dual-core security architecture: the Cortex-M33 core executes in both Secure and Non-secure states under Armv8-M TrustZone®, with up to eight configurable SAU regions enforcing memory and peripheral isolation. Its GTZC (Global TrustZone Controller) enables per-peripheral security attribution, including securable FDCAN, USB Type-C, and ETH interfaces.
It features two independent DMA controllers (GPDMA1/GPDMA2), ART Accelerator with 8-Kbyte instruction cache and 4-Kbyte data cache, and advanced clock management with internal 64 MHz HSI, 48 MHz HSI48, and external 4–50 MHz HSE support - enabling deterministic real-time execution and low-latency peripheral response across Stop/Standby modes.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M33 with TrustZone®, FPU, MPU, 250 MHz max frequency - enables secure, deterministic real-time execution with hardware-enforced privilege separation. |
| Flash Memory | 2 Mbyte embedded flash with ECC and read-while-write dual-bank architecture - supports atomic firmware updates and robust code integrity in field-deployed systems. |
| SRAM | 640 Kbyte total: 64 Kbyte SRAM2 (ECC), 320 Kbyte SRAM3 (flexible ECC), 4 Kbyte backup SRAM - provides fault-tolerant data retention and low-power RTC operation. |
| Security | TrustZone®, SFI (Secure Firmware Installation), ECDSA verification, NIST SP800-90B-compliant TRNG, 96-bit unique ID, active tampers - meets IEC 62443-3-3 SL2 requirements for industrial IoT endpoints. |
| Peripherals | 2× FDCAN, 12× U(S)ART (incl. LPUART), 4× I2C, 1× I3C, 6× SPI, 2× SAI, 2× ADC (5 Msps), 2× DAC, ETH MAC + DMA, USB 2.0 FS, UCPD - enables full-stack connectivity in edge gateways and motor drives. |
| Power Management | 1.71–3.6 V supply, embedded SMPS or LDO, Sleep/Stop/Standby modes, VBAT-powered RTC & 32 backup registers - achieves sub-μA standby current with fast wake-up for battery-backed applications. |
| Package | LQFP100 (14 × 14 mm), 100-pin, ECOPACK2-compliant - supports standard PCB assembly and thermal dissipation up to 100°C ambient in industrial enclosures. |
Pinout & Package
LQFP100 package (14 × 14 mm, 0.5 mm pitch) with exposed thermal pad; RoHS-compliant, ECOPACK2 certified. Pin count: 100 leads; body material: plastic; moisture sensitivity level: MSL3.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VDDA, VDDIO2 | Power supply inputs | Digital core (1.71–3.6 V), analog (1.71–3.6 V), and I/O bank (1.08–3.6 V) supplies - enable flexible voltage scaling and mixed-signal operation. |
| VSS, VSSA | Ground references | Digital and analog ground planes - critical for noise isolation between high-speed digital logic and precision ADC/DAC circuits. |
| NRST | Active-low reset input | Asynchronous reset with internal pull-up; accepts 1.65–5.5 V logic - ensures reliable system initialization across voltage domains and ESD events. |
| PA0–PA15, PB0–PB15, etc. | General-purpose I/Os | Up to 140 fast GPIOs (most 5 V-tolerant); 10 with independent 1.08 V supply - support legacy interface voltage translation and ultra-low-voltage sensor interfacing. |
| PC13–PC15 | RTC oscillator pins | Connect 32.768 kHz crystal for calendar timekeeping and tamper detection - maintains accurate time during VBAT-only operation. |
| PH0–PH1 | HSE oscillator pins | Support 4–50 MHz external crystal/resonator - provides precise system clock source for Ethernet, USB, and audio timing-critical peripherals. |
Key Features
| Feature | Design Value |
|---|---|
| TrustZone-aware peripherals | All major peripherals (FDCAN, ETH, UCPD, SDMMC) are individually assignable to Secure/Non-secure state - enabling granular security policy enforcement without software overhead. |
| Math acceleration | CORDIC (trigonometric/logarithmic) and FMAC (filtering) coprocessors offload CPU for motor control and signal processing - reduce interrupt latency by >60% vs. software-only implementation. |
| Flexible memory controller | FMC supports SRAM, PSRAM, SDRAM/LPSDR, FRAM, NOR/NAND - enables local high-bandwidth data buffering for vision, logging, or protocol bridging applications. |
| Octo-SPI interface | Single interface supporting serial PSRAM/NAND/NOR, HyperRAM/Flash in frame formats - replaces multiple parallel buses, saving PCB area and routing complexity. |
| Secure debug authentication | SWD/JTAG access controlled via life-cycle state (ROM, Secure, Normal); debug port disabled in production mode - prevents unauthorized firmware extraction or reverse engineering. |
Applications
| Industrial Gateway | Secure Edge PLC |
|---|---|
Use Scenario: Protocol translation between Modbus RTU, CANopen, and MQTT over Ethernet/Wi-Fi in factory automation. IC Role / Device Role / Timing Role: Central application processor managing real-time I/O scanning, TLS-secured cloud upload, and secure OTA updates via TF-M. Use Value: Dual-bank flash enables zero-downtime firmware upgrades; TrustZone isolates secure boot and crypto keys from application firmware. |
Use Scenario: Compact programmable logic controller with encrypted ladder logic storage and tamper-evident runtime monitoring. IC Role / Device Role / Timing Role: Deterministic control engine executing cyclic tasks at ≤1 ms intervals while maintaining secure firmware integrity and audit logs. Use Value: CORDIC/FMAC accelerate PID loop computation; 140 GPIOs support direct connection to 24 V digital I/O modules without level shifters. |
| Smart Energy Meter | Medical Data Aggregator |
Use Scenario: ANSI C12.19-compliant meter with metrology SoC interface, secure SEPP communication, and tamper detection. IC Role / Device Role / Timing Role: Security co-processor handling AES-128-GCM encryption, ECDSA signature verification, and secure time sync via RTC+VBAT. Use Value: NIST SP800-90B TRNG and 96-bit UID meet ANSI C12.22 cryptographic requirements; active tampers trigger immediate memory wipe. |
Use Scenario: HIPAA-compliant wearable hub aggregating BLE sensor data, performing on-device anomaly detection, and uploading encrypted health records. IC Role / Device Role / Timing Role: Low-power host MCU managing concurrent BLE connections, sensor fusion (via FMAC), and TLS 1.3 handshakes using hardware PKA. Use Value: LPUART + 640 KB SRAM enables long-duration buffered logging; SMPS regulator extends battery life beyond 12 months in clinical settings. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-security, high-peripheral-count MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32H753VI | No TrustZone, no UCPD, no FDCAN; 1 MB flash, 1 MB RAM; Cortex-M7 @ 480 MHz | Lacks hardware-enforced security partitioning and USB Type-C PD control - unsuitable for certified secure boot or USB-C power negotiation. | Select when raw DSP performance outweighs security requirements and USB-C/automotive CAN FD is not needed. |
| NXP i.MX RT1176 | Dual-core (Cortex-M7 + M4), no TrustZone on M4; 2 MB flash, 1 MB RAM; includes display pipeline and GPU | Higher graphics capability but weaker peripheral-level security attribution; lacks integrated SMPS and tamper detection circuitry. | Select for HMI-rich edge devices where display rendering dominates; avoid when industrial security certification (IEC 62443) is mandatory. |
Compared with STM32H563VIT6, the STM32H753VI trades security depth for higher clock speed and DSP throughput, while the i.MX RT1176 adds multimedia capability at the cost of fine-grained TrustZone peripheral control and tamper resilience - making the H563VIT6 uniquely suited for certified secure industrial edge nodes.
Availability
STM32H563VIT6 is available at Aetrix Electronics and suitable for industrial gateways, secure edge PLCs, smart energy meters, and medical data aggregators requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for STM32H563VIT6 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power ICs, sensors, and automotive semiconductors since 1987.
The STM32H5 series targets high-assurance embedded systems demanding Arm TrustZone, hardware crypto acceleration, and industrial-grade reliability - specifically engineered for IIoT edge nodes, smart grid infrastructure, and regulated medical devices.
FAQ
What is the maximum operating temperature for STM32H563VIT6 in LQFP100 package?
The STM32H563VIT6 in LQFP100 package is rated for industrial temperature range: –40 °C to +105 °C ambient. Thermal performance is validated per JESD51-2 with 4-layer PCB and 1 cm² copper pour under the thermal pad. Junction temperature must not exceed +125 °C under sustained 250 MHz operation with all peripherals active.
Does STM32H563VIT6 support secure boot from external Octo-SPI flash?
Yes - the STM32H563VIT6 supports secure boot from external Octo-SPI memory via its XIP (execute-in-place) mode with TrustZone-protected address remapping. The GTZC configures Octo-SPI memory regions as Secure or Non-secure, and the ROM bootloader validates signed images using ECDSA before execution.
How many independent power domains does the STM32H563VIT6 support?
The STM32H563VIT6 supports three independent power domains: VDD/VDDA (core/analog), VDDIO2 (I/O bank 2, down to 1.08 V), and VBAT (RTC/backup registers). Each domain has dedicated regulators and supervisors, enabling selective power gating and mixed-voltage sensor interfacing without level shifters.
Can the CORDIC and FMAC accelerators operate concurrently with CPU execution?
Yes - both CORDIC and FMAC are autonomous peripherals with dedicated DMA channels and interrupt lines. They execute independently of the Cortex-M33 core, allowing simultaneous trigonometric computation (e.g., motor phase angle) and FIR filtering (e.g., sensor noise reduction) without CPU intervention or cycle contention.
STM32H563VIT6 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 100-LQFP
- Series:
- STM32H5
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-M33
- Core Size:
- 32-Bit
- Speed:
- 250MHz
- Connectivity:
- CANbus, Ethernet, FIFO, I2C, IrDA, LINbus, SCI, SDIO, SMBus, SPI, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, DMA, I2S, PDR, POR, PWM, SHA, TRNG, Voltage Detect, WDT
- Number of I/O:
- 80
- Program Memory Size:
- 2MB (2M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 640K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 3.6V
- Data Converters:
- A/D 16x12b SAR; D/A 2x12b
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32H563VIT6 FAQ
1.How can I place an order for STM32H563VIT6 through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32H563VIT6 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32H563VIT6 reliable?
The price and inventory of STM32H563VIT6 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32H563VIT6 is usually 5 days.
3.What payment methods are accepted for STM32H563VIT6?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32H563VIT6 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32H563VIT6?
STM32H563VIT6 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32H563VIT6 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32H563VIT6?
For technical support, including STM32H563VIT6 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32H563VIT6 requirements.
6.How does Aetrix verify that STM32H563VIT6 is sourced from the original manufacturer or authorized distributors?
All STM32H563VIT6 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32H563VIT6 meets industry standards.
7.What is the process for return or replacement of STM32H563VIT6?
All STM32H563VIT6 units undergo pre-shipment inspection (PSI). If there is an issue with STM32H563VIT6, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32H563VIT6 part is unused and in its original packaging.
Return procedure for STM32H563VIT6:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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