STMicroelectronics STM32H750XBH6
- Part No.:
- STM32H750XBH6
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 265-TFBGA
- Datasheet:
-
STM32H750XBH6.pdf
- Description:
- IC MCU 32BIT 128KB FLASH TFBGA
- Quantity:
- Payment:

- Shipping:

Inventory:745
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Product details
Overview
STM32H750XBH6 from STMicroelectronics is a 32-bit Arm® Cortex®-M7 microcontroller operating at up to 480 MHz, featuring 128 Kbytes of flash, 1 Mbyte of RAM (including 192 Kbytes TCM), and integrated cryptographic acceleration (AES-256, SHA-2, RNG). It supports dual-domain power management (D1/D2/D3), 3× PLLs with fractional mode, and 46 communication/analog peripherals - deployed in industrial HMI, motor control gateways, and secure edge nodes requiring deterministic real-time response.
For engineers reviewing the STM32H750XBH6 datasheet, STM32H750XBH6 pinout, STM32H750XBH6 application, or STM32H750XBH6 equivalent, key selection criteria include its 480 MHz Cortex-M7 core with L1 cache, 1 Mbyte RAM partitioning (ITCM/DTCM/backup SRAM), dual CAN FD + Ethernet MAC support, hardware JPEG codec, and voltage scaling across six Run/Stop modes.
Technical Context
The STM32H750XBH6 implements a triple-domain power architecture (D1 high-performance, D2 comms/timers, D3 reset/clock/PM) with independent clock gating and voltage scaling. Its interconnect uses one AXI and two AHB bus matrices, bridged via five AHB2-APB and two AXI2-AHB bridges to enable concurrent high-bandwidth peripheral access.
It integrates four DMA controllers: one high-speed MDMA with linked-list support, two dual-port DMAs with FIFO, and one basic DMA with request routing - offloading CPU for sensor fusion, audio streaming, and real-time control loops without latency penalty.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M7 @ 480 MHz with double-precision FPU, 16 KB I-cache + 16 KB D-cache, 1027 DMIPS |
| Memory | 128 KB flash + 1 MB RAM: 64 KB ITCM + 128 KB DTCM + 864 KB user SRAM + 4 KB backup SRAM |
| Clock System | 3× PLLs (system + 2 kernel), fractional mode; internal 64 MHz HSI, 48 MHz HSI48, 32 kHz LSI; external 4–48 MHz HSE & 32.768 kHz LSE |
| Analog Peripherals | 3× 16-bit ADCs (3.6 MSPS), 2× 12-bit DACs (1 MHz), 2× op-amps (7.3 MHz GBW), 2× ultra-low-power comparators |
| Communication | 2× CAN FD, 2× USB OTG (FS/HS), Ethernet MAC with DMA, 4× USART/UART/LPUART, 4× I²C FM+, 6× SPI (incl. Quad-SPI @ 133 MHz) |
| Security | AES-128/192/256, TDES, HASH (MD5/SHA-1/SHA-2), HMAC, true RNG, ROP/PC-ROP, active tamper detection |
| Low-Power | 2.95 µA Standby (RTC/LSE ON, Backup SRAM OFF); 6 voltage scaling ranges in Run/Stop; VBAT charging capability |
Pinout & Package
LQFP100 (14 × 14 mm, 0.5 mm pitch), ECOPACK2-compliant, with 82 user GPIOs (all interrupt-capable), 10 dedicated power/ground pins, and 10 dedicated supply decoupling pins (VCAP1/VCAP2).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VDDA, VDDIO2 | Main digital/analog I/O supply | 1.62–3.6 V operation; VDDA must be ≥ VDD for analog accuracy; VDDIO2 powers I/O banks 2–5 |
| VCAP1, VCAP2 | Core voltage stabilization | External 2.2 µF ceramic capacitors required per pin to stabilize 1.2 V internal regulator output |
| NRST | Active-low reset input | Asynchronous reset with Schmitt trigger; supports external pull-up and debounced push-button interface |
| BOOT0 | Boot mode selection | High at power-up selects system memory bootloader; low selects user flash; sampled only on reset |
| PA13/PA14 | SWD debug interface | SWDIO and SWCLK pins - no JTAG needed; enables full debug, trace, and programming with minimal 2-pin footprint |
| PD0/PD1 | HSE oscillator inputs | Connect 4–48 MHz crystal or external clock source; internal load capacitors configurable via SYSCFG register |
Key Features
| Feature | Design Value |
|---|---|
| Chrom-ART Accelerator (DMA2D) | Hardware bitmap blending and layer composition offloads CPU in GUI rendering, reducing frame buffer latency by >70% vs software-only |
| Hardware JPEG Codec | Real-time encode/decode up to QVGA@30 fps without CPU involvement - critical for camera-based inspection systems |
| High-Resolution Timer (HRTIM1) | 2.1 ns timing resolution enables <100 ps PWM edge placement accuracy for multi-phase motor control and digital power conversion |
| Dual-domain power management | Independent D1/D2/D3 domain control allows selective shutdown of comms or analog subsystems while preserving RTC and backup SRAM state |
| Flexible external memory controller | Supports SDRAM, PSRAM, NOR, NAND (8/16-bit), and Quad-SPI flash - enabling scalable code/data storage beyond on-chip limits |
Applications
| Industrial Motor Drive Gateway | Secure Edge Node for IIoT |
|---|---|
Use Scenario: Central gateway aggregating fieldbus data (CAN FD, RS-485) from servo drives and feeding time-synchronized telemetry to cloud via Ethernet. IC Role / Device Role / Timing Role: Real-time scheduler and protocol translator with sub-microsecond timer-triggered CAN message scheduling and hardware timestamping on Ethernet RX/TX. Use Value: Eliminates external FPGA or dual-processor architecture; deterministic 480 MHz execution ensures <5 µs jitter on 10 kHz control loops. | Use Scenario: Tamper-resistant sensor node performing local anomaly detection on vibration/temperature streams before encrypted upload. IC Role / Device Role / Timing Role: Secure runtime environment with AES-256 encryption, SHA-2 integrity check, and active tamper detection on enclosure breach or voltage glitch. Use Value: Meets IEC 62443-3-3 SL2 requirements without external secure element; backup SRAM retains keys during brownout. |
| Medical Imaging Front-End | HMI Controller for Industrial Panel PC |
Use Scenario: Ultrasound beamformer front-end digitizing 16-channel analog RF signals at 40 MSPS and applying real-time FIR filtering. IC Role / Device Role / Timing Role: High-throughput data acquisition engine using DFSDM + dual ADCs + MDMA to stream processed samples to external DDR via FMC. Use Value: 3.6 MSPS per ADC channel with hardware sigma-delta decimation avoids CPU bottleneck; 16-bit resolution preserves SNR >72 dB. | Use Scenario: 7-inch TFT-LCD panel running Qt-based UI with touch overlay, video playback, and local logging. IC Role / Device Role / Timing Role: Graphics controller with LTDC driving XGA resolution, Chrom-ART for smooth layer transitions, and JPEG codec for thumbnail generation. Use Value: Reduces external DRAM bandwidth by 40% via DMA2D-accelerated alpha blending; hardware JPEG decode achieves 15 fps for diagnostic image review. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-performance MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32H743VIT6 | 512 KB flash (vs 128 KB), no crypto accelerator block enabled in production config; identical pinout and package (LQFP100) | Requires external secure element for TLS stack; lacks hardware SHA-2/HMAC - unsuitable for zero-touch provisioning | Select when larger flash and external security IC are acceptable; avoid if embedded crypto acceleration is mandatory. |
| NXP i.MX RT1176DVMAA | Arm Cortex-M7 + M4 dual-core; 1 MB SRAM but no TCM partitioning; no integrated Quad-SPI or DFSDM | Higher raw compute but less deterministic real-time control; requires external PMIC and separate display controller | Prefer for asymmetric multiprocessing workloads (e.g., Linux + RTOS coexistence); not drop-in for TCM-sensitive motor control firmware. |
Compared with STM32H743VIT6 and i.MX RT1176DVMAA, the STM32H750XBH6 delivers optimal balance of on-chip security, deterministic timing, and analog integration - making it uniquely suited for resource-constrained, certifiable edge devices where flash size is secondary to cryptographic agility and analog signal chain fidelity.
Availability
STM32H750XBH6 is available at Aetrix Electronics and suitable for industrial motor drives, medical imaging front-ends, and secure IIoT edge nodes requiring stable component supply across extended product lifecycles.
Supply support for STM32H750XBH6 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, designing and manufacturing microcontrollers, power management ICs, sensors, and automotive chips since 1987.
The STM32H7 series targets high-end embedded applications demanding real-time determinism, advanced security, and rich analog/peripheral integration - specifically engineered for industrial automation, medical equipment, and premium consumer HMI platforms.
FAQ
What is the maximum operating frequency and how is it achieved?
The STM32H750XBH6 achieves 480 MHz via its main PLL configured with fractional-N synthesis, fed by the 4–48 MHz HSE or 64 MHz HSI. The core's L1 instruction and data caches (16 KB each) and tightly coupled memories (ITCM/DTCM) eliminate wait states, sustaining 1027 DMIPS at full speed without pipeline stalls.
Does this MCU support external SDRAM, and what interface is used?
Yes - the Flexible Memory Controller (FMC) supports SDRAM and LPDDR SDRAM with up to 32-bit data bus width and synchronous clocking up to 133 MHz. It implements standard SDRAM command sequences (ACTIVATE, READ, WRITE, PRECHARGE) and auto-refresh, enabling direct connection to 64 MB IS42S16400J-6BL or compatible devices.
How does the dual-domain power architecture improve system-level energy efficiency?
The D1/D2/D3 domain separation allows independent clock gating and voltage scaling: D1 (core/peripherals) can run at full 1.2 V while D2 (comms) operates at 1.0 V and D3 (reset/RTC) remains at 0.9 V. This reduces dynamic power by >40% in partial-active modes versus monolithic voltage domains.
Can the hardware JPEG codec process YUV422 video streams in real time?
No - the JPEG codec handles still-image compression/decompression only (baseline JPEG). It supports YUV422 input but requires external preprocessing for video; frame-rate throughput is limited to ~15 fps at QVGA resolution due to internal 32-bit AXI bandwidth constraints.
STM32H750XBH6 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 265-TFBGA
- Series:
- STM32H7
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M7
- Core Size:
- 32-Bit Single-Core
- Speed:
- 480MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, I2C, IrDA, LINbus, MDIO, MMC/SD/SDIO, QSPI, SAI, SPDIF, SPI, SWPMI, UART/USART, USB OTG
- Peripherals:
- Brown-out Detect/Reset, DMA, I2S, LCD, POR, PWM, WDT
- Number of I/O:
- 168
- Program Memory Size:
- 128KB (128K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 1M x 8
- Voltage - Supply (Vcc/Vdd):
- 1.62V ~ 3.6V
- Data Converters:
- A/D 36x16b; D/A 2x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32H750XBH6 FAQ
1.How can I place an order for STM32H750XBH6 through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32H750XBH6 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32H750XBH6 reliable?
The price and inventory of STM32H750XBH6 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32H750XBH6 is usually 5 days.
3.What payment methods are accepted for STM32H750XBH6?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32H750XBH6 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32H750XBH6?
STM32H750XBH6 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32H750XBH6 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32H750XBH6?
For technical support, including STM32H750XBH6 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32H750XBH6 requirements.
6.How does Aetrix verify that STM32H750XBH6 is sourced from the original manufacturer or authorized distributors?
All STM32H750XBH6 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32H750XBH6 meets industry standards.
7.What is the process for return or replacement of STM32H750XBH6?
All STM32H750XBH6 units undergo pre-shipment inspection (PSI). If there is an issue with STM32H750XBH6, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32H750XBH6 part is unused and in its original packaging.
Return procedure for STM32H750XBH6:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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