STMicroelectronics STM32H7A3ZIT6Q
- Part No.:
- STM32H7A3ZIT6Q
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 144-LQFP
- Datasheet:
-
STM32H7A3ZIT6Q.pdf
- Description:
- IC MCU 32BIT 2MB FLASH 144LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:4,046
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
STM32H7A3ZIT6Q from STMicroelectronics is a 32-bit Arm® Cortex®-M7 microcontroller operating at up to 280 MHz with double-precision FPU, 2 Mbytes of flash memory, 192 Kbytes of TCM RAM (64 Kbytes ITCM + 128 Kbytes DTCM), and integrated SMPS regulator. It targets high-performance embedded applications requiring real-time signal processing, graphics acceleration, and multi-interface connectivity - such as industrial HMI, motor control drives, and IoT edge gateways.
For engineers reviewing the STM32H7A3ZIT6Q datasheet, STM32H7A3ZIT6Q pinout, STM32H7A3ZIT6Q application, or STM32H7A3ZIT6Q equivalent, key selection criteria include its dual-bank flash architecture with read-while-write capability, 168 GPIOs with 133 MHz toggle rate, dual ADCs (up to 3.6 MSPS), hardware JPEG codec, and support for Octo-SPI and FMC external memory interfaces.
Technical Context
The STM32H7A3ZIT6Q implements a six-stage dual-issue Cortex-M7 core with Harvard architecture, 16 KB instruction and 16 KB data caches, and tightly coupled memory interfaces for deterministic real-time execution. Its interconnect matrix comprises one AXI and two AHB bus matrices, five DMA controllers (including MDMA), and domain isolation between CPU and Smart Run Domains (SRD) for independent power gating.
It integrates dual Octo-SPI interfaces supporting SRD/DTR modes up to 140/110 MHz, an FMC controller for NOR/PSRAM/SDRAM/NAND, and advanced analog subsystems including two 16-bit ADCs, two operational amplifiers (8 MHz GBW), two ultra-low-power comparators, and DFSDM filters for sigma-delta modulator interfacing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm® Cortex®-M7 @ 280 MHz with double-precision FPU and MPU - enables deterministic DSP-intensive tasks and secure multitasking. |
| Flash Memory | 2 Mbytes dual-bank flash with RWW - allows seamless firmware updates and background program/erase operations. |
| RAM | ~1.4 Mbytes total: 192 KB TCM (64 KB ITCM + 128 KB DTCM), 1.18 MB user SRAM, 4 KB backup SRAM - supports time-critical code/data placement and RTC retention. |
| External Memory Interfaces | 2× Octo-SPI (up to 140 MHz SDR), FMC with 32-bit bus (NOR/PSRAM/SDRAM/NAND) - enables high-bandwidth off-chip storage and display frame buffers. |
| Analog Peripherals | 2× 16-bit ADCs (24 channels, 3.6 MSPS), 2× 12-bit DACs (1 single + 1 dual-channel), 2× op-amps, 2× comparators - supports precision sensor acquisition and closed-loop analog control. |
| Power Management | SMPS step-down converter, LDO with scalable output, VBAT mode (0.8 µA), Stop mode (32 µA) - delivers flexible, ultra-low-power operation across battery and line-powered systems. |
| Communication Interfaces | 2× CAN FD, 1× TT-CAN, 5× USART/UART/LPUART, 6× SPI/I2S, 4× I2C, 2× SDMMC, USB OTG HS/FS, SPDIFRX, SWPMI - enables robust industrial networking and multimedia I/O. |
Pinout & Package
LQFP144 (20 × 20 mm) package with 168 I/Os (164 5-V-tolerant), 1.62–3.6 V supply range, and ECOPACK2 compliance. Pin functions validated per DS13195 Rev 8 (Table 7, page 102).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD/VSS | Core & I/O power/ground | Dual-domain supply pins enabling independent voltage scaling and low-power domain isolation. |
| PA0–PK15 | General-purpose I/O | 168 GPIOs with interrupt capability, 133 MHz toggle rate, and 5-V tolerance on 164 pins - suitable for high-speed digital interfacing and legacy bus compatibility. |
| PC13–PC15 | RTC/LSE interface | Dedicated pins for 32.768 kHz crystal and RTC backup domain - ensures sub-second calendar accuracy during Standby/VBAT modes. |
| PF0–PF15 | FMC address/data bus | Configurable 32-bit FMC interface supporting NOR, PSRAM, SDRAM, and NAND - enables expansion of memory-mapped peripherals and display controllers. |
| PE2–PE7 | Octo-SPI1 signals | Dedicated OCTOSPIM_P1 pins for high-speed serial PSRAM/HyperRAM interfacing at up to 140 MHz in SDR mode. |
| PD0–PD15 | Octo-SPI2 signals | Muxed OCTOSPIM_P2 interface supporting DTR mode up to 110 MHz - provides second high-bandwidth memory channel for parallel firmware/data partitioning. |
Key Features
| Feature | Design Value |
|---|---|
| Chrom-ART Accelerator (DMA2D) | Hardware 2D graphics engine offloading CPU for GUI rendering - reduces CPU load by >70% in XGA-resolution LCD-TFT applications. |
| Hardware JPEG Codec | Real-time compression/decompression of JPEG images up to 1080p - eliminates need for external codecs in vision-based HMI and surveillance edge nodes. |
| Smart Run Domain (SRD) | Independent clock/power domain for RTC, backup SRAM, LSE, and selected peripherals - enables full system suspend while retaining critical state at 2.8 µA. |
| DFSDM with 8+1 filters | Dual digital filter for sigma-delta modulators (8-channel DFSDM1 + 2-channel DFSDM2) - supports high-resolution current/voltage sensing in motor drives and energy meters. |
| USB OTG HS with ULPI | High-speed USB 2.0 interface with ULPI PHY support - enables direct connection to external USB PHYs for host/device roles without external transceivers. |
Applications
| Industrial HMI | Motor Control Drive |
|---|---|
|
Use Scenario: Touch-enabled factory operator panel with real-time diagnostics and graphical trend visualization. IC Role / Device Role / Timing Role: Main application processor executing FreeRTOS, driving LCD-TFT via LTDC, managing touch over I2C, and logging data to external HyperRAM via Octo-SPI. Use Value: Chrom-ART and JPEG codec enable smooth GUI rendering and image-based alarm reporting; 280 MHz M7 core handles concurrent EtherCAT stack and UI thread with <5 µs interrupt latency. |
Use Scenario: Three-phase PMSM drive with field-oriented control, current sensing, and safety monitoring. IC Role / Device Role / Timing Role: Real-time controller running FOC algorithm at 20 kHz PWM, sampling dual ADCs synchronously, and communicating via CAN FD to master PLC. Use Value: Dual 16-bit ADCs (3.6 MSPS) capture phase currents with <10 ns timing alignment; advanced timers with dead-time insertion ensure precise gate driver control. |
| Medical Edge Gateway | Smart Building HVAC Controller |
|
Use Scenario: Wireless gateway aggregating data from multiple patient monitors and transmitting encrypted telemetry to cloud platform. IC Role / Device Role / Timing Role: Secure application host with TLS offload, sensor fusion (ADC + temperature sensors), and dual-band wireless coexistence via USB + UART. Use Value: Hardware RNG and ROP/PC-ROP enforce secure boot and firmware integrity; 1.18 MB SRAM buffers multi-sensor streams before encryption and transmission. |
Use Scenario: Networked HVAC controller managing zone dampers, CO₂ sensors, and variable-speed fans in commercial buildings. IC Role / Device Role / Timing Role: Central control unit interfacing with Modbus RTU over RS-485, reading analog environmental sensors, and driving PWM fan actuators. Use Value: 168 GPIOs support mixed-signal I/O expansion; SMPS regulator improves efficiency over linear regulators in 24 V DC-powered installations. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-performance Arm Cortex-M7 microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32H7B3ZIT6 | Same pinout and peripheral set, but adds 1 MB of additional on-chip SRAM (total 2.4 MB) and removes SMPS - requires external DC-DC for core voltage regulation. | Preferred where deterministic large-buffer audio/video streaming is required without SMPS design complexity. | Select when higher SRAM bandwidth is prioritized over integrated power conversion. |
| STM32H743ZIT6 | Higher flash (2 MB vs same), identical RAM, but lacks SMPS and includes Ethernet MAC - larger die size and higher static power consumption. | Suitable for wired industrial gateways needing 10/100 Ethernet, not battery or space-constrained edge nodes. | Choose only if Ethernet PHY integration is mandatory and SMPS efficiency is secondary. |
Compared with STM32H7B3ZIT6 and STM32H743ZIT6, the STM32H7A3ZIT6Q uniquely combines integrated SMPS, full Octo-SPI/FMC support, and 280 MHz performance in LQFP144 - making it optimal for cost-sensitive, power-aware embedded systems requiring external memory expansion without external PMIC overhead.
Availability
STM32H7A3ZIT6Q is available at Aetrix Electronics and suitable for industrial HMI, motor control drives, medical edge gateways, and smart building HVAC controllers requiring stable component supply across extended product lifecycles.
Supply support for STM32H7A3ZIT6Q includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and analog devices for industrial, automotive, and consumer markets.
The STM32H7 series targets high-end embedded applications demanding real-time performance, graphics acceleration, and heterogeneous peripheral integration - with the H7A3 variant optimized for cost-effective, power-efficient designs leveraging integrated SMPS and compact LQFP packaging.
FAQ
What is the maximum operating frequency and supported voltage range for STM32H7A3ZIT6Q?
The STM32H7A3ZIT6Q operates at up to 280 MHz with a supply voltage range of 1.62 V to 3.6 V. At voltages below 2.7 V, the I/O high-speed low-voltage (HSLV) feature must be enabled for full-speed GPIO operation. The embedded SMPS regulator supports direct VCORE supply down to 0.63 V, enabling dynamic voltage scaling for power optimization.
Does STM32H7A3ZIT6Q support hardware encryption or secure boot features?
Yes - it includes Read-Out Protection (ROP), PC-ROP (Program Counter Read-Out Protection), active tamper detection with dedicated pins, and secure firmware upgrade support. These features enable secure boot chain enforcement and runtime protection against physical and software attacks, compliant with IEC 62443-3-3 requirements for industrial security.
How many Octo-SPI interfaces does STM32H7A3ZIT6Q provide, and what are their speed limits?
The device integrates two Octo-SPI interfaces: OCTOSPI1 and OCTOSPI2. In Single Data Rate (SDR) mode, both support up to 140 MHz; in Double Data Rate (DTR) mode, maximum speed is 110 MHz. Both operate in muxed mode and support serial PSRAM, NOR flash, HyperRAM, and Hyperflash with configurable latency and wrap modes.
Can STM32H7A3ZIT6Q drive an RGB LCD-TFT display directly, and what resolution is supported?
Yes - it includes a dedicated LCD-TFT controller (LTDC) supporting up to XGA resolution (1024 × 768) with 24-bit RGB interface. The controller supports programmable pixel clock, horizontal/vertical synchronization, and alpha blending. Combined with Chrom-ART Accelerator (DMA2D), it enables efficient GUI composition without CPU intervention.
STM32H7A3ZIT6Q Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 144-LQFP
- Series:
- STM32H7
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M7
- Core Size:
- 32-Bit Single-Core
- Speed:
- 280MHz
- Connectivity:
- CANbus, EBI/EMI, HDMI-CEC, I2C, IrDA, LINbus, MDIO, MMC/SD/SDIO, SAI, SPDIF, SPI, SWPMI, UART/USART, USB OTG
- Peripherals:
- Brown-out Detect/Reset, DMA, I2S, LCD, POR, PWM, WDT
- Number of I/O:
- 112
- Program Memory Size:
- 2MB (2M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 1.4M x 8
- Voltage - Supply (Vcc/Vdd):
- 1.62V ~ 3.6V
- Data Converters:
- A/D 20x16b; D/A 3x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32H7A3ZIT6Q FAQ
1.How can I place an order for STM32H7A3ZIT6Q through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32H7A3ZIT6Q on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32H7A3ZIT6Q reliable?
The price and inventory of STM32H7A3ZIT6Q are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32H7A3ZIT6Q is usually 5 days.
3.What payment methods are accepted for STM32H7A3ZIT6Q?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32H7A3ZIT6Q transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32H7A3ZIT6Q?
STM32H7A3ZIT6Q orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32H7A3ZIT6Q order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32H7A3ZIT6Q?
For technical support, including STM32H7A3ZIT6Q datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32H7A3ZIT6Q requirements.
6.How does Aetrix verify that STM32H7A3ZIT6Q is sourced from the original manufacturer or authorized distributors?
All STM32H7A3ZIT6Q products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32H7A3ZIT6Q meets industry standards.
7.What is the process for return or replacement of STM32H7A3ZIT6Q?
All STM32H7A3ZIT6Q units undergo pre-shipment inspection (PSI). If there is an issue with STM32H7A3ZIT6Q, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32H7A3ZIT6Q part is unused and in its original packaging.
Return procedure for STM32H7A3ZIT6Q:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
STM32H7A3ZIT6Q Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

