STMicroelectronics STM32H7B0IBK6Q
- Part No.:
- STM32H7B0IBK6Q
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 201-UFBGA
- Datasheet:
-
STM32H7B0IBK6Q.pdf
- Description:
- IC MCU 32BIT 128KB FLSH 176UFBGA
- Quantity:
- Payment:

- Shipping:

Inventory:1,456
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
STM32H7B0IBK6Q from STMicroelectronics is a 32-bit Arm® Cortex®-M7 microcontroller operating at up to 280 MHz, featuring double-precision FPU, 16 KB instruction and 16 KB data cache, 128 KB flash, and ~1.4 MB RAM (including 64 KB ITCM + 128 KB DTCM). It integrates dual Octo-SPI interfaces with on-the-fly AES-128 decryption, FMC for SDRAM/NAND/NOR, and SMPS support - deployed in industrial motor control and real-time vision systems.
For engineers reviewing the STM32H7B0IBK6Q datasheet, STM32H7B0IBK6Q pinout, STM32H7B0IBK6Q application, or STM32H7B0IBK6Q equivalent, key selection criteria include TCM RAM allocation for deterministic code execution, Octo-SPI DTR mode timing (up to 110 MHz), SMPS integration for power efficiency, and dual CAN FD + TT-CAN for automotive networked control.
Technical Context
The device implements a six-stage dual-issue Cortex-M7 core with Harvard architecture, dynamic branch prediction, and AXI/TCM/AXI-Lite interconnects enabling concurrent high-bandwidth memory access. Its L1 cache fills one line per access from 128-bit flash, reducing instruction fetch latency.
Memory subsystem includes three independent domains: CPU domain (CD) with full clock gating, Smart Run Domain (SRD) hosting RTC, backup SRAM, DAC, and DFSDM2, and AXI/AHB bus matrices supporting simultaneous flash, SRAM, and peripheral access at 280 MHz.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm® Cortex®-M7 @ 280 MHz with double-precision FPU and MPU - enables real-time deterministic control with IEEE 754-compliant math and memory isolation. |
| Flash / RAM | 128 KB flash + 1 KB OTP; 192 KB TCM RAM (64 KB ITCM + 128 KB DTCM) + 1.18 MB user SRAM - TCM provides zero-wait-state execution for time-critical ISR and DSP routines. |
| Octo-SPI | 2x interfaces supporting SDR up to 140 MHz and DTR up to 110 MHz with on-the-fly AES-128 CTR decryption - enables secure, high-speed external HyperRAM/PSRAM boot and runtime execution. |
| FMC Support | Flexible external memory controller with 32-bit bus: NOR/PSRAM/SRAM up to 125 MHz sync, SDRAM/LPSDR, 8/16-bit NAND - allows direct interface to legacy industrial displays and memory-mapped peripherals. |
| Power Modes | Stop mode @ 32 µA (full RAM retention); Standby @ 2.8 µA (RTC+LSE active); VBAT @ 0.8 µA - supports battery-backed operation in alarm panels and portable medical sensors. |
| Peripherals | 2× ADC (16-bit, 24 ch, 3.6 MSPS), 2× DAC (12-bit, 1 single + 1 dual), 2× OPAMP (8 MHz GBW), 2× ultra-low-power comparators - enables analog sensor fusion and closed-loop actuator control without external signal chain. |
| Crypto & Security | AES-128/192/256 (ECB/CBC/CTR/GCM/CCM), HASH (MD5/SHA-1/SHA-2), HMAC, 2× OTFDEC, NIST SP 800-90B TRNG - meets IEC 62443-3-3 SL2 requirements for firmware integrity and secure boot. |
Pinout & Package
STM32H7B0IBK6Q is housed in a UFBGA176+25 package (10 × 10 mm, 0.8 mm pitch), with 138 GPIOs (164 5-V-tolerant), 2 tamper pins (1 active, 1 passive), and dedicated power domains (VCORE, VDDMMC, VDDUSB, VBAT).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VSS | Core power supply and ground | Supports 1.62–3.6 V operation; VCORE supplied via internal SMPS or LDO - enables direct buck conversion from 5 V or 3.3 V input. |
| VDDA, VSSA | Analog power and ground | Independent 1.62–3.6 V analog domain with internal voltage reference buffer - ensures stable ADC/DAC performance across supply variation. |
| BOOT0 | Boot mode selection | High at reset selects system memory bootloader (USART/I2C/SPI/USB-DFU/FDCAN) - enables field firmware recovery without debug probe. |
| NRESET | Active-low reset input | Asynchronous reset with internal pull-up; accepts external supervisor assertion - guarantees clean state initialization after brownout or watchdog timeout. |
| OCTOSPIM_P1[7:0] | Octo-SPI master interface | Dual-byte-wide DQ lines supporting x8/x4/x1 protocols in SDR/DTR modes - delivers up to 1.76 GB/s effective bandwidth to external HyperRAM. |
| FMC_D[15:0] | Flexible memory controller data bus | 16-bit bidirectional data path for NOR/PSRAM/SRAM/SDRAM/NAND - enables direct connection to 16-bit LCD controllers or FPGA co-processors. |
| PA0–PI15 | General-purpose I/O | 138 total GPIOs with interrupt capability; fast I/Os rated up to 133 MHz - supports high-speed SPI slave, encoder quadrature, or PWM capture in motor drives. |
Key Features
| Feature | Design Value |
|---|---|
| TCM RAM architecture | 64 KB ITCM + 128 KB DTCM enables lock-step execution of safety-critical code with guaranteed latency and no cache misses. |
| Dual Octo-SPI with OTFDEC | Two independent encrypted serial memory interfaces allow secure boot from one and runtime code/data fetch from another - eliminates need for external crypto ICs. |
| SMPS integrated regulator | On-chip step-down converter directly supplies VCORE from 3.3 V or 5 V input - reduces BOM count and improves efficiency over discrete LDO solutions. |
| DFSDM with 8-channel filter | Digital sigma-delta modulator interface supports 8 external ΣΔ sensors (e.g., current shunt, pressure) with hardware decimation - replaces external ASICs in precision measurement systems. |
| Chrom-ART Accelerator (DMA2D) | Hardware 2D graphics engine offloads CPU for GUI rendering, image blending, and pixel format conversion - cuts display update latency by >90% vs software-only rendering. |
Applications
| Industrial Motor Control | Medical Imaging Sensor Hub |
|---|---|
Use Scenario: High-speed PMSM/BLDC servo drive with field-oriented control (FOC), real-time current sensing, and EtherCAT communication. IC Role / Device Role / Timing Role: Primary MCU executing FOC loop at 20 kHz, managing dual 16-bit ADC sampling synchronized to PWM, and running EtherCAT stack in SRD domain. Use Value: 280 MHz M7 core + 128 KB DTCM enables sub-1 µs interrupt latency; dual Octo-SPI interfaces load waveform tables from encrypted PSRAM during motion profiling. | Use Scenario: Portable ultrasound front-end aggregating 8-channel analog beamformer data from ΣΔ ADCs and compressing frames via JPEG codec. IC Role / Device Role / Timing Role: Central sensor hub performing real-time DFSDM filtering, FFT-based beamforming, and hardware JPEG compression before wireless transmission. Use Value: Integrated DFSDM (8 filters) eliminates external digital filter ASIC; JPEG codec reduces frame size by 85% while freeing 92% CPU cycles for AI inference. |
| Smart Building HVAC Controller | Automotive Body Control Module |
Use Scenario: Networked HVAC node managing temperature, humidity, CO₂, and airflow with BACnet/IP and local HMI. IC Role / Device Role / Timing Role: Main controller running FreeRTOS, driving LCD-TFT display via LTDC, handling multiple I2C/SPI sensors, and managing USB-CDC diagnostics. Use Value: LCD-TFT controller + Chrom-ART accelerator renders responsive GUI at 60 fps; 138 GPIOs support direct relay/valve driver interface without level shifters. | Use Scenario: Zone controller managing door locks, lighting, seat position, and CAN FD diagnostics in electric vehicle cabin. IC Role / Device Role / Timing Role: Safety-aware BCM executing ASIL-B diagnostics, managing dual CAN FD buses (body + infotainment), and monitoring tamper events via active/passive pins. Use Value: Dual CAN FD (5 Mbps) + TT-CAN supports time-triggered diagnostics; active tamper detection triggers immediate secure erase of stored keys upon enclosure breach. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-performance Cortex-M7 microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32H743VIT6 | 2048 KB flash, 1 MB RAM, no SMPS, LQFP100 package, lacks OTFDEC2 and DFSDM2 | Targeted at GUI-rich applications requiring large code footprint but no embedded power conversion or dual encrypted serial memory | Select when larger flash and external DC-DC are acceptable, and dual Octo-SPI security is not required. |
| STM32H750VBH6 | 128 KB flash, 1 MB RAM, no SMPS, UFBGA100, lacks FMC and second Octo-SPI | Suitable for compact, cost-sensitive designs needing crypto acceleration and JPEG but no external SDRAM or dual serial memory expansion | Choose for space-constrained BOMs where FMC and second Octo-SPI are unnecessary and external SMPS is preferred. |
Compared with STM32H743VIT6 and STM32H750VBH6, the STM32H7B0IBK6Q uniquely combines integrated SMPS, dual OTFDEC-enabled Octo-SPI, and FMC - making it optimal for battery-powered industrial edge nodes requiring secure external memory and efficient power conversion in minimal PCB area.
Availability
STM32H7B0IBK6Q is available at Aetrix Electronics and suitable for industrial motor control, portable medical imaging, smart building HVAC, and automotive body electronics requiring stable component supply across multi-year production cycles.
Supply support for STM32H7B0IBK6Q includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and analog devices for industrial, automotive, and consumer markets.
The STM32H7 series targets high-end embedded applications demanding real-time determinism, cryptographic security, and rich multimedia capabilities - with the H7B0 variant optimized for cost-sensitive, power-efficient edge nodes requiring SMPS and dual encrypted serial memory interfaces.
FAQ
What is the maximum operating frequency and how is it achieved?
The STM32H7B0IBK6Q achieves 280 MHz via its Arm Cortex-M7 core with six-stage dual-issue pipeline and dynamic branch prediction. This frequency requires VCORE supplied at 1.2 V (VOS1 range) using either the integrated SMPS or external LDO, with all clocks derived from PLL1 configured for 280 MHz system clock and proper wait states applied to flash and TCM accesses.
Does this MCU support secure boot and firmware updates?
Yes. It supports secure firmware upgrade via ROP/PC-ROP, active tamper detection, Secure Access Mode, and on-the-fly decryption of external Octo-SPI memory using two independent AES-128 OTFDEC units. The embedded 1 KB OTP stores root keys, and the TRNG provides entropy for signature generation during signed firmware validation.
How does the SMPS integration reduce system power consumption?
The integrated SMPS step-down converter replaces an external DC-DC IC, achieving >90% efficiency when stepping 5 V or 3.3 V down to 1.2 V for VCORE. In Stop mode, it can be disabled while retaining LDO operation, contributing to the 32 µA total current draw with full RAM retention - critical for battery-backed industrial controllers.
Can both Octo-SPI interfaces operate simultaneously with different memory types?
Yes. OCTOSPI1 and OCTOSPI2 are fully independent, each supporting SDR/DTR modes up to 140/110 MHz respectively. They can concurrently drive different memory types - e.g., OCTOSPI1 for encrypted HyperRAM used as frame buffer, OCTOSPI2 for secure boot from encrypted NOR flash - with separate OTFDEC engines and clock domains.
STM32H7B0IBK6Q Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 201-UFBGA
- Series:
- STM32H7
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M7
- Core Size:
- 32-Bit Single-Core
- Speed:
- 280MHz
- Connectivity:
- Camera, CANbus, EBI/EMI, HDMI-CEC, I2C, IrDA, LINbus, MDIO, MMC/SD/SDIO, PSSI, SAI, SPDIF, SPI, SWPMI, UART/USART, USB OTG
- Peripherals:
- Brown-out Detect/Reset, DMA, I2S, LCD, POR, PWM, WDT
- Number of I/O:
- 128
- Program Memory Size:
- 128KB (128K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 1.4M x 8
- Voltage - Supply (Vcc/Vdd):
- 1.62V ~ 3.6V
- Data Converters:
- A/D 24x16b; D/A 3x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32H7B0IBK6Q FAQ
1.How can I place an order for STM32H7B0IBK6Q through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32H7B0IBK6Q on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32H7B0IBK6Q reliable?
The price and inventory of STM32H7B0IBK6Q are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32H7B0IBK6Q is usually 5 days.
3.What payment methods are accepted for STM32H7B0IBK6Q?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32H7B0IBK6Q transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32H7B0IBK6Q?
STM32H7B0IBK6Q orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32H7B0IBK6Q order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32H7B0IBK6Q?
For technical support, including STM32H7B0IBK6Q datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32H7B0IBK6Q requirements.
6.How does Aetrix verify that STM32H7B0IBK6Q is sourced from the original manufacturer or authorized distributors?
All STM32H7B0IBK6Q products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32H7B0IBK6Q meets industry standards.
7.What is the process for return or replacement of STM32H7B0IBK6Q?
All STM32H7B0IBK6Q units undergo pre-shipment inspection (PSI). If there is an issue with STM32H7B0IBK6Q, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32H7B0IBK6Q part is unused and in its original packaging.
Return procedure for STM32H7B0IBK6Q:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
STM32H7B0IBK6Q Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

