STMicroelectronics STM32L011F4P6TR
- Part No.:
- STM32L011F4P6TR
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 20-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
STM32L011F4P6TR.pdf
- Description:
- IC MCU 32BIT 16KB FLASH 20TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:364
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
STM32L011F4P6TR from STMicroelectronics is an ultra-low-power 32-bit Arm® Cortex®-M0+ microcontroller in TSSOP20 package, featuring 16 KB Flash, 2 KB SRAM, 512 B EEPROM with ECC, 12-bit ADC (1.14 Msps), and dual ultra-low-power comparators. It operates from 1.65–3.6 V across –40 to +125 °C and delivers 0.54 µA Stop mode + RTC with 2 KB RAM retention-ideal for battery-powered sensor nodes and smart metering endpoints.
For engineers reviewing the STM32L011F4P6TR datasheet, STM32L011F4P6TR pinout, STM32L011F4P6TR application, or STM32L011F4P6TR equivalent, key selection criteria include standby current (0.23 µA), wakeup time (5 µs from Flash), 23 I/Os (20 of which are 5V-tolerant), and integrated EEPROM with error correction for firmware parameter storage in field-deployed devices.
Technical Context
The STM32L011F4P6TR implements a single-core Arm Cortex-M0+ running at up to 32 MHz with 0.95 DMIPS/MHz performance and dynamic voltage scaling support. Its clock system integrates factory-trimmed 16 MHz HSI (±1%), 37 kHz LSI, 65 kHz–4.2 MHz MSI, 32 kHz LSE for RTC calibration, and a PLL for CPU clock multiplication.
Power architecture includes five selectable brownout reset (BOR) thresholds, programmable voltage detector (PVD), and three low-power modes: Standby (0.23 µA), Stop (0.29 µA), and Stop+RTC+RAM retention (0.54 µA). Analog subsystem comprises one 12-bit ADC with 10-channel multiplexing down to 1.65 V supply and two comparators with window mode and wake-up capability.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core | Arm Cortex-M0+, 32-bit, up to 32 MHz - enables deterministic real-time control with minimal power overhead. |
| Memory | 16 KB Flash (ECC), 2 KB SRAM, 512 B EEPROM (ECC) - supports robust firmware updates and nonvolatile parameter storage without external components. |
| ADC | 12-bit, 1.14 Msps, 10-channel - provides high-resolution sensor acquisition at sub-1 µs conversion intervals for fast analog monitoring. |
| Low-power modes | Standby: 0.23 µA (2 wakeup pins); Stop: 0.29 µA (16 wakeup lines); Stop+RTC+2KB RAM: 0.54 µA - extends coin-cell battery life to >10 years in periodic-sensing applications. |
| Wakeup time | 5 µs from Flash memory - ensures rapid response to external events without sacrificing energy efficiency. |
| I/O capability | 20 I/Os 5V-tolerant, 3x 5V-tolerant analog inputs - simplifies interface with legacy 5V sensors and logic without level-shifting circuitry. |
| Clock sources | HSI16 (±1%), LSE (32 kHz RTC), MSI (65 kHz–4.2 MHz), PLL - enables precise timing and flexible frequency synthesis for mixed-signal operation. |
Pinout & Package
TSSOP20 (20-lead, 5 × 4.4 mm, 0.65 mm pitch) package compliant with ECOPACK®2 environmental standard. RoHS-compliant, halogen-free, and qualified for industrial temperature range (–40 to +125 °C).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD | Power supply | Main 1.65–3.6 V supply rail; decoupling required per datasheet layout guidelines. |
| VSS | Ground reference | Digital ground plane connection; separate analog ground not required due to integrated design. |
| NRST | Reset input | Active-low reset with internal pull-up; accepts 5V-tolerant signals for compatibility with external supervisors. |
| PA0–PA9 | General-purpose I/O | 20 GPIOs total; PA0–PA9 plus PB0–PB3 mapped to TSSOP20 pins; 23 support 5V tolerance (20 on this variant). |
| PA1 | ADC_IN1 / COMP1_OUT | Analog input channel 1 and comparator 1 output - enables direct sensor-to-ADC routing and hardware-triggered wake-up. |
| PA4 | ADC_IN4 / SPI1_NSS | Shared ADC input and SPI slave select - allows simultaneous analog sensing and peripheral communication control. |
| PA10 | USART1_TX | Asynchronous transmit line supporting ISO 7816 and IrDA protocols - suitable for secure element interfacing and IR remote diagnostics. |
| PA13/PA14 | SWDIO/SWCLK | Serial Wire Debug interface - enables full debug, flash programming, and real-time trace without dedicated JTAG pins. |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low-power BOR | 5 selectable thresholds (1.6–2.5 V) - prevents erratic operation during battery voltage sag while minimizing false resets. |
| ECC-protected memories | Flash and EEPROM with error correction - eliminates need for external CRC checks or redundant storage in safety-critical firmware updates. |
| Integrated RTC with calibration | 32 kHz LSE oscillator with ±1 ppm accuracy after calibration - sustains accurate timekeeping over temperature and aging without external crystal trimming. |
| Dual ultra-low-power comparators | Operate down to 1.65 V with window mode and wake-up capability - replaces discrete comparator circuits in threshold-detection systems like smoke alarms or battery SOC monitors. |
| Pre-programmed bootloader | Supports USART and SPI interfaces - enables field firmware upgrades without debugger hardware, reducing service cost and downtime. |
Applications
| Smart Utility Metering | Wireless Sensor Node |
|---|---|
Use Scenario: Battery-powered gas/water meter with hourly pressure/flow sampling and LoRaWAN transmission every 12 hours. IC Role / Device Role / Timing Role: Primary MCU managing sensor acquisition, RTC-based scheduling, low-power radio control, and EEPROM-stored calibration data. Use Value: 0.23 µA standby current extends CR2450 battery life beyond 12 years; 5 µs wakeup ensures prompt response to tamper detection interrupts. | Use Scenario: Indoor air quality monitor using CO₂, VOC, and humidity sensors, transmitting via BLE only on significant change. IC Role / Device Role / Timing Role: Central controller executing sensor fusion, adaptive sampling, and event-driven BLE advertising. Use Value: Dual comparators trigger wake-up on analog threshold breach (e.g., CO₂ > 1000 ppm), avoiding continuous ADC polling and saving >70% active time. |
| Industrial Predictive Maintenance | Medical Wearable Patch |
Use Scenario: Vibration sensor node on motor housing capturing FFT windows every 5 minutes, storing peak amplitude in EEPROM. IC Role / Device Role / Timing Role: Signal acquisition engine with 12-bit ADC oversampling, timer-triggered DMA transfers, and RTC-gated processing bursts. Use Value: 1.14 Msps ADC resolution enables 12-bit effective noise floor at 10 ksps; ECC EEPROM guarantees integrity of stored fault signatures over 10+ year deployments. | Use Scenario: ECG patch recording 250 Hz biopotential data for 72-hour continuous monitoring on single coin cell. IC Role / Device Role / Timing Role: Low-noise analog front-end controller with ADC, comparator-based R-peak detection, and flash-resident compression algorithm. Use Value: 0.54 µA Stop+RTC+2KB RAM mode preserves context during sleep between heartbeat intervals; 5V-tolerant I/O simplifies connection to analog front-end op-amps. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ultra-low-power microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32L031F4P6TR | Same core and peripherals but adds 1x USB 2.0 FS device interface and 1x additional 16-bit timer. | Required where host-controlled firmware updates or USB-CDC virtual COM port diagnostics are needed. | Select when USB connectivity justifies added BOM cost and PCB layout complexity. |
| EFM32ZG222F32 | ARM Cortex-M0+, 32 KB Flash, 4 KB RAM, lower typical Stop current (0.18 µA), no integrated EEPROM. | Suitable for applications needing longer battery life but requiring external NV memory for configuration storage. | Choose when maximum standby efficiency outweighs EEPROM convenience and ecosystem tooling maturity. |
Compared with STM32L011F4P6TR, STM32L031F4P6TR adds USB functionality at higher power and cost, while EFM32ZG222F32 achieves lower standby current but lacks on-chip EEPROM-making STM32L011F4P6TR optimal for cost-sensitive, self-contained, field-upgradable embedded sensors.
Availability
STM32L011F4P6TR is available at Aetrix Electronics and suitable for smart utility metering, wireless sensor nodes, industrial predictive maintenance, and medical wearable patches requiring stable component supply across extended product lifecycles.
Supply support for STM32L011F4P6TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power ICs, MEMS, and automotive semiconductors since 1987.
The STM32L0 Access line targets ultra-low-power embedded applications demanding long battery life, robust memory integrity, and industrial-grade reliability-optimized for sensor edge nodes, metering, and portable medical devices.
FAQ
What is the maximum operating frequency and core type of the STM32L011F4P6TR?
The STM32L011F4P6TR features an Arm Cortex-M0+ core rated for up to 32 MHz operation with 0.95 DMIPS/MHz performance. It supports dynamic voltage scaling to maintain efficiency across supply voltages from 1.65 V to 3.6 V, and its clock tree includes factory-trimmed 16 MHz HSI (±1%), 32 kHz LSE for RTC, and a PLL for frequency multiplication-enabling precise timing control in battery-constrained environments.
Does the STM32L011F4P6TR support hardware error correction for memory?
Yes, the STM32L011F4P6TR integrates ECC (Error Correction Code) protection for both its 16 KB Flash memory and 512 B data EEPROM. This ensures bit-error resilience during program execution and nonvolatile data storage-critical for firmware updates and calibration parameter retention in unattended field deployments without external memory controllers or software CRC layers.
How many I/O pins are 5V-tolerant, and what is their functional significance?
20 of the 23 GPIOs on the STM32L011F4P6TR are 5V-tolerant, including all analog input channels used by the 12-bit ADC. This eliminates the need for external level shifters when interfacing with legacy 5V sensors, industrial logic, or analog front-end ICs-reducing BOM count, PCB area, and signal integrity risk in mixed-voltage systems such as smart meters and industrial transmitters.
What low-power modes does the STM32L011F4P6TR offer, and how do they differ in current consumption?
The STM32L011F4P6TR offers Standby (0.23 µA, 2 wakeup pins), Stop (0.29 µA, 16 wakeup lines), and Stop+RTC+2 KB RAM retention (0.54 µA). All modes retain register content and support fast wakeup (5 µs from Flash). The RTC remains active in Stop+RTC mode, enabling calendar-based wakeups, while Standby disables all clocks except the 32 kHz LSE-making it ideal for infrequent, time-agnostic events like manual button press or external interrupt.
STM32L011F4P6TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 20-TSSOP (0.173", 4.40mm Width)
- Series:
- STM32L0
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M0+
- Core Size:
- 32-Bit Single-Core
- Speed:
- 32MHz
- Connectivity:
- I2C, IrDA, SPI, UART/USART
- Peripherals:
- Brown-out Detect/Reset, DMA, POR, PWM, WDT
- Number of I/O:
- 16
- Program Memory Size:
- 16KB (16K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 512 x 8
- RAM Size:
- 2K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.65V ~ 3.6V
- Data Converters:
- A/D 9x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32L011F4P6TR FAQ
1.How can I place an order for STM32L011F4P6TR through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32L011F4P6TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32L011F4P6TR reliable?
The price and inventory of STM32L011F4P6TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32L011F4P6TR is usually 5 days.
3.What payment methods are accepted for STM32L011F4P6TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32L011F4P6TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32L011F4P6TR?
STM32L011F4P6TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32L011F4P6TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32L011F4P6TR?
For technical support, including STM32L011F4P6TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32L011F4P6TR requirements.
6.How does Aetrix verify that STM32L011F4P6TR is sourced from the original manufacturer or authorized distributors?
All STM32L011F4P6TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32L011F4P6TR meets industry standards.
7.What is the process for return or replacement of STM32L011F4P6TR?
All STM32L011F4P6TR units undergo pre-shipment inspection (PSI). If there is an issue with STM32L011F4P6TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32L011F4P6TR part is unused and in its original packaging.
Return procedure for STM32L011F4P6TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
STM32L011F4P6TR Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

