STMicroelectronics STM32L4S5ZIT6
- Part No.:
- STM32L4S5ZIT6
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 144-LQFP
- Datasheet:
-
STM32L4S5ZIT6.pdf
- Description:
- IC MCU 32BIT 2MB FLASH 144LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:1,299
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
STM32L4S5ZIT6 from STMicroelectronics is an ultra-low-power Arm® Cortex®-M4 32-bit MCU with FPU, 120 MHz max frequency, 2 MB Flash, 640 KB SRAM, and integrated MIPI DSI host controller + LCD-TFT controller. It delivers 150 DMIPS and supports advanced graphics acceleration via Chrom-ART (DMA2D) and Chrom-GRC (GFXMMU), targeting battery-powered HMI displays in industrial and medical edge devices.
For engineers reviewing the STM32L4S5ZIT6 datasheet, STM32L4S5ZIT6 pinout, STM32L4S5ZIT6 application, or STM32L4S5ZIT6 equivalent, key selection criteria include ultra-low-power operation down to 33 nA (Shutdown), hardware AES+HASH encryption, dual-bank read-while-write Flash, 12-bit ADC at 5 Msps, and MIPI DSI lane support up to 500 Mbit/s per lane for embedded display interfaces.
Technical Context
This MCU integrates an adaptive real-time accelerator (ART Accelerator) enabling zero-wait-state execution from Flash at 120 MHz, and features a multi-AHB interconnect matrix supporting concurrent access to Flash, SRAM, and peripherals. Its power architecture includes five low-power modes-Shutdown (33 nA), Standby (125 nA), Stop 2 with RTC (2.8 μA), and Run mode at 110 μA/MHz-with brownout reset active in all modes except Shutdown.
The device embeds dual Octo-SPI interfaces, external memory interface (FSMC) for NOR/PSRAM/NAND/FRAM, and dedicated graphics subsystems: LTDC controller, DSI Host with two lanes, Chrom-ART DMA2D for 2D composition, and Chrom-GRC (GFXMMU) for memory-mapped graphic resource optimization-enabling efficient rendering on TFT panels up to WXGA resolution.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core | Arm Cortex-M4 with FPU, 120 MHz max, 150 DMIPS, MPU, DSP instructions |
| Memory | 2 MB dual-bank Flash (read-while-write), 640 KB SRAM (64 KB with parity) |
| Power Consumption | 33 nA Shutdown mode; 2.8 μA Stop 2 with RTC; 110 μA/MHz Run mode |
| Graphics Interface | MIPI DSI Host (2 lanes @ 500 Mbit/s each) + LCD-TFT controller (LTDC) |
| Analog Peripherals | 12-bit ADC @ 5 Msps (16-bit oversampled), 2× DAC, 2× OPAMP, 2× comparator |
| Crypto Acceleration | AES-128/256 + HASH (SHA-256) hardware engines |
| Package | UFBGA144 (10 × 10 mm, 0.5 mm pitch) |
Pinout & Package
STM32L4S5ZIT6 is housed in a 144-ball UFBGA package (10 × 10 mm, 0.5 mm ball pitch), optimized for high-density PCB layouts and thermal performance in compact HMI designs. The package supports 136 fast I/Os (most 5 V-tolerant) and independent I/O supply (down to 1.08 V) for mixed-voltage interfacing.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VDDA, VDDIO2 | Main, analog, and I/O power supplies | Separate domains enable noise isolation for ADC/DAC and flexible voltage scaling (1.71–3.6 V) |
| PA0–PA15, PB0–PB15, etc. | General-purpose I/Os | 136 total GPIOs; most 5 V-tolerant; up to 14 configurable for independent 1.08–3.6 V I/O supply |
| PD0–PD15, PE0–PE15, PF0–PF15, PG0–PG15, PH0–PH15, PI0–PI11 | Extended GPIO banks | Full port mapping enables large touchscreens, parallel RGB interfaces, or multi-peripheral expansion |
| DSI_D0P/N, DSI_D1P/N, DSI_CLKN/P | MIPI DSI differential lanes | Two data lanes + one clock lane support DSI video transmission up to 500 Mbit/s per lane |
| LTDC_R0–R7, G0–G7, B0–B7, HSYNC/VSYNC/DE | LCD-TFT parallel interface signals | Direct RGB888/666/565 output with timing control for passive/active matrix displays |
| NRST | Active-low reset input | Asynchronous reset with internal pull-up; compatible with external reset supervisors |
| BOOT0 | Boot mode selection | High at power-on selects system memory bootloader; low selects user Flash |
Key Features
| Feature | Design Value |
|---|---|
| FlexPowerControl architecture | Five low-power modes with sub-μA quiescent current and 5 μs wakeup from Stop-enables multi-year battery life in always-on HMIs |
| Chrom-ART Accelerator (DMA2D) | Hardware-accelerated 2D graphics composition (copy, fill, blend) offloads CPU and reduces frame buffer bandwidth by >40% |
| Chrom-GRC (GFXMMU) | Graphics memory management unit enabling dynamic remapping of display layers and up to 20% reduction in required framebuffer size |
| Dual Octo-SPI + FSMC | Supports simultaneous connection to external XIP flash (Octo-SPI) and parallel memories (NOR/PSRAM) for code + graphics asset storage |
| Hardware crypto suite | AES-128/256 and SHA-256 accelerators enable secure firmware updates and encrypted display data transport without CPU overhead |
Applications
| Industrial HMI Panel | Portable Medical Monitor |
|---|---|
Use Scenario: Compact, battery-powered touchscreen display for PLC status visualization and parameter adjustment in factory environments. IC Role / Device Role / Timing Role: Primary application processor managing GUI rendering via LTDC+DSI, real-time sensor data acquisition (ADC, timers), and secure local logging (AES-encrypted Flash writes). Use Value: 33 nA Shutdown mode extends battery life beyond 5 years; Chrom-GRC reduces required SDRAM footprint by 20%, lowering BOM cost. | Use Scenario: Handheld vital signs monitor with color TFT display, ECG front-end, and wireless telemetry. IC Role / Device Role / Timing Role: Central controller handling analog signal chain (OPAMP+ADC), display pipeline (DSI+LTDC), cryptographic telemetry (AES+HASH), and ultra-low-power sleep scheduling. Use Value: 2.8 μA Stop 2 with RTC enables precise periodic wakeups for sensor sampling; 5 Msps ADC supports high-fidelity ECG waveform capture. |
| Smart Energy Meter Display | Automotive Cabin Infotainment Demo |
Use Scenario: DIN-rail mounted energy meter with segmented LCD + optional color TFT overlay for tariff visualization and tamper alerts. IC Role / Device Role / Timing Role: Dual-role controller: drives legacy segment LCD via GPIO/timers while optionally driving MIPI DSI-based auxiliary display for diagnostics and firmware updates. Use Value: Single-chip solution eliminates need for separate display controller; dual-bank Flash enables safe over-the-air updates with rollback capability. | Use Scenario: Reference design for automotive-grade infotainment demo unit with capacitive touch, audio playback (SAI), and camera input (DCMI). IC Role / Device Role / Timing Role: Application processor executing FreeRTOS-based UI stack, managing MIPI DSI display, stereo audio via SAI, and 10 MHz color camera feed (DCMI). Use Value: 120 MHz Cortex-M4+FPU handles real-time audio DSP and touch gesture processing; 14-channel DMA prevents CPU bottlenecks across concurrent peripherals. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ultra-low-power MCU applications with display interface capability.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32L4R9ZIJ6 | Same core, 2 MB Flash, but adds Chrom-ART + DSI + LTDC + 2 MB SRAM (vs. 640 KB); higher power in Run mode (140 μA/MHz) | Targeted at higher-resolution displays (UXGA) and complex GUIs requiring larger framebuffer; less suitable for sub-μA battery-critical use | Select when display complexity demands >640 KB SRAM and full 2 MB SRAM bandwidth; accept higher active power |
| STM32H743ZIT6 | Cortex-M7 @ 480 MHz, 2 MB Flash, 1 MB RAM, no DSI/LTDC; supports parallel RGB only; no sub-μA low-power modes (min 12 μA Stop) | Designed for high-performance compute (e.g., real-time motor control + basic GUI), not ultra-low-power HMI; lacks native MIPI DSI | Choose only if raw CPU throughput outweighs battery life requirements and display interface can be implemented externally |
Compared with STM32L4R9ZIJ6, the STM32L4S5ZIT6 trades SRAM capacity for lower static power and cost-ideal for mid-tier HMI where 640 KB suffices and multi-year battery life is mandatory. Versus STM32H743ZIT6, it sacrifices peak performance for certified ultra-low-power operation and integrated display subsystems, eliminating external TCON or bridge ICs.
Availability
STM32L4S5ZIT6 is available at Aetrix Electronics and suitable for industrial HMI panels, portable medical monitors, smart energy meter displays, and automotive cabin infotainment demos requiring stable component supply, long-term lifecycle assurance, and qualified ultra-low-power performance.
Supply support for STM32L4S5ZIT6 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, analog ICs, power management, and MEMS sensors for industrial, automotive, and consumer markets.
The STM32L4 series targets ultra-low-power embedded applications demanding rich peripheral integration-including graphics, cryptography, and precision analog-without compromising energy efficiency or real-time responsiveness.
FAQ
What is the maximum operating frequency and associated performance metric?
The STM32L4S5ZIT6 operates at up to 120 MHz using its Arm Cortex-M4 core with FPU. It achieves 150 DMIPS (Dhrystone 2.1) and 409.20 CoreMark® (3.41 CoreMark/MHz). Performance is sustained via the ART Accelerator, which enables zero-wait-state execution from Flash memory across the full voltage and temperature range.
Does this MCU support MIPI DSI and LCD-TFT simultaneously?
Yes-STM32L4S5ZIT6 integrates both a MIPI DSI Host controller (with two data lanes and one clock lane, each capable of 500 Mbit/s) and a full LCD-TFT controller (LTDC). They operate independently: LTDC drives parallel RGB interfaces, while DSIHOST transmits serialized video to DSI-compatible display modules. Both can be used concurrently in split-display or dual-output configurations.
What are the lowest-power operational modes and their typical current draw?
The lowest-power modes are Shutdown (33 nA, 5 wakeup pins), Standby (125 nA, 5 wakeup pins), and Standby with RTC (420 nA). Stop 2 with RTC consumes 2.8 μA. All modes retain RTC and backup register contents. These values are measured at 25 °C, VDD = 3.3 V, and include internal regulator leakage-verified per ST's DS12024 Rev 4 electrical characteristics tables.
Which development tools and debug interfaces are supported?
The device supports Serial Wire Debug (SWD) and JTAG via its SWJ-DP interface, plus Embedded Trace Macrocell™ (ETM) for instruction-level tracing. Official ST tools include STM32CubeIDE, STM32CubeMX for configuration, and ST-LINK/V2-1 debug probes. It is compatible with third-party IDEs (Keil MDK, IAR EWARM) and RTOSes including FreeRTOS, Zephyr, and ThreadX.
STM32L4S5ZIT6 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 144-LQFP
- Series:
- STM32L4
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M4
- Core Size:
- 32-Bit Single-Core
- Speed:
- 120MHz
- Connectivity:
- CANbus, EBI/EMI, I2C, IrDA, LINbus, MMC/SD, SAI, SPI, UART/USART, USB OTG
- Peripherals:
- Brown-out Detect/Reset, DMA, POR, PWM, WDT
- Number of I/O:
- 115
- Program Memory Size:
- 2MB (2M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 640K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 3.6V
- Data Converters:
- A/D 16x12b; D/A 2x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32L4S5ZIT6 FAQ
1.How can I place an order for STM32L4S5ZIT6 through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32L4S5ZIT6 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32L4S5ZIT6 reliable?
The price and inventory of STM32L4S5ZIT6 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32L4S5ZIT6 is usually 5 days.
3.What payment methods are accepted for STM32L4S5ZIT6?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32L4S5ZIT6 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32L4S5ZIT6?
STM32L4S5ZIT6 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32L4S5ZIT6 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32L4S5ZIT6?
For technical support, including STM32L4S5ZIT6 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32L4S5ZIT6 requirements.
6.How does Aetrix verify that STM32L4S5ZIT6 is sourced from the original manufacturer or authorized distributors?
All STM32L4S5ZIT6 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32L4S5ZIT6 meets industry standards.
7.What is the process for return or replacement of STM32L4S5ZIT6?
All STM32L4S5ZIT6 units undergo pre-shipment inspection (PSI). If there is an issue with STM32L4S5ZIT6, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32L4S5ZIT6 part is unused and in its original packaging.
Return procedure for STM32L4S5ZIT6:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
STM32L4S5ZIT6 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

