STMicroelectronics STM32L552CET6
- Part No.:
- STM32L552CET6
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 48-LQFP
- Datasheet:
-
STM32L552CET6.pdf
- Description:
- IC MCU 32BIT 512KB FLASH 48LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:2,617
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Product details
Overview
STM32L552CET6 from STMicroelectronics is an ultra-low-power Arm® Cortex®-M33 32-bit microcontroller with TrustZone® security, 110 MHz max clock, 512 KB dual-bank Flash, 256 KB SRAM, and integrated SMPS step-down converter. It delivers 165 DMIPS and supports secure firmware installation via TF-M in battery-powered industrial sensors, medical wearables, and smart metering endpoints.
For engineers reviewing the STM32L552CET6 datasheet, STM32L552CET6 pinout, STM32L552CET6 application, or STM32L552CET6 equivalent, key selection criteria include TrustZone-enabled peripheral isolation, sub-100 nA standby current with RTC, 5 µs wakeup from Stop mode, and hardware-accelerated HASH/RNG for TLS stack offload.
Technical Context
The STM32L552CET6 implements a dual-core security architecture: the Cortex-M33 core executes secure/non-secure code partitions enforced by SAU and GTZC, while TrustZone-aware peripherals (e.g., I/Os, ADC, timers) are dynamically assigned to secure or non-secure worlds. The ART Accelerator with 8 KB instruction cache enables zero-wait-state execution at 110 MHz.
Power management integrates three regulators: LDO (configurable output), embedded SMPS (62 μA/MHz @ 3 V), and external SMPS support. Low-power modes include Shutdown (17 nA), Standby with RTC (222 nA), and Stop 2 with RTC (3.16 μA), all featuring configurable wakeup pins and brownout reset.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M33 with TrustZone and FPU, enabling secure boot and isolated execution environments |
| Max Clock Speed | 110 MHz - supports real-time control loops and audio processing without external PLL overhead |
| Flash Memory | 512 KB dual-bank - enables read-while-write for seamless firmware updates and OTA patching |
| SRAM | 256 KB total, including 64 KB with hardware parity - ensures data integrity in safety-critical logging |
| Ultra-Low-Power Modes | 17 nA Shutdown, 222 nA Standby with RTC - extends battery life to >10 years in coin-cell-powered IoT nodes |
| Security Features | TrustZone, RDP, HDP, SFI, HASH accelerator, NIST SP800-90B RNG - meets PSA Level 3 and SESIP certification requirements |
| Analog Peripherals | 2×12-bit ADC (5 Msps), 2×DAC, 2×OPAMP, 2×comparator - supports sensor signal conditioning and closed-loop analog control |
Pinout & Package
STM32L552CET6 uses the LQFP48 (7 × 7 mm) package with 48 pins, rated for industrial temperature range (–40 °C to +85 °C). Pin functions include dedicated TrustZone-secured I/Os, SMPS control signals (SW, FB), and multiple low-power wakeup inputs.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VSS | Main power supply and ground | Supports 1.71–3.6 V operation; decoupling required per datasheet layout guidelines |
| VBAT | Backup power supply | Supplies RTC and 32×32-bit backup registers in Shutdown mode (187 nA consumption) |
| NRST | Active-low reset input | Asynchronous reset with internal pull-up; compatible with external reset supervisors |
| PA0–PA15, PB0–PB15, etc. | General-purpose I/Os | Up to 114 fast I/Os; most 5 V-tolerant; up to 14 support independent 1.08–3.6 V supply for mixed-voltage interfacing |
| SWCLK, SWDIO | Serial Wire Debug interface | Enables programming and debug without JTAG pins; supports trace via ETM |
| UCPD1_DB, UCPD1_CC1 | USB Type-C™/PD controller signals | Directly interfaces with USB-C port for power negotiation and role swapping |
Key Features
| Feature | Design Value |
|---|---|
| FlexPowerControl architecture | Enables dynamic voltage/frequency scaling across 7 low-power modes, reducing active energy by >40% vs. legacy L4 series |
| ART Accelerator + 8 KB I-Cache | Eliminates Flash wait states at 110 MHz, improving deterministic interrupt latency and code density efficiency |
| Dual-bank Flash with RWW | Allows background firmware update while executing from second bank - critical for fail-safe OTA deployment |
| Embedded SMPS step-down converter | Reduces system-level BOM count by replacing external DC/DC; achieves 62 μA/MHz efficiency at 3 V |
| TrustZone-peripheral isolation | Hardware-enforced access control over 32+ peripherals (ADC, timers, I/Os) - prevents privilege escalation attacks |
Applications
| Industrial Sensor Node | Wearable Medical Monitor |
|---|---|
Use Scenario: Battery-operated vibration/temperature sensor node deployed in factory predictive maintenance systems. IC Role / Device Role / Timing Role: Main controller executing edge AI inference, managing BLE/Wi-Fi coexistence, and scheduling sensor sampling via LPTIM-triggered ADC conversions. Use Value: 17 nA Shutdown mode and 5 µs wakeup enable event-driven sampling, extending 2000 mAh Li-SOCl₂ battery life beyond 8 years. | Use Scenario: ECG/PPG patch monitoring heart rate variability and arrhythmia during ambulatory use. IC Role / Device Role / Timing Role: Secure host processor running certified TLS stack, acquiring analog biosignals via dual 12-bit ADCs, and storing encrypted logs in protected SRAM. Use Value: Hardware RNG and HASH accelerator reduce CPU load by 35% during TLS handshake, preserving battery for continuous 72-hour recording. |
| Smart Electricity Meter | Secure Asset Tracker |
Use Scenario: DIN-rail mounted meter with anti-tamper detection, metrology, and NB-IoT backhaul. IC Role / Device Role / Timing Role: Trusted execution environment for metrology algorithms, tamper response (voltage/frequency/temp monitoring), and secure firmware updates over cellular link. Use Value: Active tamper detection and Root of Trust (HDP + unique boot entry) meet IEC 62056-21 and DLMS/COSEM security mandates. | Use Scenario: GPS/GNSS tracker in logistics containers with geofence alerts and motion-triggered reporting. IC Role / Device Role / Timing Role: Low-power coordinator managing GNSS acquisition bursts, accelerometer wakeups, and encrypted LoRaWAN transmission via FDCAN and SPI peripherals. Use Value: Stop 2 mode with RTC alarm wakes CPU only on motion events, achieving <10 µA average current over 30-day shipment cycle. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ultra-low-power secure MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32U575ZIT6 | Higher performance (160 MHz), larger Flash (2 MB), dual-core Arm Cortex-M33 + Cortex-M0+, no SMPS | Better suited for complex UI, multi-protocol stacks, and higher memory footprint applications | Select when >1 MB Flash or dual-core RTOS partitioning is required; avoid if SMPS integration is mandatory |
| RA4M3AFGB | Arm Cortex-M4F, 100 MHz, 1 MB Flash, 384 KB SRAM, no TrustZone, Renesas Secure Crypto Engine | Lacks hardware-enforced memory isolation but offers mature toolchain and motor control IP | Prefer for cost-sensitive industrial drives where PSA Level 2 suffices and TrustZone partitioning is not mandated |
Compared with STM32U575ZIT6 and RA4M3AFGB, the STM32L552CET6 uniquely balances sub-100 nA standby, integrated SMPS, and PSA-certifiable TrustZone - making it optimal for compact, long-life, security-regulated endpoints where BOM count and certification rigor are primary constraints.
Availability
STM32L552CET6 is available at Aetrix Electronics and suitable for industrial sensor nodes, wearable medical monitors, smart electricity meters, and secure asset trackers requiring stable component supply across multi-year production cycles.
Supply support for STM32L552CET6 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, designing and manufacturing microcontrollers, power ICs, sensors, and automotive chips since 1987.
The STM32L5 series targets ultra-low-power secure embedded applications, combining Arm TrustZone with advanced power gating and cryptographic accelerators for certified IoT and industrial edge devices.
FAQ
What is the maximum operating temperature for STM32L552CET6?
The STM32L552CET6 is qualified for industrial temperature range: –40 °C to +85 °C. Its thermal design supports sustained operation at 85 °C ambient with standard PCB copper pour and recommended decoupling, as validated in DS12737 Rev 6 Section 6.8.
Does STM32L552CET6 support USB Type-C™ Power Delivery?
Yes - it integrates a dedicated UCPD (USB Type-C™/Power Delivery) controller with CC1/CC2 pins, supporting source/sink/DRP roles, VCONN switching, and PD communication without external PHY. Full implementation details are in Section 3.41 of the datasheet.
How many I/O pins support independent VDDIO supply?
Up to 14 GPIOs (including PA0–PA7, PB0–PB7) support independent VDDIO supply down to 1.08 V, enabling direct interfacing with low-voltage peripherals like 1.2 V logic or LPDDR controllers without level shifters.
Is the 512 KB Flash truly dual-bank with read-while-write capability?
Yes - the Flash is physically divided into two banks (Bank 1: 256 KB, Bank 2: 256 KB), each independently erasable and programmable. Code execution from one bank while writing to the other is supported per RM0438 Section 3.4.4 and verified in AN5297.
STM32L552CET6 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 48-LQFP
- Series:
- STM32L5
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M33
- Core Size:
- 32-Bit Single-Core
- Speed:
- 110MHz
- Connectivity:
- CANbus, I2C, IrDA, LINbus, MMC/SD, QSPI, SAI, SPI, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, DMA, PWM, WDT
- Number of I/O:
- 38
- Program Memory Size:
- 512KB (512K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 256K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 3.6V
- Data Converters:
- A/D 9x12b; D/A 2x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32L552CET6 FAQ
1.How can I place an order for STM32L552CET6 through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32L552CET6 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32L552CET6 reliable?
The price and inventory of STM32L552CET6 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32L552CET6 is usually 5 days.
3.What payment methods are accepted for STM32L552CET6?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32L552CET6 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32L552CET6?
STM32L552CET6 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32L552CET6 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32L552CET6?
For technical support, including STM32L552CET6 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32L552CET6 requirements.
6.How does Aetrix verify that STM32L552CET6 is sourced from the original manufacturer or authorized distributors?
All STM32L552CET6 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32L552CET6 meets industry standards.
7.What is the process for return or replacement of STM32L552CET6?
All STM32L552CET6 units undergo pre-shipment inspection (PSI). If there is an issue with STM32L552CET6, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32L552CET6 part is unused and in its original packaging.
Return procedure for STM32L552CET6:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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