STMicroelectronics STM32L552QEI6

Overview

STM32L552QEI6 from STMicroelectronics is an ultra-low-power Arm® Cortex®-M33 32-bit microcontroller with TrustZone® security, FPU, and SMPS support. It delivers 165 DMIPS at up to 110 MHz, integrates 512 KB Flash (dual-bank read-while-write), 256 KB SRAM (64 KB with hardware parity), and operates from 1.71 V to 3.6 V across –40 °C to 125 °C. It targets secure, battery-constrained edge nodes such as industrial wireless sensors and medical wearables requiring certified firmware integrity and sub-μA standby operation.

For engineers reviewing the STM32L552QEI6 datasheet, STM32L552QEI6 pinout, STM32L552QEI6 application, or STM32L552QEI6 equivalent, key selection criteria include TrustZone-enforced peripheral isolation, SMPS vs LDO power mode trade-offs, 187 nA VBAT retention capability, and dual-bank Flash for seamless secure firmware updates.

Technical Context

The device implements a dual-core security architecture: the Cortex-M33 core executes in both Secure and Non-secure states, enforced by SAU and GTZC peripherals that partition memory, I/Os, and peripherals. TrustZone enables hardware-rooted secure boot via unique entry point and HDP-protected ROM code, with SFI and TF-M–compatible secure firmware installation.

Power management integrates three regulators: embedded LDO (configurable output), integrated SMPS step-down converter (62 μA/MHz @ 3 V), and external SMPS support. Low-power modes include Shutdown (17 nA), Standby (108 nA), and Stop 2 with RTC (3.16 μA), all featuring <5 μs wakeup latency and brownout reset in all active modes except Shutdown.

Key Specifications

Pinout & Package

STM32L552QEI6 uses the UFQFPN48 (7 × 7 mm) package with 48 pins, optimized for space-constrained portable designs. Pin functions are validated per STMicroelectronics DS12737 Rev 6, Section 4 ("Pinouts and pin description").

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar ultra-low-power secure MCU applications.

Compared with STM32U575ZIT6, the STM32L552QEI6 offers superior ultra-low-power efficiency in Stop/Standby modes and integrated SMPS, while the RA4M3G20CBM#AC0 trades TrustZone for broader peripheral integration but lacks hardware root-of-trust granularity.

Availability

STM32L552QEI6 is available at Aetrix Electronics and suitable for industrial wireless sensors, portable medical monitors, smart utility meters, and secure asset trackers requiring stable component supply across extended product lifecycles.

Supply support for STM32L552QEI6 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, specializing in microcontrollers, power management, and automotive ICs with strong emphasis on energy efficiency and functional safety.

The STM32L5 series is designed for secure, ultra-low-power edge devices demanding PSA Certified Level 3 compliance, long battery life, and hardware-enforced trust boundaries - targeting industrial IoT, healthcare, and smart infrastructure.

FAQ

What is the maximum operating frequency and corresponding power mode configuration?

The STM32L552QEI6 achieves 110 MHz maximum CPU frequency using the internal multispeed oscillator auto-trimmed by LSE or an external 4–48 MHz crystal. Full performance requires ART Accelerator enabled and voltage scaling set to Range 1 (1.2 V). In SMPS mode, this yields 62 μA/MHz; in LDO mode, it consumes 106 μA/MHz. Frequency is limited to 80 MHz in Range 2 (1.0 V) for ultra-low-power operation.

How does TrustZone implementation differ from standard Cortex-M33 deployments?

STMicroelectronics extends standard TrustZone with GTZC (Global TrustZone Controller) and TZSC (TrustZone Security Controller), enabling hardware-enforced partitioning of memories, peripherals, and DMA channels into Secure/Non-secure domains. Unlike generic implementations, GTZC supports dynamic reconfiguration and securable I/Os - allowing individual pins to be assigned to Secure world only, preventing side-channel leakage through GPIO.

Can the SMPS be used simultaneously with the internal LDO?

No - the SMPS and LDO are mutually exclusive power regulation options. The device selects one regulator at boot via option bytes (PWR_CR3.SMPSEN). When SMPS is enabled, the LDO is disabled and its outputs are isolated. External components (inductor, capacitor, diode) must match Table 9 in DS12737 Rev 6; improper selection causes instability or failure to enter low-power modes.

What are the exact pin counts and I/O voltage tolerances for the UFQFPN48 package?

The UFQFPN48 package has 48 pins: 42 general-purpose I/Os (PA0–PA15, PB0–PB15, PC0–PC15, PD2, PH0, PH1), 2 power supplies (VDD/VSS), 2 analog supplies (VDDA/VSSA), VBAT, NRST, BOOT0, and OSC_IN/OSC_OUT. Of these, 38 I/Os are 5 V-tolerant in standard operation; 14 pins (including PA0–PA7, PB0–PB1, PC0–PC5) support independent 1.08–3.6 V supply for interfacing with low-voltage logic.