STMicroelectronics STM32L562QEI6Q
- Part No.:
- STM32L562QEI6Q
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 132-UFBGA
- Datasheet:
-
STM32L562QEI6Q.pdf
- Description:
- IC MCU 32BIT 512KB FLSH 132UFBGA
- Quantity:
- Payment:

- Shipping:

Inventory:2,044
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
STM32L562QEI6Q from STMicroelectronics is an ultra-low-power Arm® Cortex®-M33 32-bit microcontroller with TrustZone® security, FPU, and SMPS support. It delivers 165 DMIPS at up to 110 MHz, integrates 512 KB Flash (dual-bank read-while-write), 256 KB SRAM (64 KB with hardware parity), and operates from 1.71 V to 3.6 V across –40°C to 125°C. It targets secure, battery-powered edge nodes such as industrial wireless sensors and medical wearables requiring cryptographic acceleration and sub-μA standby.
For engineers reviewing the STM32L562QEI6Q datasheet, STM32L562QEI6Q pinout, STM32L562QEI6Q application, or STM32L562QEI6Q equivalent, key selection considerations include TrustZone-enabled secure boot, AES+PKA coprocessors, 222 nA standby with RTC, 62 μA/MHz SMPS-run efficiency, and dual 12-bit ADCs with 5 Msps sampling - all in a 81-ball WLCSP package.
Technical Context
The device implements Arm TrustZone® at the system level, enabling hardware-isolated secure and non-secure execution environments with configurable memory attribution via SAU and GTZC. Its dual-bank Flash supports seamless firmware updates with atomic swap, while the embedded SMPS step-down converter replaces external DC/DC for optimized power delivery down to 1.08 V core voltage.
Security is anchored by root-of-trust features: unique boot entry, hide protection area (HDP), secure firmware installation (SFI) via embedded RSS, and TF-M–compliant secure firmware upgrade. Cryptographic acceleration includes AES-128/192/256, SHA-1/SHA-224/SHA-256 HASH, NIST SP800-90B–compliant TRNG, and public key accelerator (PKA) for ECC and RSA operations.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M33 with TrustZone®, FPU, MPU, 110 MHz max clock → enables deterministic real-time control with hardware-enforced security partitioning |
| Memory | 512 KB Flash (2 banks, RWW), 256 KB SRAM (64 KB parity-protected) → supports robust OTA updates and fault-tolerant data buffering |
| Power Efficiency | 222 nA Standby + RTC, 62 μA/MHz Run @ 3 V (SMPS mode) → extends multi-year battery life in coin-cell–powered IoT endpoints |
| Security Accelerators | AES coprocessor, PKA, HASH, OTFDEC, TRNG → offloads TLS handshake, secure boot verification, and encrypted external Octo-SPI access |
| Analog Peripherals | 2× 12-bit ADC (5 Msps, 16-bit oversampling), 2× DAC, 2× OPAMP, 2× comparator → enables high-fidelity sensor signal conditioning without external components |
| Package | WLCSP81 (4.36 × 4.07 mm, 0.4 mm pitch) → provides ultra-compact footprint for space-constrained wearable and implantable designs |
| Temperature Range | –40°C to +125°C → qualified for harsh industrial and automotive under-hood environments |
Pinout & Package
STM32L562QEI6Q is housed in a 81-ball WLCSP (Wafer-Level Chip Scale Package) with 0.4 mm ball pitch and 4.36 × 4.07 mm body size, optimized for minimal PCB area and thermal performance in ultra-thin applications.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VDDA, VDDIO2 | Core, analog, I/O supply rails | Independent 1.71–3.6 V domains enable mixed-signal integrity and flexible power sequencing |
| VSS, VSSA, VSSIO2 | Ground references | Dedicated analog/digital grounds reduce noise coupling in precision ADC/DAC operation |
| NRST | Active-low reset input | Asynchronous reset with internal pull-up; supports external debounced pushbutton or supervisor IC |
| BOOT0 | Boot mode selection | High at power-up selects system memory bootloader; controlled via external resistor or MCU GPIO |
| PA0–PA15, PB0–PB15, etc. | General-purpose I/Os | Up to 114 fast I/Os with interrupt capability; most 5 V-tolerant, 14 support independent 1.08–3.6 V supply |
| PC13–PC15 | RTC oscillator pins | Support 32.768 kHz crystal for calendar-grade timekeeping with hardware calibration |
| PF0–PF1 | OCTOSPI clock/data | Enable high-speed, on-the-fly decrypted access to external Octo-SPI NOR/FRAM memories |
Key Features
| Feature | Design Value |
|---|---|
| TrustZone® System Security | Hardware-enforced isolation of secure/non-secure worlds with GTZC, TZSC, and SAU - enables certified secure boot and runtime attestation |
| FlexPowerControl Architecture | Multiple low-power modes (17 nA Shutdown, 222 nA Standby+RTC) with sub-5 µs wakeup - minimizes energy per sensing cycle |
| Embedded SMPS Converter | Integrated step-down DC/DC replacing external regulator - reduces BOM count and improves efficiency vs LDO above 10 mA load |
| ART Accelerator + 8 KB Cache | Zero-wait-state execution from Flash at 110 MHz - eliminates performance penalty of internal memory latency |
| Secure Firmware Upgrade | TF-M–based over-the-air update flow with signature verification, rollback protection, and encrypted image loading - meets PSA Level 3 requirements |
Applications
| Industrial Wireless Sensor Node | Portable Medical Monitor |
|---|---|
Use Scenario: Battery-powered vibration/temperature node transmitting encrypted telemetry via LoRaWAN every 5 minutes. IC Role / Device Role / Timing Role: Main controller executing sensor fusion, AES-GCM encryption, and low-power scheduling with RTC-triggered wakeups. Use Value: 222 nA standby + RTC and 62 μA/MHz SMPS-run mode extend CR2032 battery life beyond 5 years without compromising security or sampling rate. | Use Scenario: Wearable ECG patch acquiring 2-channel biopotential signals continuously for 72-hour ambulatory monitoring. IC Role / Device Role / Timing Role: Signal acquisition hub managing dual 12-bit ADCs (5 Msps), OPAMP-based PGA, and secure BLE transmission. Use Value: Integrated 2× OPAMP + 2× comparator + hardware oversampling eliminate external analog front-end components while maintaining clinical-grade SNR. |
| Smart Utility Meter | Secure Asset Tracker |
Use Scenario: Tamper-resistant electricity meter with metrology ASIC interface, secure firmware updates, and anti-cloning protections. IC Role / Device Role / Timing Role: Secure host processor handling HDP-protected boot, PKA-accelerated ECDSA signatures, and active tamper detection. Use Value: Active tamper sensing (voltage/frequency/temperature) plus 96-bit UID and 512-byte OTP prevent physical cloning and unauthorized firmware modification. | Use Scenario: GPS/GNSS tracker deployed in remote logistics with cellular fallback, geofence alerts, and encrypted location reporting. IC Role / Device Role / Timing Role: Power-aware connectivity manager coordinating FDCAN diagnostics, LPUART modem control, and UCPD Type-C power negotiation. Use Value: Dual USB interfaces (UCPD + FS) enable simultaneous secure firmware download and field-replaceable battery charging via single Type-C port. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ultra-low-power secure MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32U575ZIT6 | Higher 160 MHz CPU, 2 MB Flash, 782 KB SRAM; same WLCSP81 package but larger die; lacks SMPS (uses LDO only) | Better suited for complex RTOS-based edge AI inference; less optimal for sub-100 μA continuous sensing due to higher active current | Select when >1 MB Flash and Cortex-M33 crypto extensions (e.g., PACBTI) are required, and SMPS is not critical |
| NXP LPC55S69JBD100 | Arm Cortex-M33, 320 KB Flash, 256 KB SRAM, no SMPS; includes DSP extensions and dual-core asymmetric config | Stronger audio/sensor fusion capability via DSP ISA; lower Flash density limits large OTA image storage | Prefer for cost-sensitive audio-centric designs where TrustZone use case is simpler and external DC/DC acceptable |
Compared with STM32U575ZIT6 and LPC55S69JBD100, STM32L562QEI6Q uniquely balances ultra-low static power (222 nA Standby+RTC), integrated SMPS, and full TrustZone system security in a compact WLCSP - making it optimal for long-life, physically constrained, and security-certifiable edge devices.
Availability
STM32L562QEI6Q is available at Aetrix Electronics and suitable for industrial wireless sensors, portable medical monitors, smart utility meters, and secure asset trackers requiring stable component supply across extended product lifecycles.
Supply support for STM32L562QEI6Q includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and analog products for industrial, automotive, and consumer markets.
The STM32L5 series is ST's flagship ultra-low-power secure MCU line, engineered specifically for battery-operated IoT endpoints demanding PSA Certified Level 3 security, sub-μA power states, and cryptographic acceleration without external co-processors.
FAQ
What is the maximum operating frequency and corresponding power supply configuration for STM32L562QEI6Q?
The STM32L562QEI6Q achieves 110 MHz maximum CPU frequency using the internal 48 MHz oscillator with PLL multiplication, supplied from the embedded SMPS step-down converter at 1.26 V core voltage. This configuration delivers 62 μA/MHz efficiency and requires external SMPS components (inductor, capacitor) per Table 9 in DS12736 Rev 5.
How does TrustZone® implementation differ between STM32L562QEI6Q and legacy STM32L4 devices?
Unlike STM32L4's software-managed security, STM32L562QEI6Q uses hardware-enforced TrustZone® with Global TrustZone Controller (GTZC), TrustZone Security Controller (TZSC), and SAU - enabling automatic peripheral/memory attribution, secure boot ROM with HDP, and SFI via embedded Root Secure Services (RSS). This meets PSA Certified Level 3 requirements out of the box.
Which low-power mode supports both RTC operation and fastest wakeup time, and what is the measured current?
Stop 2 mode supports RTC operation with 3.16 μA typical current consumption and 5 µs wakeup time from standby. It retains SRAM content and selected peripherals while disabling CPU, flash, and most clocks - verified per Table 10 and Section 5.3.7 of DS12736 Rev 5.
Can STM32L562QEI6Q directly interface with external Octo-SPI memories while maintaining data confidentiality?
Yes - the on-the-fly decryption engine (OTFDEC) decrypts Octo-SPI reads in real time using AES-128/192/256 keys stored in secure memory. Decryption occurs before data reaches the bus, preventing exposure of plaintext external memory contents even during DMA transfers or cache line fills.
STM32L562QEI6Q Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 132-UFBGA
- Series:
- STM32L5
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M33
- Core Size:
- 32-Bit Single-Core
- Speed:
- 110MHz
- Connectivity:
- CANbus, I2C, IrDA, LINbus, MMC/SD, QSPI, SAI, SPI, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, DMA, PWM, WDT
- Number of I/O:
- 105
- Program Memory Size:
- 512KB (512K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 256K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 3.6V
- Data Converters:
- A/D 16x12b; D/A 2x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32L562QEI6Q FAQ
1.How can I place an order for STM32L562QEI6Q through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32L562QEI6Q on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32L562QEI6Q reliable?
The price and inventory of STM32L562QEI6Q are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32L562QEI6Q is usually 5 days.
3.What payment methods are accepted for STM32L562QEI6Q?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32L562QEI6Q transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32L562QEI6Q?
STM32L562QEI6Q orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32L562QEI6Q order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32L562QEI6Q?
For technical support, including STM32L562QEI6Q datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32L562QEI6Q requirements.
6.How does Aetrix verify that STM32L562QEI6Q is sourced from the original manufacturer or authorized distributors?
All STM32L562QEI6Q products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32L562QEI6Q meets industry standards.
7.What is the process for return or replacement of STM32L562QEI6Q?
All STM32L562QEI6Q units undergo pre-shipment inspection (PSI). If there is an issue with STM32L562QEI6Q, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32L562QEI6Q part is unused and in its original packaging.
Return procedure for STM32L562QEI6Q:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
STM32L562QEI6Q Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

