STMicroelectronics STM32L562QEI6TR
- Part No.:
- STM32L562QEI6TR
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 132-UFBGA
- Datasheet:
-
STM32L562QEI6TR.pdf
- Description:
- IC MCU 32BIT 512KB FLSH 132UFBGA
- Quantity:
- Payment:

- Shipping:

Inventory:3,410
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Product details
Overview
STM32L562QEI6TR from STMicroelectronics is an ultra-low-power Arm® Cortex®-M33 32-bit microcontroller with TrustZone® security, FPU, and integrated SMPS. It delivers 165 DMIPS at up to 110 MHz, features 512 KB Flash (dual-bank read-while-write), 256 KB SRAM (64 KB with hardware parity), and operates from 1.71 V to 3.6 V across –40°C to +125°C. It targets secure, battery-constrained IoT edge nodes requiring cryptographic acceleration and sub-µA standby operation.
For engineers reviewing the STM32L562QEI6TR datasheet, STM32L562QEI6TR pinout, STM32L562QEI6TR application, or STM32L562QEI6TR equivalent, key selection criteria include TrustZone-enabled secure boot, on-the-fly Octo-SPI decryption, ULPMark-CP® score of 370, and dual-regulator support (LDO + SMPS) for dynamic power optimization in portable medical sensors and industrial wireless transceivers.
Technical Context
The device implements Arm TrustZone® at the system level, partitioning memory, peripherals, and I/Os into secure/non-secure worlds with hardware-enforced isolation. Its GTZC (Global TrustZone Controller) and TZSC (TrustZone Security Controller) enable fine-grained peripheral securability, including AES coprocessor, PKA, HASH, and OTFDEC engines-all accessible only from secure world unless explicitly delegated.
Power architecture integrates dual regulation: a configurable LDO and an external-component SMPS step-down converter supporting 62 µA/MHz run-mode efficiency at 3 V. Low-power modes include Shutdown (17 nA), Standby with RTC (222 nA), and Stop 2 with RTC (3.16 µA), all with ≤5 µs wakeup latency-enabled by ART Accelerator's 8-KB instruction cache and auto-trimmed multispeed oscillator (±0.25% accuracy).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M33 with TrustZone®, FPU, MPU, 110 MHz max frequency |
| Memory | 512 KB Flash (dual-bank RWW), 256 KB SRAM (64 KB parity-protected) |
| Security | Hardware root of trust, AES-256/PKA/HASH accelerators, OTFDEC, 96-bit UID, 512-byte OTP |
| Power Modes | 17 nA Shutdown, 222 nA Standby+RTC, 3.16 µA Stop2+RTC, 62 µA/MHz SMPS Run mode |
| Analog Peripherals | 2×12-bit ADC (5 Msps), 2×12-bit DAC, 2×OPAMP, 2×comparator, DFSDM, TSC |
| Connectivity | FDCAN, USB 2.0 FS (crystal-less), UCPD, 6×USART/LPUART, 4×I²C, 3×SPI, 2×SAI, SDMMC |
| Benchmarks | 165 DMIPS, 442 CoreMark®, 370 ULPMark-CP®, 54 ULPMark-PP®, 27400 SecureMark-TLS® |
Pinout & Package
STM32L562QEI6TR uses the WLCSP81 (4.36 × 4.07 mm) package-a wafer-level chip-scale package with 81 solder bumps, optimized for space-constrained portable designs. Pin assignment follows ST's standard STM32L5 series layout with dedicated VDD/VSS pairs per power domain, separate VREF+/VREF– for ADC/DAC, and dedicated TrustZone-secured debug pins (SWCLK/SWDIO).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VDDA, VDDUSB | Supply domains | Independent 1.71–3.6 V digital, analog, and USB regulators; supports SMPS/LDO coexistence |
| VSS, VSSA, VSSUSB | Ground domains | Separate digital, analog, and USB ground planes minimize noise coupling in mixed-signal operation |
| PA0–PA15, PB0–PB15, etc. | General-purpose I/O | Up to 114 fast GPIOs; most 5 V-tolerant, 14 with independent 1.08–3.6 V supply for interfacing low-voltage sensors |
| NRST | Reset input | Active-low reset with internal pull-up; supports tamper-aware reset via TAMP peripheral |
| BOOT0 | Boot configuration | Controls boot source (system memory, Flash, or SRAM); behavior differs when TrustZone enabled (TZEN=1) |
| SWCLK, SWDIO | Debug interface | Serial Wire Debug (SWD) pins; access restricted in secure world unless debug authentication enabled |
Key Features
| Feature | Design Value |
|---|---|
| TrustZone-enforced secure boot | Immutable root of trust using unique boot entry and hide protection area (HDP) prevents unauthorized firmware execution |
| On-the-fly Octo-SPI decryption | OTFDEC engine decrypts external flash contents in real time during code fetch-no RAM exposure of decrypted firmware |
| Dual-regulator power management | Integrated SMPS + LDO allows dynamic switching between high-efficiency (62 µA/MHz) and low-noise (106 µA/MHz) run modes |
| Ultra-low-power timer suite | Three low-power timers (LPTIM1/2/3) remain active in Stop mode with <5 µs wakeup-enabling precise event scheduling without full wake |
| Secure firmware upgrade | TF-M (Trusted Firmware-M) support enables authenticated, encrypted over-the-air updates with rollback protection |
Applications
| Wearable Health Monitor | Smart Utility Meter |
|---|---|
Use Scenario: Continuous ECG/PPG sensing with BLE transmission in coin-cell-powered wristband. IC Role / Device Role / Timing Role: Main MCU executing sensor fusion, TLS-secured BLE stack, and TrustZone-isolated key storage. Use Value: 17 nA Shutdown and 222 nA Standby+RTC extend battery life beyond 2 years; OTFDEC protects firmware IP in external flash. | Use Scenario: Battery-backed AMI meter logging consumption data and reporting via NB-IoT/LPWAN. IC Role / Device Role / Timing Role: Secure host controller managing crypto-accelerated firmware updates and tamper-detection logic. Use Value: Active tamper detection (voltage/frequency/temp) triggers zeroization of keys; 3.16 µA Stop2+RTC enables hourly wake-and-report cycles. |
| Industrial Wireless Sensor Node | Secure Access Control Terminal |
Use Scenario: LoRaWAN node collecting vibration/temperature data in hazardous environments. IC Role / Device Role / Timing Role: Edge AI inference accelerator (via CMSIS-NN) with secure model update path. Use Value: 62 µA/MHz SMPS efficiency reduces thermal load in sealed enclosures; PKA enables ECDSA signature verification offline. | Use Scenario: Contactless credential reader with biometric matching and encrypted audit log storage. IC Role / Device Role / Timing Role: Trusted execution environment for fingerprint template matching and secure NVM write. Use Value: Hardware AES-256 encrypts stored templates; 512-byte OTP stores immutable device identity; HDP blocks debug access to sensitive routines. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ultra-low-power secure MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32U575ZIT6 | Higher clock (160 MHz), larger Flash (2 MB), no SMPS, uses LDO-only power; includes PAC (Peripheral Authentication Controller) | Better for compute-intensive secure boot and firmware validation; less suitable for multi-year battery life in sub-µA sleep scenarios | Select when prioritizing performance headroom and advanced attestation over minimum quiescent current |
| NXP LPC55S69JBD100 | Arm Cortex-M33 with TrustZone, 640 KB Flash, 320 KB SRAM, no SMPS, includes DSP extensions and FlexSPI | Lacks OTFDEC and dedicated secure boot ROM; relies on external flash encryption; higher active current (≈120 µA/MHz) | Choose when leveraging NXP's EdgeLock SE050 companion secure element for key management instead of on-die crypto acceleration |
Compared with STM32U575ZIT6 and LPC55S69JBD100, the STM32L562QEI6TR uniquely balances sub-100-nA shutdown, integrated SMPS, and production-ready OTFDEC-making it optimal for cost-sensitive, long-life secure edge nodes where power budget and firmware IP protection are co-primary constraints.
Availability
STM32L562QEI6TR is available at Aetrix Electronics and suitable for wearable health monitors, smart utility meters, industrial wireless sensor nodes, and secure access control terminals requiring stable component supply across extended product lifecycles.
Supply support for STM32L562QEI6TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power ICs, sensors, and automotive semiconductors since 1987.
The STM32L5 series targets ultra-low-power, security-critical embedded applications-integrating Arm TrustZone®, cryptographic accelerators, and flexible power architectures specifically for battery-operated IoT endpoints and industrial edge devices.
FAQ
What is the maximum operating temperature range for STM32L562QEI6TR?
The STM32L562QEI6TR is qualified for industrial and extended temperature operation from –40°C to +125°C, as confirmed in Section 5.3.1 of DS12736 Rev 5. This rating applies to all package variants including WLCSP81, and is validated under full peripheral activation and SMPS operation.
Does STM32L562QEI6TR support crystal-less USB operation?
Yes-STM32L562QEI6TR integrates a factory-trimmed 48 MHz internal oscillator with clock recovery system (CRS), enabling full-speed USB 2.0 operation without an external crystal. This is documented in Section 3.12 and Table 5.3.9 of the datasheet, reducing BOM count and PCB footprint.
How many independent power domains does the WLCSP81 package support?
The WLCSP81 package supports three independent power domains: VDD/VSS (digital core), VDDA/VSSA (analog), and VDDUSB/VSSUSB (USB PHY). This separation is physically implemented via dedicated bump sets and is required to achieve specified ADC/DAC accuracy and USB signal integrity per Section 6.5 and Table 24 of DS12736 Rev 5.
Can the OCTOSPI interface operate in secure mode with TrustZone?
Yes-the OCTOSPI interface is classified as a TrustZone-aware peripheral (Table 8, DS12736 Rev 5) and can be assigned to secure or non-secure world via GTZC configuration. When secured, OTFDEC decryption and address filtering enforce that only authenticated code/data is fetched from external memory, preventing DMA-based side-channel attacks.
STM32L562QEI6TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 132-UFBGA
- Series:
- STM32L5
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- ARM® Cortex®-M33
- Core Size:
- 32-Bit Single-Core
- Speed:
- 110MHz
- Connectivity:
- CANbus, I2C, IrDA, LINbus, MMC/SD, QSPI, SAI, SPI, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, DMA, PWM, WDT
- Number of I/O:
- 110
- Program Memory Size:
- 512KB (512K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 256K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 3.6V
- Data Converters:
- A/D 16x12b; D/A 2x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32L562QEI6TR FAQ
1.How can I place an order for STM32L562QEI6TR through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32L562QEI6TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32L562QEI6TR reliable?
The price and inventory of STM32L562QEI6TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32L562QEI6TR is usually 5 days.
3.What payment methods are accepted for STM32L562QEI6TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32L562QEI6TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32L562QEI6TR?
STM32L562QEI6TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32L562QEI6TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32L562QEI6TR?
For technical support, including STM32L562QEI6TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32L562QEI6TR requirements.
6.How does Aetrix verify that STM32L562QEI6TR is sourced from the original manufacturer or authorized distributors?
All STM32L562QEI6TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32L562QEI6TR meets industry standards.
7.What is the process for return or replacement of STM32L562QEI6TR?
All STM32L562QEI6TR units undergo pre-shipment inspection (PSI). If there is an issue with STM32L562QEI6TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32L562QEI6TR part is unused and in its original packaging.
Return procedure for STM32L562QEI6TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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