STMicroelectronics STM32L562RET6

Overview

STM32L562RET6 from STMicroelectronics is an ultra-low-power Arm® Cortex®-M33 32-bit microcontroller with TrustZone® security, FPU, and SMPS support. It delivers 165 DMIPS at up to 110 MHz, integrates 512 KB Flash (dual-bank read-while-write), 256 KB SRAM (64 KB with hardware parity), and operates from 1.71 V to 3.6 V across –40°C to 85°C. It targets secure, battery-constrained IoT edge nodes requiring cryptographic acceleration (AES+PKA), real-time sensing, and low-power connectivity.

For engineers reviewing the STM32L562RET6 datasheet, STM32L562RET6 pinout, STM32L562RET6 application, or STM32L562RET6 equivalent, key selection criteria include TrustZone-enforced memory isolation, sub-100 nA standby current with RTC, on-the-fly Octo-SPI decryption, ULPMark-CP® score of 370, and dual 12-bit ADCs with 5 Msps sampling - all in LQFP64 package.

Technical Context

The STM32L562RET6 implements a dual-domain Arm Cortex-M33 core with hardware-enforced TrustZone® separation between secure and non-secure worlds, enabling secure boot, firmware updates via TF-M, and isolated peripheral access. Its FlexPowerControl architecture supports seven low-power modes including Shutdown (17 nA), Standby with RTC (222 nA), and Stop 2 with RTC (3.16 µA).

It integrates three independent clock domains: high-speed system (up to 110 MHz via PLL), low-power (LSE/LSI), and USB/audio (48 MHz recovery). The ART Accelerator with 8 KB instruction cache enables zero-wait-state execution from Flash, while the octo-SPI interface supports encrypted external memory with OTFDEC and DFSDM for sigma-delta sensor interfacing.

Key Specifications

Pinout & Package

LQFP64 package (10 × 10 mm, 0.5 mm pitch), ECOPACK2-compliant, with exposed thermal pad. Pin count: 64 leads; body material: plastic; mounting: surface-mount.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar ultra-low-power secure MCU applications.

Compared with STM32L562RET6, the STM32U575RIT6 offers higher compute headroom at the expense of standby power, while the LPC55S69JBD100 trades hardware security for architectural flexibility - making the L562RET6 optimal for certified, ultra-low-power secure endpoints.

Availability

STM32L562RET6 is available at Aetrix Electronics and suitable for smart utility metering, wearable health monitors, industrial wireless sensor nodes, and secure access control terminals requiring stable component supply and long-term lifecycle assurance.

Supply support for STM32L562RET6 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and analog components for industrial, automotive, and consumer markets.

The STM32L5 series is ST's flagship ultra-low-power secure MCU line, engineered specifically for PSA-certified IoT endpoints demanding hardware-enforced trust, sub-100 nA power states, and integrated cryptographic acceleration in compact packages.

FAQ

What is the maximum operating frequency and corresponding power consumption in Run mode?

The STM32L562RET6 achieves 110 MHz maximum CPU frequency. In Run mode with SMPS enabled, it consumes 62 µA/MHz at 3 V (6.82 mA total), while LDO mode draws 106 µA/MHz (11.66 mA). These values are measured under typical conditions per DS12736 Rev 5 Section 5.3.6, with all peripherals disabled except SysTick.

Does the STM32L562RET6 support external memory interfaces, and which types are validated?

Yes - it supports external memory via Flexible Static Memory Controller (FSMC) for SRAM, PSRAM, NOR, NAND, and FRAM, and OCTOSPI for high-speed serial flash and RAM. Validated configurations include Micron MT25QL QSPI flash and ISSI IS66WV51216 SRAM, as documented in AN5210 and the reference manual RM0438.

How is TrustZone® implemented, and what peripherals are securable?

TrustZone is implemented via Global TrustZone Controller (GTZC) and Security Attribution Unit (SAU), enabling hardware partitioning of memory and peripherals into secure/non-secure worlds. Securable peripherals include all I/Os, Flash/SRAM banks, ADCs, DACs, timers, and communication interfaces (FDCAN, USB, I²C, etc.), as listed in Table 7 of DS12736 Rev 5.

What development tools and debug interfaces are supported?

The STM32L562RET6 supports Serial Wire Debug (SWD) and JTAG via dedicated SWCLK/SWDIO/NRST pins, plus Embedded Trace Macrocell (ETM) for instruction trace. ST-LINK/V2-1 and ST-LINK/V3 debug probes are fully compatible, and STM32CubeIDE provides full TrustZone-aware debugging, secure image signing, and TF-M integration.