STMicroelectronics STM32L562VET6Q

Overview

STM32L562VET6Q from STMicroelectronics is an ultra-low-power Arm® Cortex®-M33 32-bit microcontroller with TrustZone® security, FPU, and SMPS support. It delivers 165 DMIPS at up to 110 MHz, integrates 512 KB Flash (dual-bank read-while-write), 256 KB SRAM (64 KB with hardware parity), and operates from 1.71–3.6 V across –40°C to +85°C. It targets secure, battery-sensitive applications such as wearable medical sensors and industrial IoT edge nodes.

For engineers reviewing the STM32L562VET6Q datasheet, STM32L562VET6Q pinout, STM32L562VET6Q application, or STM32L562VET6Q equivalent, key selection criteria include TrustZone-enabled secure boot, sub-μA low-power modes (17 nA Shutdown, 222 nA Standby with RTC), integrated AES+PKA accelerators, Octo-SPI on-the-fly decryption, and dual 12-bit ADCs (5 Msps) with hardware oversampling.

Technical Context

The device implements a dual-domain TrustZone architecture with secure/non-secure memory partitioning, securable peripherals (via TZSC), and Root of Trust via unique boot entry and HDP. Its power system combines LDO and SMPS step-down converter-enabling 62 μA/MHz run-mode efficiency at 3 V-and supports external SMPS for further optimization.

Core timing relies on four independent clock sources: 4–48 MHz HSE, 32 kHz LSE for RTC, 16 MHz factory-trimmed RC (±1%), and auto-trimmed multispeed oscillator (±0.25%). Three PLLs feed system, USB, audio, and ADC clocks, while ART Accelerator with 8 KB instruction cache enables zero-wait-state execution from Flash at 110 MHz.

Key Specifications

Pinout & Package

LQFP100 package: 14 × 14 mm body, 0.5 mm pitch, exposed thermal pad, RoHS-compliant and ECOPACK2-certified.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar ultra-low-power secure MCU applications.

Compared with STM32L562VET6Q, the STM32U575ZIT6Q trades cryptographic acceleration for raw throughput and memory, while the LPC55S69JBD100 sacrifices ultra-low-power efficiency for DSP capability-making the L562 optimal for long-life, crypto-intensive, battery-constrained edge nodes.

Availability

STM32L562VET6Q is available at Aetrix Electronics and suitable for wearable health monitors, secure industrial sensor nodes, smart meter communication modules, and medical infusion pump controllers requiring stable component supply across extended product lifecycles.

Supply support for STM32L562VET6Q includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, specializing in microcontrollers, power management, sensors, and automotive ICs with strong emphasis on energy efficiency and security.

The STM32L5 series is designed specifically for ultra-low-power, high-security embedded applications-integrating TrustZone, SMPS, and cryptographic accelerators to meet stringent requirements in medical, industrial, and consumer IoT.

FAQ

What is the maximum operating frequency and corresponding power consumption in Run mode?

The STM32L562VET6Q achieves 110 MHz maximum CPU frequency. In Run mode with SMPS enabled at 3 V, it consumes 62 μA per MHz; with LDO only, consumption rises to 106 μA/MHz. These values are measured under typical conditions with ART Accelerator active and all peripherals disabled except core logic.

Does STM32L562VET6Q support external memory interfaces, and which types are compatible?

Yes-it supports external memory via Flexible Static Memory Controller (FSMC) for SRAM, PSRAM, NOR, NAND, and FRAM, and Octo-SPI (OCTOSPI) interface for high-speed serial flash and RAM. OCTOSPI enables x8 DTR operation up to 133 MHz and integrates OTFDEC for transparent decryption of external code/data.

How does the TrustZone implementation differ from standard Cortex-M33 deployments?

ST extends standard TrustZone with GTZC (Global TrustZone Controller), TZSC (TrustZone Security Controller), and securable I/Os. It adds hardware-enforced memory attribution (SAU), peripheral gating per security state, and secure boot with HDP and RDP levels-enabling full system-level isolation beyond core-only protection found in generic M33 implementations.

What are the supported debug interfaces, and is JTAG available on this LQFP100 package?

Debug is supported via Serial Wire Debug (SWD) using SWCLK and SWDIO pins. JTAG is not physically available on the LQFP100 package-only SWD is implemented. The Embedded Trace Macrocell (ETM) provides real-time instruction trace, and SWD allows full programming, debugging, and memory access without requiring JTAG pins or additional routing complexity.