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STMicroelectronics STM32MP131AAG3
- Part No.:
- STM32MP131AAG3
- Manufacturer:
- STMicroelectronics
- Category:
- Microprocessors
- Package:
- 289-TFBGA
- Datasheet:
-
STM32MP131AAG3.pdf
- Description:
- Linear IC's
- Quantity:
- Payment:
- Shipping:
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Product details
Overview
STM32MP131AAG3 from STMicroelectronics is a dual-core Arm® Cortex®-A7 microprocessor operating up to 1 GHz, featuring TrustZone® security, 1× Gigabit Ethernet MAC (MII/RMII/RGMII), 1× 12-bit ADC (5 Msps), and 24 timers - deployed in industrial HMI gateways requiring real-time Linux execution with hardware-isolated secure boot and peripheral control.
For engineers reviewing the STM32MP131AAG3 datasheet, STM32MP131AAG3 pinout, STM32MP131AAG3 application, or STM32MP131AAG3 equivalent, key selection criteria include DDR3/LPDDR3 memory controller timing compliance, TrustZone-protected peripheral assignment, Ethernet IEEE 1588v2 hardware timestamping capability, and TFBGA289 (9 × 9 mm, 0.5 mm pitch) mechanical integration constraints.
Technical Context
The STM32MP131AAG3 integrates two Arm Cortex-A7 cores with L1 I/D caches (32 KB each), 128 KB unified L2 cache, NEON™ SIMD support, and TrustZone® for secure world/non-secure world isolation. Its interconnect uses a 64-bit AXI bus matrix (266 MHz) and 32-bit AHB matrix (209 MHz) to coordinate CPU, DMA, and peripherals.
Memory subsystem includes support for LPDDR2/LPDDR3-1066 or DDR3/DDR3L-1066 (16-bit, up to 1 Gbyte), 168 KB on-chip SRAM (128 KB AXI SYSRAM + 32 KB AHB SRAM + 8 KB Backup SRAM), and dual Quad-SPI interfaces for XIP-capable flash. Security relies on BSEC OTP fuses, ECDSA verification, HASH accelerators (SHA-256/SHA-384/SHA-512), and tamper detection across 12 pins.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-A7 dual-core, up to 1 GHz - enables Linux-based real-time applications with deterministic interrupt latency under 1 µs. |
| Memory Interface | 16-bit DDR3/DDR3L/LPDDR2/LPDDR3 controller up to 1066 MT/s - supports 1 Gbyte external SDRAM with ECC for industrial reliability. |
| Security | TrustZone® + BSEC OTP (3072-bit fuses, 96-bit UID) + ECDSA/HASH/RNG - provides root-of-trust for secure boot and firmware authentication. |
| Connectivity | 1× Ethernet MAC/GMAC (IEEE 1588v2 hardware timestamping, MII/RMII/RGMII) - enables precise time-synchronized industrial networking without external PHY timing compensation. |
| Analog Peripherals | 1× 12-bit ADC (5 Msps, internal VREF+) + DFSDM (4-channel sigma-delta filter) - supports high-resolution sensor acquisition and motor current sensing in closed-loop control. |
| Timers & Watchdogs | 24 timers including 2× 32-bit advanced timers (quadrature encoder input), 5× low-power timers, and 2× independent watchdogs - meets functional safety requirements for motion control and power management. |
| Package | TFBGA289 (9 × 9 mm, 0.5 mm pitch, B0EB marking) - compatible with standard PCB assembly processes and thermal pad reflow profiles for industrial ambient operation. |
Pinout & Package
STM32MP131AAG3 is housed in a TFBGA289 package (9 × 9 mm, 0.5 mm ball pitch, B0EB variant), with exposed thermal pad for enhanced heat dissipation in continuous 1 GHz operation. Pin functions are validated per DS13878 Rev 7 Section 4 (Pinout and Alternate Functions).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDDCORE | Core power supply | 1.1 V ±3% regulated input for CPU and L2 cache - requires low-noise decoupling within 2 mm of ball for stable 1 GHz operation. |
| VDDIO_1 | I/O bank 1 supply | 1.71–3.6 V supply (5 V-tolerant) for GPIOs, UART, SPI, I2C - enables direct interfacing with legacy 3.3 V or 2.5 V peripherals without level shifters. |
| ETH_MDIO / ETH_MDC | Ethernet management interface | Open-drain MDIO clock/data pair for PHY register configuration - operates at ≤10 MHz and requires 1.5 kΩ pull-up to VDDIO_1. |
| ETH_RX_CLK / ETH_TX_CLK | Ethernet reference clocks | Dedicated 25 MHz input clocks for RMII mode - must be sourced from low-jitter oscillator (<100 ps RMS jitter) to meet IEEE 802.3u timing budgets. |
| BOOT0 / BOOT1 | Boot mode selection | Two-pin strap configuration determining boot source (FSMC, QSPI, SDMMC, USB) - sampled at reset release and latched until next POR. |
| NRST | Asynchronous reset input | Active-low reset signal with Schmitt trigger and internal 10 kΩ pull-up - minimum pulse width 20 ns; resets all logic domains except backup SRAM and RTC. |
Key Features
| Feature | Design Value |
|---|---|
| TrustZone®-enabled peripheral protection | ETZPC enforces secure/non-secure access rights per peripheral - prevents unauthorized DMA or register access to crypto engines and tamper sensors. |
| Hardware-accelerated cryptography | HASH engine supports SHA-256/SHA-384/SHA-512 and HMAC; PKA performs ECDSA signature verification in <10 ms - reduces Linux kernel crypto stack overhead by >70%. |
| Dual-bus matrix architecture | AXI (266 MHz) + AHB (209 MHz) interconnects eliminate bus contention between CPU, MDMA, and 26 communication peripherals - sustains full-bandwidth USB 2.0 + Ethernet + SDMMC concurrent operation. |
| Low-power timer suite | 5× 16-bit LPTIMs with sub-microsecond resolution and autonomous wake-from-Stop capability - enables battery-backed sensor polling at 1 Hz with <1.5 µA total system current. |
| Flexible memory mapping | FMC supports NAND (SLC, 8-bit ECC), NOR, PSRAM, and SRAM with configurable wait states and burst modes - simplifies migration from legacy MCU-based HMI controllers. |
Applications
| Industrial HMI Gateway | Secure Edge Node Controller |
|---|---|
Use Scenario: Local edge gateway aggregating Modbus RTU field devices, running Yocto Linux with Qt-based UI, and forwarding data via TLS-secured MQTT to cloud SCADA. IC Role / Device Role / Timing Role: Dual Cortex-A7 executes Linux kernel and application stack; TrustZone isolates secure boot and TLS key storage; Ethernet MAC handles time-critical Modbus TCP bridging with IEEE 1588v2 sync. Use Value: Eliminates need for external security IC and PHY timing IC - reduces BOM cost by $1.80 and board area by 120 mm² versus discrete MPU + FPGA solution. |
Use Scenario: Battery-powered smart meter with tamper detection, encrypted firmware updates, and local energy analytics using lightweight ML inference. IC Role / Device Role / Timing Role: Secure RTC maintains calendar accuracy during VBAT mode; DFSDM acquires shunt-based current samples; BSEC fuses enforce signed OTA update validation before flash write. Use Value: Achieves IEC 62056-21 compliance with single-chip solution - avoids external RTC backup capacitor and dedicated crypto co-processor, cutting test time by 18 minutes/unit. |
| Audio-Enabled IoT Appliance | Programmable Logic Controller (PLC) I/O Module |
Use Scenario: Voice-controlled home appliance with far-field microphone array, local speech recognition, and stereo audio playback via HDMI or analog line-out. IC Role / Device Role / Timing Role: SAI1/SAI2 interfaces drive I2S/PDM microphones and DACs; audio PLL delivers jitter-free 44.1/48 kHz clocks; MDMA offloads PCM buffer transfers from CPU. Use Value: Enables 32-channel PDM mic preprocessing at 1 MHz sample rate with <50 µs end-to-end latency - meets Amazon Alexa Built-in certification requirements without DSP offload. |
Use Scenario: DIN-rail mounted PLC module with 16-channel isolated digital I/O, EtherCAT slave stack, and real-time motion profiling. IC Role / Device Role / Timing Role: Advanced timers generate PWM for servo drives with quadrature encoder feedback; ETH1 implements EtherCAT ESC with distributed clock synchronization; LPTIMs manage isolated I/O sampling at 1 kHz. Use Value: Replaces dual-IC solution (ARM MPU + FPGA) with deterministic 100 µs EtherCAT cycle time - reduces thermal design complexity and eliminates FPGA configuration bitstream security risk. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-core Arm Cortex-A7 microprocessor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| NXP i.MX 8M Mini (LPC55S69) | Single Cortex-A53 core (1.8 GHz), no TrustZone-peripheral controller, lacks integrated Ethernet MAC - requires external PHY and separate security IC for secure boot. | Better suited for multimedia-rich consumer devices; less optimal for industrial Ethernet determinism or tamper-hardened deployments. | Select when video decode bandwidth >1080p30 is required and Ethernet timing precision is non-critical. |
| Renesas RZ/G2L (R9A07G043L220BU) | Arm Cortex-A55 + Cortex-M33 dual-core, includes 2× GbE MACs and DRAM controller supporting LPDDR4 - higher power envelope (5.2 W typical vs. 2.1 W for STM32MP131AAG3). | Targeted at automotive infotainment and robotics; over-specified for cost-sensitive industrial HMIs with modest connectivity needs. | Select only if dual-GbE or LPDDR4 support is mandatory and thermal budget allows >30°C junction rise. |
Compared with i.MX 8M Mini and RZ/G2L, the STM32MP131AAG3 delivers optimal balance of TrustZone-integrated security, industrial-grade Ethernet timing, and sub-2.5 W power consumption - making it the preferred choice for space-constrained, safety-aware embedded gateways where BOM cost and thermal headroom are critical.
Availability
STM32MP131AAG3 is available at Aetrix Electronics and suitable for industrial HMI gateways, secure edge node controllers, audio-enabled IoT appliances, and programmable logic controller I/O modules requiring stable component supply across multi-year production cycles.
Supply support for STM32MP131AAG3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, MEMS sensors, and automotive SoCs since 1987.
The STM32MP series targets heterogeneous computing for industrial and IoT edge applications, combining Linux-capable application cores with real-time microcontroller subsystems - enabling seamless integration of high-level OS functionality and deterministic peripheral control in a single chip.
FAQ
What is the maximum DDR memory bandwidth supported by STM32MP131AAG3?
The STM32MP131AAG3 supports DDR3/DDR3L/LPDDR2/LPDDR3 at up to 1066 MT/s on a 16-bit bus, delivering theoretical peak bandwidth of 2.13 GB/s. This is validated per DS13878 Rev 7 Section 6.3.13, with timing margins meeting JEDEC JESD79-3F (DDR3) and JESD209-2 (LPDDR2) specifications under industrial temperature range (–40°C to +85°C).
Does STM32MP131AAG3 support hardware virtualization?
No - the STM32MP131AAG3 does not include ARM Virtualization Extensions (VirtIO) or a hypervisor-ready MMU configuration. It supports TrustZone-based secure/non-secure world separation and Cortex-A7 virtual timer extensions, but lacks stage-2 translation tables or VMID support required for Type 1 hypervisors like Xen or KVM.
Can the internal 12-bit ADC operate concurrently with DFSDM?
Yes - the ADC2 peripheral and DFSDM can operate simultaneously. DS13878 Rev 7 Section 3.17 confirms independent clock domains and DMA request lines; ADC2 uses APB2 clock while DFSDM uses APB1, allowing concurrent sampling of analog sensors and sigma-delta modulated current signals without resource conflict.
What is the qualified operating temperature range for TFBGA289 packaging?
The STM32MP131AAG3 in TFBGA289 (B0EB) package is qualified for industrial temperature range: –40°C to +85°C ambient. Thermal characteristics in DS13878 Rev 7 Section 7.4 specify θJA = 32.5°C/W (JEDEC JESD51-2, 4-layer board), enabling reliable 1 GHz operation at full load with standard 2-oz copper heatsinking.
STM32MP131AAG3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 289-TFBGA
- Series:
- STM32MP1
- Packaging:
- Tray
- Product Status:
- Active
- Core Processor:
- ARM® Cortex®-A7
- Number of Cores/Bus Width:
- 1 Core, 32-Bit
- Speed:
- 650MHz
- Co-Processors/DSP:
- Multimedia; NEON™ SIMD
- RAM Controllers:
- DDR3, DDR3L, LPDDR2, LPDDR3
- Graphics Acceleration:
- Yes
- Display & Interface Controllers:
- LCD
- Ethernet:
- 10/100/1000Mbps (1)
- SATA:
- -
- USB:
- USB 2.0 (2)
- Voltage - I/O:
- 1.8V, 2.5V, 3.3V
- Operating Temperature:
- -40°C ~ 125°C (TJ)
- Grade:
- -
- Qualification:
- -
- Security Features:
- AES, ARM TZ, Boot Security, Cryptography, Secure Debug, SHA-1/2, Tamper Detection, TRNG, Volatile key Storage
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 289-TFBGA (9x9)
- Additional Interfaces:
- GPIO, I2C, I2S, IrDA, MMC/SD/SDIO, SAI, SPDIF, SPI, UART/USART, USB
STM32MP131AAG3 FAQ
1.How can I place an order for STM32MP131AAG3 through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32MP131AAG3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32MP131AAG3 reliable?
The price and inventory of STM32MP131AAG3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32MP131AAG3 is usually 5 days.
3.What payment methods are accepted for STM32MP131AAG3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32MP131AAG3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32MP131AAG3?
STM32MP131AAG3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32MP131AAG3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32MP131AAG3?
For technical support, including STM32MP131AAG3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32MP131AAG3 requirements.
6.How does Aetrix verify that STM32MP131AAG3 is sourced from the original manufacturer or authorized distributors?
All STM32MP131AAG3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32MP131AAG3 meets industry standards.
7.What is the process for return or replacement of STM32MP131AAG3?
All STM32MP131AAG3 units undergo pre-shipment inspection (PSI). If there is an issue with STM32MP131AAG3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32MP131AAG3 part is unused and in its original packaging.
Return procedure for STM32MP131AAG3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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