STMicroelectronics STM32MP131FAF7
- Part No.:
- STM32MP131FAF7
- Manufacturer:
- STMicroelectronics
- Category:
- Microprocessors
- Package:
- 320-TFBGA
- Datasheet:
-
STM32MP131FAF7.pdf
- Description:
- Linear IC's
- Quantity:
- Payment:

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Product details
Overview
STM32MP131FAF7 from STMicroelectronics is a dual-core Arm® Cortex®-A7 microprocessor unit (MPU) operating up to 1 GHz, featuring TrustZone® security, 1× Gigabit Ethernet MAC, 1× 12-bit ADC (5 Msps), and hardware crypto acceleration (AES-256, PKA, HASH). It integrates 168 KB on-chip SRAM (128 KB AXI SYSRAM + 32 KB AHB SRAM + 8 KB Backup SRAM) and supports LPDDR3-1066/DDR3L-1066 external memory for industrial HMI and edge gateway applications.
For engineers reviewing the STM32MP131FAF7 datasheet, STM32MP131FAF7 pinout, STM32MP131FAF7 application, or STM32MP131FAF7 equivalent, key selection considerations include its 289-ball LFBGA package (9 × 9 mm, 0.5 mm pitch), dual-bus matrix architecture (AXI @ 266 MHz / AHB @ 209 MHz), TrustZone-enabled secure boot, and support for DDR retention in Standby mode.
Technical Context
The STM32MP131FAF7 implements a heterogeneous dual-core Arm Cortex-A7 subsystem with NEON™ and TrustZone®, backed by 128 KB unified L2 cache and independent L1 I/D caches (32 KB each). Its interconnect comprises a 64-bit AXI bus matrix (266 MHz) and 32-bit AHB matrix (209 MHz), enabling concurrent high-bandwidth peripheral access.
Security is enforced via hardware-based TrustZone address space controller (TZC) for DDR, embedded tamper detection (12 pins, 5 active), BSEC OTP control, and on-the-fly AES-256 DRAM encryption. Power management includes five low-power modes (Sleep, Stop, LPLV-Stop, LPLV-Stop2, Standby) with DDR retention and sub-second RTC accuracy.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Dual Arm Cortex-A7 @ up to 1 GHz; enables Linux-capable real-time processing with NEON and TrustZone isolation |
| Memory Interface | LPDDR2/LPDDR3-1066 or DDR3/DDR3L-1066 (16-bit bus); supports up to 1 Gbyte external SDRAM for scalable application workloads |
| On-chip SRAM | 168 KB total: 128 KB AXI SYSRAM (low-latency system RAM), 32 KB AHB SRAM (peripheral buffer), 8 KB Backup SRAM (retained in Standby) |
| Security Features | Secure boot, TrustZone peripherals, 12 tamper pins (5 active), AES-256 on-the-fly DRAM encryption, PKA/ECC/RSA with DPA protection |
| Peripherals | 1× ETH MAC (MII/RMII/RGMII, IEEE 1588v2), 1× 12-bit ADC (5 Msps), 5× I2C, 8× UART/USART, 5× SPI, 2× SAI, 2× SDMMC, 2× USB 2.0 HS |
| Package | LFBGA289 (9 × 9 mm, 0.5 mm pitch, B0ED marking); RoHS-compliant ECOPACK2 with thermal pad for industrial thermal management |
| Power Modes | Five configurable low-power states including Standby with DDR retention; wakeup from USART/RTC/tamper in ≤10 µs (LPLV-Stop2) |
Pinout & Package
LFBGA289 (9 × 9 mm, 0.5 mm pitch, B0ED variant) with exposed thermal pad. Ball layout optimized for signal integrity in high-speed DDR and USB 2.0 HS routing; supports 135 secure GPIOs with interrupt/wakeup capability.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDDCORE | Core power supply | 1.0 V ±5% supply for CPU/SOC logic; requires local decoupling per ST layout guidelines |
| VDDQ_DDR | DDR I/O voltage | 1.2 V or 1.35 V supply for DDR interface; must be sequenced after VDDCORE during power-up |
| NRST | Active-low reset input | Asynchronous reset pin with internal pull-up; asserts full system reset including Cortex-A7 and peripherals |
| BOOT0 | Boot mode selection | High at power-up selects primary boot source (e.g., eMMC/SD card); tied low for serial boot via USB/UART |
| ETH_RX_CLK | Ethernet receive clock | Input clock for RGMII/MII timing recovery; requires 25 MHz or 125 MHz reference depending on PHY configuration |
| USB_OTG_FS_VBUS | USB OTG VBUS sensing | Monitors host-supplied 5 V on micro-AB connector; triggers enumeration and power management state transitions |
Key Features
| Feature | Design Value |
|---|---|
| TrustZone-enabled secure boot | Hardware-enforced chain of trust from ROM code through FSBL/SSBL; prevents unauthorized firmware execution |
| Dual-bus matrix architecture | Separate 64-bit AXI (266 MHz) and 32-bit AHB (209 MHz) buses eliminate contention between CPU, DMA, and peripherals |
| Hardware crypto accelerators | AES-128/192/256, SHA-2/3, HMAC, PKA (ECC/RSA), and TRNG - offloads Linux crypto stack and enables secure OTA updates |
| Flexible low-power strategy | Five power modes with sub-µA Standby current and DDR retention; enables always-on edge nodes with fast wake latency (<10 µs) |
| Industrial-grade analog peripherals | 12-bit ADC (5 Msps), DFSDM (4-channel sigma-delta filter), temperature sensor, and VREFBUF - supports sensor fusion without external ADC |
Applications
| Industrial HMI | Edge Gateway |
|---|---|
Use Scenario: Touch-enabled factory operator panel with real-time machine status visualization and local PLC communication. IC Role / Device Role / Timing Role: Main application processor running Linux-based Qt UI, managing Ethernet/IP and CAN via bridge ICs, synchronizing display refresh via SAI audio PLL. Use Value: Dual Cortex-A7 cores handle UI rendering and protocol stacks concurrently; TrustZone isolates secure firmware updates from user-space apps. | Use Scenario: Smart building node aggregating BACnet MS/TP, Modbus RTU, and LoRaWAN sensor data before forwarding to cloud via TLS-secured Ethernet. IC Role / Device Role / Timing Role: Secure edge compute hub executing lightweight containerized services; ETH MAC handles time-critical 1588v2 timestamping for sensor network synchronization. Use Value: On-chip AES-256 and PKA accelerate TLS handshake and certificate validation; DDR retention in Standby maintains connection state during brownouts. |
| Medical Data Logger | Smart Energy Meter |
Use Scenario: Portable ECG monitor logging raw analog waveforms to encrypted eMMC while transmitting alerts via USB CDC to host PC. IC Role / Device Role / Timing Role: Real-time acquisition controller using DFSDM for sigma-delta sensor inputs, ADC for auxiliary biopotential channels, and USB OTG for certified data export. Use Value: Hardware CRC and TRNG meet IEC 62304 cryptographic requirements; tamper pins detect enclosure breach and zeroize keys. | Use Scenario: DIN-rail mounted meter performing tariff calculation, grid harmonics analysis, and secure remote firmware updates over HAN Ethernet. IC Role / Device Role / Timing Role: Trusted execution environment (TEE) hosting metrology algorithms and secure bootloader; RTC with sub-second accuracy timestamps energy events. Use Value: Secure Boot + BSEC fuses ensure only signed firmware executes; 12-tamper pin interface meets IEC 62055-41 physical security mandates. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar MPU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32MP157C-DK2 | Quad-core Cortex-A7 @ 800 MHz, dual-display support, no LPDDR3 support, larger TFBGA320 package | Targeted at higher-end HMI with dual LVDS panels; lacks LPDDR3-1066 but adds GPU (Vivante GC7000Lite) | Select when GUI complexity demands GPU acceleration and board area allows larger package |
| i.MX 8M Mini (NXP) | Quad-core Cortex-A53 + Cortex-M4, integrated MIPI-CSI, no TrustZone-peripheral mapping, different DDR controller timing | Better suited for camera-based AI inference at edge; requires redesign of secure boot flow and memory map | Choose for vision-centric designs needing MIPI-CSI and M4 co-processor; not drop-in for TrustZone peripheral partitioning |
Compared with STM32MP131FAF7, the STM32MP157C-DK2 offers higher parallelism and graphics capability but sacrifices LPDDR3 bandwidth and compact LFBGA289 footprint; the i.MX 8M Mini provides stronger vision pipeline integration but lacks ST's granular TrustZone peripheral protection and requires revalidation of secure boot chain.
Availability
STM32MP131FAF7 is available at Aetrix Electronics and suitable for industrial HMI, edge gateways, medical data loggers, and smart energy meters requiring stable component supply across extended product lifecycles.
Supply support for STM32MP131FAF7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power ICs, sensors, and automotive semiconductors with focus on energy efficiency and reliability.
The STM32MP series targets Linux-capable edge devices requiring real-time responsiveness, hardware security, and industrial temperature operation - bridging the gap between microcontrollers and application processors.
FAQ
What boot sources does the STM32MP131FAF7 support?
The STM32MP131FAF7 supports primary boot from eMMC, SD card, NAND flash, Quad-SPI NOR, and USB mass storage via built-in ROM code. Secondary boot options include UART, USB DFU, and JTAG. Boot mode is selected by BOOT0/BOOT1 pins and internal fuse settings, with secure boot enforcing signature verification for all stages.
Does the STM32MP131FAF7 include hardware floating-point support?
Yes - the dual Arm Cortex-A7 cores integrate VFPv4 (Vector Floating Point) units compliant with ARMv7-A architecture, enabling efficient single-precision floating-point operations required for digital signal processing and control algorithms without software emulation overhead.
How is DDR memory retention managed during low-power modes?
In Standby mode, the STM32MP131FAF7 maintains DDR SDRAM self-refresh state using dedicated retention circuitry and backup regulator (~0.9 V), allowing full system context preservation with typical current draw below 100 µA. Exit latency is under 1 ms, enabling rapid resumption of real-time tasks after wake events.
Can the STM32MP131FAF7 operate in extended temperature ranges?
Yes - the STM32MP131FAF7 is qualified for industrial temperature range (–40 °C to +105 °C ambient), validated per AEC-Q100 stress tests for thermal cycling, HTOL, and ESD. The on-chip temperature sensor and voltage monitors provide real-time die thermal feedback for dynamic frequency scaling and thermal throttling.
STM32MP131FAF7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 320-TFBGA
- Series:
- STM32MP1
- Packaging:
- Tray
- Product Status:
- Active
- Core Processor:
- ARM® Cortex®-A7
- Number of Cores/Bus Width:
- 1 Core, 32-Bit
- Speed:
- 1GHz
- Co-Processors/DSP:
- Multimedia; NEON™ SIMD
- RAM Controllers:
- DDR3, DDR3L, LPDDR2, LPDDR3
- Graphics Acceleration:
- Yes
- Display & Interface Controllers:
- LCD
- Ethernet:
- 10/100/1000Mbps (1)
- SATA:
- -
- USB:
- USB 2.0 (2)
- Voltage - I/O:
- 1.8V, 2.5V, 3.3V
- Operating Temperature:
- -40°C ~ 105°C (TJ)
- Grade:
- -
- Qualification:
- -
- Security Features:
- AES, ARM TZ, Boot Security, Cryptography, Secure Debug, SHA-1/2, Tamper Detection, TRNG, Volatile key Storage
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 320-TFBGA (11x11)
- Additional Interfaces:
- GPIO, I2C, I2S, IrDA, MMC/SD/SDIO, SAI, SPDIF, SPI, UART/USART, USB
STM32MP131FAF7 FAQ
1.How can I place an order for STM32MP131FAF7 through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32MP131FAF7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32MP131FAF7 reliable?
The price and inventory of STM32MP131FAF7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32MP131FAF7 is usually 5 days.
3.What payment methods are accepted for STM32MP131FAF7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32MP131FAF7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32MP131FAF7?
STM32MP131FAF7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32MP131FAF7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32MP131FAF7?
For technical support, including STM32MP131FAF7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32MP131FAF7 requirements.
6.How does Aetrix verify that STM32MP131FAF7 is sourced from the original manufacturer or authorized distributors?
All STM32MP131FAF7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32MP131FAF7 meets industry standards.
7.What is the process for return or replacement of STM32MP131FAF7?
All STM32MP131FAF7 units undergo pre-shipment inspection (PSI). If there is an issue with STM32MP131FAF7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32MP131FAF7 part is unused and in its original packaging.
Return procedure for STM32MP131FAF7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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