STMicroelectronics STM32MP133AAF3

Overview

STM32MP133AAF3 from STMicroelectronics is a dual-core Arm® Cortex®-A7 microprocessor operating up to 1 GHz, featuring TrustZone® security, dual 10/100/1000 Ethernet MACs, two CAN FD controllers, and dual 12-bit ADCs sampling at 5 Msps. It integrates 128 KB L2 cache, 168 KB on-chip SRAM (including 8 KB in backup domain), and supports LPDDR2/LPDDR3-1066 and DDR3/DDR3L-1066 external memory - deployed in industrial HMIs, edge gateways, and secure IoT edge nodes.

For engineers reviewing the STM32MP133AAF3 datasheet, STM32MP133AAF3 pinout, STM32MP133AAF3 application, or STM32MP133AAF3 equivalent, key selection criteria include dual-Cortex-A7 performance with hardware virtualization support, IEEE 1588v2 Ethernet timing, CAN FD real-time fieldbus capability, TrustZone-enabled secure boot and peripheral isolation, and low-power Stop/Standby modes with DDR retention.

Technical Context

The STM32MP133AAF3 implements a heterogeneous dual-core Arm Cortex-A7 subsystem with independent L1 I/D caches (32 KB each), unified 128 KB L2 cache, NEON SIMD acceleration, and TrustZone-based memory/peripheral protection enforced via ETZPC and TZC. Its interconnect comprises a 64-bit AXI bus matrix (266 MHz) and 32-bit AHB matrix (209 MHz), enabling concurrent high-bandwidth peripheral access.

It integrates four fractional PLLs for precise clock generation: PLL1 for CPU clocks (up to 1 GHz), PLL2 for peripheral clocks, PLL3/PLL4 for audio/video domains, and USB_PLL for USB PHY timing. All PLLs support spread-spectrum clocking (SSCG) to reduce EMI, and the device includes dedicated hardware accelerators for HASH (SHA-256/SHA-384/SHA-512), ECDSA verification, true RNG (6 triple oscillators), and DFSDM sigma-delta filtering.

Key Specifications

Pinout & Package

STM32MP133AAF3 is housed in a TFBGA289 package (9 × 9 mm, 0.5 mm pitch, B0EB marking), with 289 solder balls arranged in 17 × 17 grid including central thermal pad. Pin functions are defined per ball position per ST's DS13876 Rev 7 Table 7 (ball definitions) and alternate function mapping (AF0–AF15).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-core Arm Cortex-A7 microprocessor applications.

Compared with STM32MP157C-DK2, the STM32MP133AAF3 delivers higher CPU frequency, dual CAN FD, and IEEE 1588v2 - critical for time-sensitive automation. Against i.MX 8M Mini, it trades raw throughput for superior analog integration, deterministic low-latency peripherals, and ST's industrial-grade security architecture.

Availability

STM32MP133AAF3 is available at Aetrix Electronics and suitable for industrial HMIs, smart energy gateways, and secure IoT edge nodes requiring stable component supply, long-term industrial lifecycle support, and full STMicroelectronics qualification documentation.

Supply support for STM32MP133AAF3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power ICs, sensors, and automotive semiconductors with ISO 9001 and IATF 16949 certification.

The STM32MP series targets Linux-capable edge computing with hardware security and industrial connectivity - designed specifically for deterministic, certified, and long-lifecycle applications in factory automation, energy, and infrastructure.

FAQ

What boot sources does STM32MP133AAF3 support?

The STM32MP133AAF3 supports five primary boot sources selected via BOOT0/BOOT1 pins: Quad-SPI flash (QSPI), eMMC/SD card (SDMMC), parallel NOR/NAND (FMC), USB device (DFU mode), and UART (for initial flashing). Boot ROM validates signed images using embedded public keys stored in BSEC fuses, enforcing secure boot chain integrity before loading TF-A.

Does STM32MP133AAF3 support real-time Linux determinism?

Yes - it supports PREEMPT_RT Linux kernel patches with sub-10 µs interrupt latency, enabled by Cortex-A7 generic timers (CNTFRQ), STGEN system timer, and hardware-assisted context switching. The dual-core configuration allows isolation of real-time tasks on one core while the other runs non-critical services, with TrustZone enforcing memory boundaries.

How is DDR memory retention managed in low-power modes?

In Standby mode, the STM32MP133AAF3 maintains DDR SDRAM self-refresh state using the backup regulator (~0.9 V) and dedicated DDRCTRL retention logic. This preserves full DDR contents with ~120 µA typical current draw, enabling instant resume without reloading OS or application binaries - validated per DS13876 Section 6.3.7.

What is the role of the DFSDM peripheral in sensor applications?

The Digital Filter for Sigma-Delta Modulators (DFSDM) accepts up to four PDM or sigma-delta bitstreams (e.g., from MEMS mics or current sensors), applies programmable digital filters (SINC3/SINC4), and outputs 24-bit results directly to memory via DMA. It operates independently of CPU load, enabling continuous high-resolution sensor acquisition without software overhead or jitter.