STMicroelectronics STM32MP133CAF3T

Overview

STM32MP133CAF3T from STMicroelectronics is a dual-core Arm® Cortex®-A7 microprocessor operating up to 1 GHz, integrating 2× Ethernet MAC/GMAC (IEEE 1588v2), 2× CAN FD controllers, 2× 12-bit ADCs (5 Msps), hardware crypto acceleration (AES-256, PKA, HASH), and TrustZone®-enabled security. It targets Linux-capable industrial HMI, gateway, and edge AI inference nodes requiring deterministic real-time I/O and secure boot.

For engineers reviewing the STM32MP133CAF3T datasheet, STM32MP133CAF3T pinout, STM32MP133CAF3T application, or STM32MP133CAF3T equivalent, key selection criteria include DDR3/LPDDR3 memory interface support, dual CAN FD timing synchronization, SAI/SPDIF audio subsystem integration, and tamper-resistant secure boot with 12 dedicated tamper pins.

Technical Context

The device implements a dual-bus matrix architecture: a 64-bit AXI interconnect (266 MHz) for high-bandwidth CPU-to-DDR traffic and a 32-bit AHB interconnect (209 MHz) for peripheral access. Its TrustZone®-enabled memory protection includes TZC (TrustZone Address Space Controller) for DDR and ETZPC (External TrustZone Protection Controller) for peripherals.

Clock management uses four fractional PLLs - PLL1 for CPU clocks, PLL2 for AXI/AHB, PLL3 for peripherals, and USB_PLL - enabling independent domain scaling. Security relies on BSEC (Boot and Security Control), 3072-bit fuses (including 256-bit HUK), and DPA-hardened AES/PKA engines.

Key Specifications

Pinout & Package

STM32MP133CAF3T is housed in a TFBGA289 package (9 × 9 mm, 0.5 mm pitch), with 289 solder balls arranged in a 17 × 17 grid (4 corner balls omitted). The package supports industrial temperature range (–40 °C to +125 °C) and complies with ECOPACK2 environmental standards.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-core Arm A-class microprocessor applications.

Compared with NXP i.MX 8M Mini and Renesas RZ/G2L, STM32MP133CAF3T delivers superior integration of CAN FD, SPDIFRX, and DFSDM for industrial audio+control convergence - at the cost of lower peak CPU performance and absence of MIPI CSI-2 or USB 3.0.

Availability

STM32MP133CAF3T is available at Aetrix Electronics and suitable for industrial gateways, smart building HMIs, secure PLCs, and edge AI vision nodes requiring stable component supply across extended product lifecycles.

Supply support for STM32MP133CAF3T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power ICs, sensors, and analog/mixed-signal devices for industrial, automotive, and consumer markets.

The STM32MP series targets Linux-capable heterogeneous computing applications where real-time responsiveness, security, and peripheral richness coexist - bridging the gap between microcontrollers and application processors.

FAQ

What boot sources does STM32MP133CAF3T support?

STM32MP133CAF3T supports boot from external memory via FSMC (NOR/NAND), SDMMC (SD/eMMC), USB device, UART, and SPI NOR flash. Boot mode is selected by BOOT0 and BOOT1 pins at power-on reset, with configuration latched before internal ROM execution begins.

Does STM32MP133CAF3T include hardware support for IEEE 1588 Precision Time Protocol?

Yes - both Ethernet MAC/GMAC peripherals integrate full IEEE 1588v2 hardware timestamping engines, supporting PTP event message capture with sub-100 ns resolution and hardware-assisted correction for ingress/egress delays.

How is TrustZone® implemented on STM32MP133CAF3T?

TrustZone® is implemented at both system and peripheral levels: the TZC enforces secure/non-secure DDR memory partitioning, while ETZPC gates access to peripherals (e.g., ADC, timers, GPIO) based on secure world privilege. Secure monitor firmware manages world switches and exception routing.

What is the maximum DDR memory bandwidth supported?

With DDR3-1066 (533 MHz) or LPDDR3-1066 in 16-bit configuration, the DDRCTRL achieves up to 1.7 GB/s theoretical bandwidth. Real-world sustained bandwidth depends on AXI traffic patterns, L2 cache hit rate, and DDR PHY tuning parameters.