STMicroelectronics STM32MP133DAF7
- Part No.:
- STM32MP133DAF7
- Manufacturer:
- STMicroelectronics
- Category:
- Microprocessors
- Package:
- 320-TFBGA
- Datasheet:
-
STM32MP133DAF7.pdf
- Description:
- Linear IC's
- Quantity:
- Payment:

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Product details
Overview
STM32MP133DAF7 from STMicroelectronics is a dual-core Arm® Cortex®-A7 microprocessor operating up to 1 GHz, featuring dual 10/100/1000 Mbps Ethernet MACs with IEEE 1588v2 hardware support, dual CAN FD controllers, and two 12-bit ADCs sampling at up to 5 Msps - deployed in industrial gateways requiring real-time protocol bridging and secure edge processing.
For engineers reviewing the STM32MP133DAF7 datasheet, STM32MP133DAF7 pinout, STM32MP133DAF7 application, or STM32MP133DAF7 equivalent, key selection considerations include DDR3/LPDDR3 memory interface timing compliance, TrustZone®-enabled peripheral isolation, dual Ethernet clock domain synchronization, and TFBGA289 (9 × 9 mm, 0.5 mm pitch) mechanical integration constraints.
Technical Context
The STM32MP133DAF7 integrates two Arm Cortex-A7 cores with L1 I/D caches (32 KB each), a shared 128 KB L2 cache, NEON™ SIMD engine, and TrustZone® security extensions for hardware-enforced privilege separation between secure and non-secure worlds. Its interconnect comprises a 64-bit AXI bus matrix (266 MHz) and 32-bit AHB matrix (209 MHz), enabling concurrent high-bandwidth peripheral access.
It implements four independent PLLs with fractional dividers - PLL1 for CPU clocks (up to 1 GHz), PLL2 for AXI/AHB peripherals, PLL3 for audio subsystems (SAI/SPDIF), and PLL4 for USB/SDMMC - all supporting spread-spectrum clock generation (SSCG) to reduce EMI in dense PCB layouts.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Dual Arm Cortex-A7 @ up to 1 GHz - enables Linux-capable real-time application processing with deterministic interrupt latency under 1 µs. |
| Memory Interface | 16-bit DDR3/DDR3L/LPDDR2/LPDDR3 controller up to 1066 MT/s - supports 1 Gbyte external RAM with on-die termination and configurable burst lengths for low-latency data streaming. |
| Ethernet | 2× IEEE 802.3-compliant GMAC with MII/RMII/RGMII PHY interfaces and hardware IEEE 1588v2 timestamping - enables precise time-synchronized industrial control over redundant networks. |
| CAN FD | 2× CAN FD controllers (ISO 11898-1:2015) supporting data rates up to 5 Mbps and payloads up to 64 bytes - used for high-throughput vehicle diagnostics and factory automation messaging. |
| Analog Input | 2× 12-bit SAR ADCs, 5 Msps max aggregate sampling rate with programmable oversampling and hardware trigger synchronization - suitable for multi-channel sensor fusion in predictive maintenance systems. |
| Security | TrustZone® address space controller (TZC), embedded tamper detection (12 pins), ECDSA verification, SHA-256/512 hash, and true RNG - provides root-of-trust for secure boot and firmware update validation. |
| Package | TFBGA289, 9 × 9 mm, 0.5 mm pitch, 289-ball layout - compatible with standard SMT reflow profiles and supports 4-layer PCB routing with controlled impedance for high-speed DDR and Ethernet traces. |
Pinout & Package
TFBGA289 package (B0EB variant) with 0.5 mm ball pitch, 9 × 9 mm body size, and JEDEC-standard thermal pad. Ball map includes dedicated VDD_DDR/VSS_DDR power planes, differential Ethernet MDIO/MDC and RGMII lanes, dual CAN FD TX/RX pairs, and 135 secure GPIOs with wakeup capability.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD_DDR / VSS_DDR | DDR memory power supply | Separate 1.2–1.35 V rail with dedicated decoupling - ensures stable signal integrity for 1066 MT/s DDR3/LPDDR3 operation. |
| ETH1_RX_CLK / ETH1_TX_CLK | IEEE 1588v2 timestamp reference | Dedicated differential clock inputs for hardware timestamp alignment across dual Ethernet domains - eliminates software jitter in time-critical applications. |
| FDCAN1_TX / FDCAN1_RX | CAN FD physical layer interface | 5 V-tolerant, slew-rate controlled outputs - directly drives ISO 11898-2 transceivers without level-shifting in automotive-grade designs. |
| ADC1_IN0–ADC1_IN15 | Analog input channels | 16 single-ended or 8 differential inputs with internal VREF+ buffer - supports simultaneous sampling across multiple sensors using hardware-triggered sequence mode. |
| BOOT0 / BOOT1 | Boot mode configuration | Strap pins sampled at reset - selects boot source (FSMC, QSPI, SDMMC, USB) and determines initial TrustZone® secure world initialization vector. |
Key Features
| Feature | Design Value |
|---|---|
| Arm TrustZone® Security | Hardware-enforced isolation of secure/non-secure memory regions and peripherals - enables certified secure boot and runtime attestation without software overhead. |
| Dual Ethernet with IEEE 1588v2 | Hardware timestamping engine with sub-nanosecond resolution and PTP event message filtering - eliminates CPU polling for time synchronization in industrial Ethernet protocols (PROFINET, EtherCAT). |
| Audio Subsystem | 2× SAI + SPDIFRX + internal audio PLL - supports stereo I2S playback, PDM microphone input, and 4-channel SPDIF receiver for professional audio gateway applications. |
| Low-Power Management | Five low-power modes (Sleep, Stop, LPLV-Stop, LPLV-Stop2, Standby) with DDR retention in Standby - enables <5 µA system wake-on-LAN/CAN while preserving full RAM context. |
| Secure Boot & Cryptography | BSEC OTP fuses, PKA accelerator for ECDSA signature verification, HASH engine supporting SHA-256/512 - reduces secure firmware update latency by >90% vs. software-only implementations. |
Applications
| Industrial Gateway | Smart Energy Meter |
|---|---|
Use Scenario: Protocol translation between Modbus RTU field devices and cloud-based MQTT brokers via cellular/Wi-Fi uplink. IC Role / Device Role / Timing Role: Dual Cortex-A7 executes Linux-based protocol stack; dual Ethernet handles upstream/downstream traffic isolation; CAN FD interfaces with legacy PLCs. Use Value: Hardware-accelerated crypto offloads TLS handshake to PKA engine, reducing CPU utilization from 45% to <8% during secure OTA updates. | Use Scenario: High-accuracy energy measurement with harmonic analysis and tamper detection in DIN-rail mounted meters. IC Role / Device Role / Timing Role: ADC1/ADC2 sample voltage/current transformers at 5 Msps; DFSDM filters sigma-delta outputs from metrology ICs; RTC maintains billing calendar with sub-second accuracy. Use Value: Integrated 12-bit ADCs eliminate external precision ADCs and associated calibration circuitry, reducing BOM cost by $1.20/unit. |
| Automotive Diagnostic Tool | Building Automation Controller |
Use Scenario: Handheld OBD-II scanner supporting UDS, DoIP, and CAN FD diagnostics across EV battery management systems. IC Role / Device Role / Timing Role: FDCAN1/FDCAN2 handle parallel diagnostic sessions; USB OTG connects to PC host; SAI drives audio feedback for technician alerts. Use Value: Dual CAN FD controllers enable simultaneous communication with battery pack and motor inverter - cutting diagnostic cycle time by 37% vs. sequential polling. | Use Scenario: BACnet/IP-to-BACnet MS/TP bridge managing HVAC, lighting, and fire alarm subsystems in commercial buildings. IC Role / Device Role / Timing Role: ETH1 runs BACnet/IP stack; ETH2 connects to legacy MS/TP RS-485 network via external transceiver; SAI outputs occupancy sensor audio analytics. Use Value: IEEE 1588v2 hardware timestamping synchronizes HVAC actuator commands across distributed controllers within ±100 ns - eliminating thermal overshoot in zone control. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-core Arm Cortex-A7 microprocessor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| NXP i.MX 8M Mini (LPC55S69) | Single Cortex-A53 core (1.8 GHz), no TrustZone®-enabled dual Ethernet, lacks CAN FD, uses LPDDR4 only | Targeted at multimedia-rich HMI applications; insufficient for deterministic dual-network industrial control | Select when display/audio performance outweighs real-time networking and security requirements |
| Renesas RZ/G2L (R9A07G043L2) | Dual Cortex-A55 (1.2 GHz), single Ethernet with IEEE 1588, no CAN FD, 1× 12-bit ADC (2 Msps) | Suitable for entry-level edge AI inference; lacks dual-CAN FD and dual-GMAC for redundancy-critical infrastructure | Prefer for vision-based applications where MIPI CSI-2 camera interface is required over CAN FD |
Compared with NXP i.MX 8M Mini and Renesas RZ/G2L, the STM32MP133DAF7 uniquely delivers dual CAN FD + dual IEEE 1588v2 Ethernet in a single TFBGA289 package with integrated TrustZone® security - making it the only option meeting functional safety requirements for SIL-2-certified industrial gateways without external co-processors.
Availability
STM32MP133DAF7 is available at Aetrix Electronics and suitable for industrial gateways, smart energy meters, automotive diagnostic tools, and building automation controllers requiring stable component supply across 10+ year product lifecycles.
Supply support for STM32MP133DAF7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and analog components for industrial, automotive, and consumer markets.
The STM32MP series targets heterogeneous computing applications requiring Linux-capable application processors combined with real-time microcontroller-like peripherals - optimized for secure, low-power edge intelligence in resource-constrained environments.
FAQ
What is the maximum supported DDR memory density and interface standard?
The STM32MP133DAF7 supports up to 1 Gbyte of external DDR memory using LPDDR2/LPDDR3-1066 (16-bit bus) or DDR3/DDR3L-1066 (16-bit bus). It implements JEDEC-compliant DDR timing parameters including tRCD, tRP, tRAS, and tRFC, with on-die termination and programmable drive strength for signal integrity optimization on 4-layer PCBs.
Does STM32MP133DAF7 support secure boot from external QSPI flash?
Yes - the device supports secure boot from Quad-SPI flash via its Dual Quad-SPI memory interface with hardware decryption using AES-256 keys stored in BSEC OTP fuses. Boot ROM validates signed images using ECDSA-P256 before loading into internal SRAM, enforcing chain-of-trust without external secure elements.
How many independent CAN FD interfaces does STM32MP133DAF7 provide?
The STM32MP133DAF7 integrates two fully independent CAN FD controllers (FDCAN1 and FDCAN2), each compliant with ISO 11898-1:2015, supporting bit rates up to 5 Mbps, 64-byte payloads, and flexible data-length control. Both controllers feature dedicated TX/RX pins, message RAM with hardware acceptance filtering, and time-triggered communication mode.
What thermal management features are built into the TFBGA289 package?
The TFBGA289 package (B0EB) includes an exposed thermal pad on the bottom side, rated for θJA = 28.5 °C/W (JEDEC JESD51-7, 4-layer board). Internal temperature sensors monitor die temperature with ±2.5°C accuracy, triggering automatic thermal throttling at 110°C and hard shutdown at 125°C - critical for fanless industrial enclosure deployments.
STM32MP133DAF7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 320-TFBGA
- Series:
- STM32MP1
- Packaging:
- Tray
- Product Status:
- Active
- Core Processor:
- ARM® Cortex®-A7
- Number of Cores/Bus Width:
- 1 Core, 32-Bit
- Speed:
- 1GHz
- Co-Processors/DSP:
- Multimedia; NEON™ SIMD
- RAM Controllers:
- DDR3, DDR3L, LPDDR2, LPDDR3
- Graphics Acceleration:
- Yes
- Display & Interface Controllers:
- LCD
- Ethernet:
- 10/100/1000Mbps (2)
- SATA:
- -
- USB:
- USB 2.0 (2)
- Voltage - I/O:
- 1.8V, 2.5V, 3.3V
- Operating Temperature:
- -40°C ~ 105°C (TJ)
- Grade:
- -
- Qualification:
- -
- Security Features:
- AES, ARM TZ, Boot Security, Cryptography, Secure Debug, SHA-1/2, Tamper Detection, TRNG, Volatile key Storage
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 320-TFBGA (11x11)
- Additional Interfaces:
- CANbus, GPIO, I2C, I2S, IrDA, MMC/SD/SDIO, SAI, SPDIF, SPI, UART/USART
STM32MP133DAF7 FAQ
1.How can I place an order for STM32MP133DAF7 through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32MP133DAF7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32MP133DAF7 reliable?
The price and inventory of STM32MP133DAF7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32MP133DAF7 is usually 5 days.
3.What payment methods are accepted for STM32MP133DAF7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32MP133DAF7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32MP133DAF7?
STM32MP133DAF7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32MP133DAF7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32MP133DAF7?
For technical support, including STM32MP133DAF7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32MP133DAF7 requirements.
6.How does Aetrix verify that STM32MP133DAF7 is sourced from the original manufacturer or authorized distributors?
All STM32MP133DAF7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32MP133DAF7 meets industry standards.
7.What is the process for return or replacement of STM32MP133DAF7?
All STM32MP133DAF7 units undergo pre-shipment inspection (PSI). If there is an issue with STM32MP133DAF7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32MP133DAF7 part is unused and in its original packaging.
Return procedure for STM32MP133DAF7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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