STMicroelectronics STM32MP133DAG7

Overview

STM32MP133DAG7 from STMicroelectronics is a dual-core Arm® Cortex®-A7 microprocessor unit (MPU) operating up to 1 GHz, featuring dual 10/100/1000 Mbps Ethernet MACs with IEEE 1588v2 hardware support, two CAN FD controllers, and dual 12-bit ADCs sampling at up to 5 Msps. It integrates 128 KB L2 cache, TrustZone® security, and supports LPDDR3-1066/DDR3L-1066 external memory - deployed in industrial gateways requiring real-time networking, secure firmware updates, and analog sensor fusion.

For engineers reviewing the STM32MP133DAG7 datasheet, STM32MP133DAG7 pinout, STM32MP133DAG7 application, or STM32MP133DAG7 equivalent, key selection criteria include its dual-Cortex-A7 architecture with NEON™ and TrustZone®, 2×CAN FD + 2×Gigabit Ethernet capability, DDR3/LPDDR3 memory controller timing compliance, and TFBGA289 (9 × 9 mm, 0.5 mm pitch) package mechanical constraints.

Technical Context

The STM32MP133DAG7 implements a heterogeneous dual-core Arm Cortex-A7 subsystem with independent L1 instruction/data caches (32 KB each), unified 128 KB L2 cache, and hardware virtualization support via Arm Generic Timer and TrustZone Address Space Controller (TZC). Its interconnect uses a 64-bit AXI bus matrix (266 MHz) and 32-bit AHB matrix (209 MHz) to coordinate CPU, DMA, and peripheral access.

It integrates four fractional PLLs for precise clock domain separation: PLL1 for CPU clocks (up to 1 GHz), PLL2 for peripheral clocks (e.g., Ethernet, USB), PLL3/PLL4 for audio/video domains (SAI, SPDIF), and USB_PLL for high-speed PHY operation - enabling deterministic latency control across real-time Ethernet, CAN FD, and audio streaming paths.

Key Specifications

Pinout & Package

STM32MP133DAG7 is housed in a TFBGA289 package (9 × 9 mm, 0.5 mm ball pitch), compliant with ECOPACK2 environmental standards. Pin definitions follow ST's documented ball map (DS13876 Rev 7, Section 7.2), with dedicated power domains (VDDCORE, VDDIO, VDDQ_DDR), differential clock inputs (HSE, LSE), and function-multiplexed I/Os supporting up to 135 secure GPIOs.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-core Arm Cortex-A7 MPU applications.

Compared with STM32MP133DAG7, the STM32MP157C-DK2 sacrifices CAN FD and dual-GbE for GPU acceleration, while the i.MX 8M Mini trades deterministic time-sync capability for broader multimedia support - making STM32MP133DAG7 uniquely suited for time-critical industrial networking with embedded security.

Availability

STM32MP133DAG7 is available at Aetrix Electronics and suitable for industrial gateways, smart energy meters, building automation controllers, and medical edge analytics nodes requiring stable component supply, long-term lifecycle assurance, and full traceability.

Supply support for STM32MP133DAG7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power ICs, sensors, and analog/mixed-signal devices for industrial, automotive, and consumer markets.

The STM32MP series targets heterogeneous edge computing applications, combining real-time Linux-capable application processors with microcontroller-like peripheral integration and hardware security - specifically engineered for secure, deterministic industrial IoT endpoints.

FAQ

What is the maximum supported DDR memory configuration for STM32MP133DAG7?

The STM32MP133DAG7 supports up to 1 Gbyte of external DDR memory via its 16-bit interface, compatible with DDR3/DDR3L-1066 and LPDDR2/LPDDR3-1066 standards. It includes built-in 8-bit ECC support in the Flexible Memory Controller (FMC) for SLC NAND and parallel memories, but DDR ECC requires external DRAM with on-die ECC capability.

Does STM32MP133DAG7 support secure boot from eMMC or SD card?

Yes - STM32MP133DAG7 supports authenticated secure boot from SDMMC1/SDMMC2 interfaces using cryptographic verification of the first-stage bootloader (FSBL) stored in eMMC boot partitions or SD card sectors. The BSEC block enforces signature validation via ECDSA-P256 against keys fused in OTP, with rollback protection enabled by monotonic counters.

How many independent CAN FD interfaces does STM32MP133DAG7 provide, and what is their maximum bit rate?

The STM32MP133DAG7 integrates two fully independent CAN FD controllers (FDCAN1 and FDCAN2), each supporting classical CAN and CAN FD modes. In CAN FD mode, they achieve up to 5 Mbps in the data phase (with arbitration phase up to 1 Mbps), with programmable bit timing, flexible data length (up to 64 bytes), and hardware message filtering.

Is the TFBGA289 package of STM32MP133DAG7 compatible with standard reflow profiles?

Yes - the TFBGA289 package (9 × 9 mm, 0.5 mm pitch) is qualified for standard lead-free reflow soldering per JEDEC J-STD-020, with peak temperature up to 260 °C. ST specifies a maximum moisture sensitivity level (MSL) of 3, requiring bake-out if exposed >168 hours at ambient conditions before assembly.