STMicroelectronics STM32MP133FAF7

Overview

STM32MP133FAF7 from STMicroelectronics is a dual-core Arm® Cortex®-A7 microprocessor operating up to 1 GHz, featuring 2× Ethernet MAC/GMAC (IEEE 1588v2), 2× CAN FD controllers, 2× 12-bit ADCs (5 Msps), hardware crypto acceleration (AES-256, PKA, HASH), and TrustZone®-enabled security architecture. It targets Linux-capable industrial HMI, edge gateway, and secure IoT edge node applications requiring real-time I/O, deterministic networking, and on-the-fly DRAM encryption.

For engineers reviewing the STM32MP133FAF7 datasheet, STM32MP133FAF7 pinout, STM32MP133FAF7 application, or STM32MP133FAF7 equivalent, key selection considerations include its LFBGA289 (14 × 14 mm, 0.8 mm pitch) package, dual-bus matrix interconnect (AXI @ 266 MHz / AHB @ 209 MHz), 135 secure GPIOs with interrupt capability, and support for LPDDR3-1066/DDR3L-1066 external memory up to 1 Gbyte.

Technical Context

The STM32MP133FAF7 integrates two Arm Cortex-A7 cores with NEON™ and TrustZone®, unified 128-Kbyte L2 cache, and dual AMBA® interconnects - a 64-bit AXI bus (266 MHz) for high-bandwidth peripherals and a 32-bit AHB bus (209 MHz) for legacy IP. Its memory subsystem supports DDR3L/LPDDR3-1066 via a dedicated controller with 8-bit ECC and includes 168 Kbytes of on-chip SRAM (128 KB AXI SYSRAM + 32 KB AHB SRAM + 8 KB Backup SRAM).

Security is implemented at silicon level: Secure Boot, TrustZone-peripherals, 12 tamper pins (5 active), BSEC OTP fuses (3072 bits including 256-bit HUK), and hardware-accelerated AES-256 with DPA protection. Clocking uses four fractional PLLs, internal oscillators (64 MHz HSI, 4 MHz CSI, 32 kHz LSI), and external sources (8–48 MHz HSE, 32.768 kHz LSE).

Key Specifications

Pinout & Package

LFBGA289 package (14 × 14 mm, 0.8 mm pitch, B0ED variant) with 289 solder balls. Ball layout follows ST's standardized STM32MP13x pin mapping, supporting dual-voltage I/O (1.71–3.6 V) with 5 V tolerance on selected pins.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-core Arm Cortex-A7 microprocessor applications.

Compared with STM32MP133FAF7, the STM32MP157C-DK2 trades analog/audio precision for broader ecosystem support, while the i.MX 8M Mini prioritizes multimedia throughput over certified security primitives - making the STM32MP133FAF7 optimal for safety- and security-critical edge nodes where tamper resistance and on-the-fly DRAM encryption are mandatory.

Availability

STM32MP133FAF7 is available at Aetrix Electronics and suitable for industrial HMI terminals, secure edge gateways, and medical edge nodes requiring stable component supply, long-term lifecycle assurance, and traceable sourcing for ISO 13485 and IEC 62443-compliant designs.

Supply support for STM32MP133FAF7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power ICs, sensors, and automotive-grade processors with emphasis on energy efficiency, reliability, and functional safety.

The STM32MP series is ST's heterogeneous multicore MPUs targeting Linux-capable embedded applications needing real-time responsiveness, hardware-enforced security, and industrial-grade peripheral integration - bridging the gap between microcontrollers and application processors.

FAQ

What boot sources does the STM32MP133FAF7 support?

The STM32MP133FAF7 supports five primary boot sources selected via BOOT0/BOOT1 strapping: Quad-SPI flash, parallel NOR/NAND via Flexible Memory Controller (FMC), SD/eMMC via SDMMC, USB device mode, and UART. Each path enforces Secure Boot with signature verification using keys stored in BSEC OTP fuses, and boot firmware is loaded into internal SRAM before execution.

Does the STM32MP133FAF7 include hardware support for IEEE 1588 Precision Time Protocol?

Yes - both integrated Ethernet MAC/GMAC blocks (ETH1 and ETH2) implement full IEEE 1588v2 hardware timestamping, including PTP event message capture, transparent clock correction, and hardware-assisted delay measurement. This enables sub-microsecond time synchronization in industrial automation and power grid applications without CPU intervention.

How is TrustZone implemented on the STM32MP133FAF7?

TrustZone is implemented at multiple levels: Arm-defined secure monitor and secure world exception handling, TrustZone Address Space Controller (TZC) for DDR memory region protection, TrustZone Protection Controller (ETZPC) for peripheral access control, and secure boot enforced by BSEC. All 135 GPIOs, timers, ADCs, and communication peripherals can be assigned secure/non-secure attributes via ETZPC registers at runtime.

What is the maximum DDR memory bandwidth supported by the STM32MP133FAF7?

The STM32MP133FAF7 DDR controller supports LPDDR3-1066 and DDR3L-1066 at 16-bit bus width, delivering up to 2.1 GB/s theoretical peak bandwidth (1066 MT/s × 2 bytes). Actual sustained bandwidth depends on memory configuration, AXI bus arbitration, and L2 cache hit rate - measured at ~1.4 GB/s in typical Linux workloads with DDR3L-1066.