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STMicroelectronics STM32MP135AAE3
- Part No.:
- STM32MP135AAE3
- Manufacturer:
- STMicroelectronics
- Category:
- Microprocessors
- Package:
- -
- Datasheet:
-
STM32MP135AAE3.pdf
- Description:
- 32-BIT ARM CORTEX-A7 650MHZ MPU
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Inventory:139
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Product details
Overview
STM32MP135AAE3 from STMicroelectronics is a dual-core Arm® Cortex®-A7 microprocessor operating up to 1 GHz, integrating LCD-TFT controller, dual CAN FD interfaces, dual 12-bit ADCs (5 Msps), and dual Gigabit Ethernet MACs with IEEE 1588v2 support - deployed in industrial HMIs, edge gateways, and smart building controllers requiring real-time Linux-capable processing with hardware security.
For engineers reviewing the STM32MP135AAE3 datasheet, STM32MP135AAE3 pinout, STM32MP135AAE3 application, or STM32MP135AAE3 equivalent, key selection criteria include TrustZone®-enabled secure boot, DDR3/LPDDR3 memory controller compatibility, camera interface timing (120 MHz pixel clock), and dual-USB HS/OTG concurrency support.
Technical Context
The STM32MP135AAE3 implements a heterogeneous dual-Cortex-A7 subsystem with 128 KB unified L2 cache, Arm NEON™ for signal processing acceleration, and TrustZone® for hardware-enforced isolation between secure and non-secure worlds. It integrates dedicated peripherals including DCMIPP for camera pipe processing and LTDC with dual-layer RGB888 output up to Full HD @30 fps.
Its interconnect architecture features a 64-bit AXI bus matrix (266 MHz) and 32-bit AHB matrix (209 MHz), enabling concurrent high-bandwidth access to DDR, SRAM, and peripherals. The device supports boot from Quad-SPI, SDMMC, or NAND via configurable boot ROM with BSEC-managed OTP fuses and tamper detection on 12 pins.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Dual Arm® Cortex®-A7 @ up to 1 GHz - enables Linux-based real-time applications with SMP support and virtualization-ready architecture. |
| Memory Interface | 16-bit DDR3/DDR3L/LPDDR2/LPDDR3 controller up to 1066 MT/s - supports up to 1 Gbyte external RAM with ECC capability for industrial reliability. |
| Security | Arm TrustZone®, 12 tamper pins (5 active), BSEC OTP fuses (3072-bit), ECDSA verification, HASH (SHA-256/512), RNG - meets IEC 62443-3-3 SL2 requirements. |
| Camera Interface | 8–16-bit parallel DCMIPP supporting 3 Mpix @30 fps or 5 Mpix @15 fps color/monochrome - eliminates need for external image co-processors in vision-enabled edge nodes. |
| Display Controller | LCD-TFT (LTDC) with 24-bit RGB888, WXGA @60 fps or Full HD @30 fps, 90 MHz pixel clock, two programmable layers - drives high-resolution industrial panels without external TCON. |
| Connectivity | 2× CAN FD, 2× Gigabit Ethernet (MII/RMII/RGMII + IEEE 1588v2), 2× USB 2.0 HS Host/OTG, 5× I2C, 4× UART/USART, 5× SPI - supports deterministic fieldbus-to-cloud bridging. |
| Analog Peripherals | 2× 12-bit ADCs (5 Msps), DFSDM (4-channel sigma-delta filter), internal temperature sensor - enables local analog sensing and motor control feedback without external ADCs. |
Pinout & Package
STM32MP135AAE3 is packaged in LFBGA289 (14 × 14 mm, 0.8 mm pitch), compliant with ECOPACK2 environmental standards. This package provides 289 I/O balls with optimized signal integrity for high-speed DDR, USB, and Ethernet routing.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDDCORE | Core power supply | 1.1 V ±5% regulated input for CPU and L2 cache - requires low-noise, high-PSRR LDO or PMIC regulation. |
| VDDQ_DDR | DDR I/O power supply | 1.2 V or 1.35 V supply for DDR data/address bus - must be sequenced after VDDCORE and synchronized with DDR controller initialization. |
| NRST | Active-low reset input | Asynchronous reset pin with internal pull-up; asserts system-wide reset when held low for ≥20 µs - used for cold start and watchdog recovery. |
| BOOT0 | Boot mode selection | Configures primary boot source (Quad-SPI, SDMMC, NAND) at power-on reset - sampled during POR sequence and latched internally. |
| ETH1_RXD0–3 / TXD0–3 | Gigabit Ethernet PHY interface | RMII/RGMII-compatible differential pairs - supports 10/100/1000 Mbps operation with IEEE 1588v2 timestamping in hardware. |
| DCMI_D0–15 / HSYNC / VSYNC / PIXCLK | Parallel camera interface | 8–16-bit pixel data bus with frame synchronization signals - supports direct connection to CMOS image sensors up to 120 MHz pixel clock. |
Key Features
| Feature | Design Value |
|---|---|
| TrustZone®-enabled secure boot | Hardware-enforced separation of secure firmware (ROM loader, BSEC, TZC) from non-secure OS - prevents unauthorized code execution and memory access. |
| Dual independent watchdogs (IWDG1/IWDG2) | Separate reset domains for secure and non-secure worlds - ensures fail-safe recovery even if one execution context hangs or is compromised. |
| Flexible memory controller (FMC) | Supports SLC NAND with 8-bit ECC and NOR/PSRAM with asynchronous timing - enables cost-effective local storage for firmware updates and logging. |
| Audio subsystem (SAI + SPDIFRX) | 2× SAI interfaces (I2S/PDM/SPDIF Tx) + 4-input SPDIF Rx - delivers full-duplex audio I/O for voice-enabled HMI and industrial telephony. |
| Low-power modes with DDR retention | Standby mode retains DDR contents at ~10 µA - allows instant resume from deep sleep while preserving full Linux state and application context. |
Applications
| Industrial HMI | Edge Gateway |
|---|---|
Use Scenario: Touchscreen-based operator interface for PLC-controlled machinery with real-time diagnostics and remote maintenance. IC Role / Device Role / Timing Role: Main application processor running embedded Linux, driving 1080p TFT display via LTDC and handling CAN FD fieldbus communication. Use Value: Integrated TrustZone® and dual CAN FD eliminate need for external security co-processor and protocol translators, reducing BOM count and board area. |
Use Scenario: Protocol-agnostic gateway aggregating Modbus RTU, EtherNet/IP, and MQTT traffic for cloud telemetry in smart factories. IC Role / Device Role / Timing Role: Dual-core A7 executes containerized protocol stacks while hardware-accelerated crypto secures TLS/MQTT sessions. Use Value: Dual Gigabit Ethernet with IEEE 1588v2 enables precise time-synchronized data acquisition across distributed sensors without external PTP hardware. |
| Smart Building Controller | Video Analytics Edge Node |
Use Scenario: HVAC and lighting controller with occupancy sensing, energy metering, and BACnet/IP connectivity. IC Role / Device Role / Timing Role: Real-time Linux host managing multiple I2C temperature/humidity sensors, SDMMC-based logging, and dual Ethernet for redundancy. Use Value: On-chip 12-bit ADCs and DFSDM allow direct analog sensor interfacing, avoiding external signal conditioning and reducing calibration overhead. |
Use Scenario: Local video analytics node performing motion detection and people counting using onboard camera input. IC Role / Device Role / Timing Role: DCMIPP processes raw Bayer data from CMOS sensor; NEON™ accelerates OpenCV kernels; LTDC overlays analytics results on display. Use Value: Parallel camera interface with 120 MHz pixel clock and integrated ISP pipeline offloads preprocessing from CPU, extending battery life in portable deployments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-core Arm A-class microprocessor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| NXP i.MX 8M Mini (LPC55S69) | Single Cortex-A53 core (1.8 GHz), no TrustZone®-secured boot ROM, lacks integrated LTDC and DCMIPP. | Better suited for headless IoT gateways; requires external display controller and image processor for HMI/vision use cases. | Select when higher single-thread CPU performance is prioritized over integrated graphics/camera and hardware root-of-trust. |
| Renesas RZ/G2L (R9A07G043L2) | Single Cortex-A55 (1.2 GHz), includes 3D GPU but no CAN FD; TrustZone® implemented only in software-assisted mode. | Targeted at multimedia-rich consumer displays; limited industrial fieldbus support compared to STM32MP135's dual CAN FD + dual Ethernet. | Prefer for Android-based infotainment where GPU acceleration matters more than industrial protocol integration or hardware tamper detection. |
Compared with NXP i.MX 8M Mini and Renesas RZ/G2L, the STM32MP135AAE3 uniquely combines dual Cortex-A7 cores, hardware-enforced TrustZone®, integrated LCD-TFT and camera interfaces, and dual CAN FD - making it the only option among the three qualified for safety-critical industrial HMIs requiring both real-time responsiveness and certified secure boot.
Availability
STM32MP135AAE3 is available at Aetrix Electronics and suitable for industrial HMIs, edge gateways, and smart building controllers requiring stable component supply, long-term lifecycle assurance, and automotive-grade reliability under extended temperature ranges.
Supply support for STM32MP135AAE3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in microcontrollers, power management, sensors, and automotive ICs - with over 40 years of industrial-grade silicon design expertise.
The STM32MP series targets Linux-capable embedded applications demanding hardware security, rich peripheral integration, and industrial longevity - designed specifically for edge computing nodes that bridge legacy fieldbuses with modern cloud infrastructure.
FAQ
What boot sources does the STM32MP135AAE3 support?
The STM32MP135AAE3 supports boot from Quad-SPI flash, SD/eMMC, NAND flash (with 8-bit ECC), and USB mass storage via its embedded ROM bootloader. Boot mode is selected by BOOT0 and BOOT1 pins sampled at power-on reset, and verified against secure hash in BSEC OTP before executing first-stage firmware.
Does the STM32MP135AAE3 include hardware cryptographic acceleration?
Yes - it integrates dedicated hardware blocks including HASH (SHA-256/512), HMAC, ECDSA signature verification with side-channel attack resistance, a true random number generator (TRNG) with three independent oscillators, and PKA for modular arithmetic - all accessible via TrustZone®-protected drivers in OP-TEE or Linux kernel crypto API.
What is the maximum resolution and refresh rate supported by the LTDC?
The LTDC supports up to Full HD (1920 × 1080) at 30 fps with 24-bit RGB888 output and a maximum pixel clock of 90 MHz. It also supports WXGA (1366 × 768) at 60 fps, and includes two independent display layers - one secured via TrustZone® - enabling overlay of secure UI elements like PIN entry fields.
How many simultaneous USB interfaces can operate on the STM32MP135AAE3?
The STM32MP135AAE3 supports either two USB 2.0 High-Speed Host ports or one Host + one OTG port simultaneously. Both share the same PHY but are independently controllable via the USBH and USB_OTG registers, enabling concurrent attachment of a USB camera and a USB flash drive without hub dependency.
STM32MP135AAE3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- -
- Series:
- -
- Packaging:
- Tray
- Product Status:
- Active
- Core Processor:
- -
- Number of Cores/Bus Width:
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- Speed:
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- Co-Processors/DSP:
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- RAM Controllers:
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- Graphics Acceleration:
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- Display & Interface Controllers:
- -
- Ethernet:
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- SATA:
- -
- USB:
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- Voltage - I/O:
- -
- Operating Temperature:
- -
- Grade:
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- Supplier Device Package:
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STM32MP135AAE3 FAQ
1.How can I place an order for STM32MP135AAE3 through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32MP135AAE3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32MP135AAE3 reliable?
The price and inventory of STM32MP135AAE3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32MP135AAE3 is usually 5 days.
3.What payment methods are accepted for STM32MP135AAE3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32MP135AAE3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32MP135AAE3?
STM32MP135AAE3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32MP135AAE3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32MP135AAE3?
For technical support, including STM32MP135AAE3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32MP135AAE3 requirements.
6.How does Aetrix verify that STM32MP135AAE3 is sourced from the original manufacturer or authorized distributors?
All STM32MP135AAE3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32MP135AAE3 meets industry standards.
7.What is the process for return or replacement of STM32MP135AAE3?
All STM32MP135AAE3 units undergo pre-shipment inspection (PSI). If there is an issue with STM32MP135AAE3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32MP135AAE3 part is unused and in its original packaging.
Return procedure for STM32MP135AAE3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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