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STMicroelectronics STM32MP135DAF7T
- Part No.:
- STM32MP135DAF7T
- Manufacturer:
- STMicroelectronics
- Category:
- Microprocessors
- Package:
- 320-TFBGA
- Datasheet:
-
STM32MP135DAF7T.pdf
- Description:
- Linear IC's
- Quantity:
- Payment:
- Shipping:
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Product details
Overview
STM32MP135DAF7T from STMicroelectronics is a dual-core Arm® Cortex®-A7 microprocessor unit (MPU) operating up to 1 GHz, integrating LCD-TFT controller, dual CAN FD interfaces, dual 12-bit ADCs (5 Msps), and hardware-accelerated cryptography (SHA-256, ECDSA, RNG). It targets industrial HMI, edge gateway, and smart camera applications requiring secure Linux-capable processing with real-time peripheral support.
For engineers reviewing the STM32MP135DAF7T datasheet, STM32MP135DAF7T pinout, STM32MP135DAF7T application, or STM32MP135DAF7T equivalent, key selection criteria include DDR3/LPDDR3 memory interface timing, TrustZone®-enabled secure boot flow, 289-ball LFBGA package layout, and dual Ethernet MAC + CAN FD coexistence in deterministic networking stacks.
Technical Context
The STM32MP135DAF7T implements a dual-core Arm Cortex-A7 subsystem with 128 KB unified L2 cache, NEON™ SIMD engine, and TrustZone® for hardware-enforced secure/non-secure world isolation. Its interconnect matrix comprises a 64-bit AXI bus (266 MHz) and 32-bit AHB bus (209 MHz), enabling concurrent high-bandwidth DDR access and low-latency peripheral control.
It integrates two independent FDCAN controllers compliant with ISO 11898-1:2015 (CAN FD), supporting data rates up to 5 Mbit/s and payloads up to 64 bytes. The dual 12-bit ADCs operate at 5 Msps with programmable sampling windows and hardware oversampling, directly feeding into DMA-controlled audio or sensor fusion pipelines.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Dual Arm Cortex-A7 @ up to 1 GHz - enables Linux RTOS execution with deterministic interrupt latency under 10 µs |
| Memory Interface | 16-bit DDR3/DDR3L/LPDDR2/LPDDR3 up to 1066 MT/s - supports 1 Gbyte external SDRAM with ECC-capable FMC |
| Secure Peripherals | TrustZone® address space controller (TZC), 12 tamper pins (5 active), BSEC OTP - enforces secure boot chain and runtime memory partitioning |
| Graphics | LCD-TFT controller with 24-bit RGB888, 90 MHz pixel clock - drives WXGA (1366×768@60 fps) or Full HD (1920×1080@30 fps) panels directly |
| Connectivity | 2× FDCAN, 2× Gigabit Ethernet (IEEE 1588v2), 5× I2C, 4× UART/USART, 5× SPI - meets industrial fieldbus and time-sensitive networking requirements |
| Analog | 2× 12-bit ADCs (5 Msps), DFSDM (4-channel sigma-delta filter), internal temp sensor - enables multi-sensor acquisition without external signal conditioning |
| Package | LFBGA289 (14 × 14 mm, 0.8 mm pitch) - compatible with standard PCB assembly processes and thermal vias for 2.5 W typical power dissipation |
Pinout & Package
LFBGA289 (14 × 14 mm, 0.8 mm pitch) package with 289 I/O balls, ECOPACK2-compliant, optimized for thermal dissipation and high-density routing in industrial PCBs.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDDCORE | Core power supply | 1.1 V ±5% regulated input for CPU and L2 cache - requires low-noise 10 µF ceramic decoupling per bank |
| VDDIO_1 | I/O bank 1 supply | 1.71–3.6 V tolerant rail - supports mixed-voltage logic interfacing (e.g., 1.8 V SDMMC + 3.3 V UART) |
| NRST | Active-low reset input | Synchronous deassertion after 20 µs power-on reset pulse - triggers full system initialization including TrustZone® secure monitor |
| BOOT0 | Boot mode selection | High at power-up selects primary boot from Quad-SPI flash - enables fail-safe firmware recovery via secondary eMMC path |
| ETH1_RXD0–3 | Gigabit Ethernet receive data | LVCMOS 2.5 V inputs synchronized to ETH1_REF_CLK - require matched trace length ≤15 mm for <10 ps skew |
| FDCAN1_TX | CAN FD transmit output | High-speed differential driver (ISO 11898-2) - connects directly to isolated CAN transceiver (e.g., TJA1145) without external bias |
Key Features
| Feature | Design Value |
|---|---|
| Hardware Cryptographic Acceleration | SHA-256/384/512, HMAC, ECDSA verification, and 6-oscillator TRNG - reduces Linux kernel crypto overhead by >90% vs. software-only implementation |
| Dual Independent FDCAN Controllers | Full CAN FD protocol stack (ISO 11898-1:2015), 5 Mbit/s data rate, 64-byte payload - enables simultaneous vehicle diagnostics (UDS) and real-time actuator control |
| Integrated LCD-TFT Controller | Two overlay layers (one secured), programmable color LUT, 90 MHz pixel clock - eliminates external display bridge IC in HMI designs |
| Low-Power System Management | Five low-power modes (Stop, LPLV-Stop2, Standby), DDR retention in Standby, backup regulator (~0.9 V) - extends battery life in always-on edge gateways |
| Flexible Memory Interfaces | Dual Quad-SPI, FMC with NAND/SRAM/PSRAM support, 16-bit DDR controller - allows boot from SPI flash and runtime expansion via eMMC or LPDDR3 |
Applications
| Industrial HMI Panel | Smart Edge Gateway |
|---|---|
Use Scenario: Touch-enabled operator interface for PLC-controlled machinery with local data logging and remote diagnostics. IC Role / Device Role / Timing Role: Main application processor running Yocto Linux, driving 1024×600 TFT display via LTDC and handling Modbus TCP over dual Ethernet ports. Use Value: Integrated TrustZone® isolates HMI UI from secure firmware update partition, while dual CAN FD links to servo drives without external protocol translators. | Use Scenario: Protocol-agnostic field device aggregator connecting legacy RS-485 sensors and modern wireless endpoints to cloud infrastructure. IC Role / Device Role / Timing Role: Dual-core MPU executing containerized edge AI inference (A7 core) and real-time protocol bridging (RTOS on second core). Use Value: Hardware-accelerated SHA-256 ensures OTA firmware signature verification in <50 ms, meeting IEC 62443-3-3 SL2 integrity requirements. |
| Embedded Vision Camera | Secure Industrial Controller |
Use Scenario: Low-latency machine vision node capturing 1280×720@30 fps monochrome video for defect detection in production lines. IC Role / Device Role / Timing Role: Image acquisition processor using DCMIPP pipeline, feeding frames to OpenCV via DMA to DDR3, with timestamping via IEEE 1588v2 Ethernet. Use Value: 120 MHz pixel clock support and 8–16-bit parallel camera interface eliminate FPGA preprocessing stage, reducing BOM cost by $3.20/unit. | Use Scenario: Safety-monitored motor control unit with SIL2 compliance, requiring secure boot, runtime tamper detection, and watchdog supervision. IC Role / Device Role / Timing Role: Secure MPU managing encrypted firmware execution, monitoring 5 active tamper pins, and triggering safe shutdown via GPIO-controlled relay drivers. Use Value: On-chip BSEC fuses and ETZPC enforce immutable root-of-trust, eliminating need for external secure element in UL 61800-5-2 certified designs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-core ARM MPU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| NXP i.MX 8M Mini (LPC55S69) | Single Cortex-A53 core (1.8 GHz), no integrated LCD-TFT controller, lacks CAN FD hardware | Better suited for audio-centric edge AI; requires external display bridge and CAN transceiver | Select when prioritizing higher single-thread CPU performance over integrated graphics and automotive bus support |
| Renesas RZ/G2L (R9A07G043L2) | Dual Cortex-A55 (1.2 GHz), integrated 2D GPU but no TrustZone®-secured boot ROM, only one CAN FD channel | Optimized for multimedia-rich IoT gateways; limited security certification scope vs. STM32MP135's PSA Certified Level 2 | Select when needing OpenGL ES 3.1 acceleration and MIPI-CSI2 camera interface over dual CAN FD and hardware crypto acceleration |
Compared with NXP i.MX 8M Mini and Renesas RZ/G2L, the STM32MP135DAF7T uniquely combines dual Cortex-A7 cores, integrated LCD-TFT controller, dual CAN FD, and PSA Certified Level 2 security - making it the only option among the three qualified for safety-critical industrial HMIs requiring simultaneous display, fieldbus, and secure firmware updates.
Availability
STM32MP135DAF7T is available at Aetrix Electronics and suitable for industrial HMI, edge gateway, and embedded vision applications requiring stable component supply across extended product lifecycles (10+ years).
Supply support for STM32MP135DAF7T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power ICs, sensors, and automotive-grade processors.
The STM32MP series targets Linux-capable embedded applications demanding real-time responsiveness, hardware security, and rich peripheral integration - specifically engineered for industrial automation, smart infrastructure, and edge AI endpoints.
FAQ
What boot sources does the STM32MP135DAF7T support?
The STM32MP135DAF7T supports boot from Quad-SPI flash (primary), eMMC/SD card, NAND flash via FMC, and USB mass storage. Boot mode is selected via BOOT0/BOOT1 pins, with fallback to secondary source if primary fails CRC validation - all enforced by hardware-secured BSEC and TrustZone®-protected ROM code.
Does the STM32MP135DAF7T include hardware debug support?
Yes - it integrates Arm CoreSight™ debug infrastructure with SWD and JTAG interfaces, each configurable as general-purpose GPIOs when not in use. A 4-Kbyte embedded trace buffer enables real-time instruction tracing, and debug access is gated by TrustZone® secure monitor to prevent unauthorized firmware inspection.
How is DDR memory managed during low-power modes?
In Standby mode, the STM32MP135DAF7T maintains DDR SDRAM contents using its dedicated backup regulator (~0.9 V), allowing sub-100 µs wake-up to full operation. This retains application state without reloading from flash - critical for industrial systems requiring zero-reboot recovery after brownout events.
What camera interfaces are supported and at what resolutions?
The STM32MP135DAF7T features an 8–16-bit parallel digital camera interface (DCMIPP) supporting up to 3 Mpix @30 fps (color/monochrome) or 5 Mpix @15 fps, with pixel clock up to 120 MHz. It accepts raw Bayer, YUV, or RGB data and includes hardware pipeline stages for cropping, scaling, and format conversion before DMA transfer to DDR.
STM32MP135DAF7T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 320-TFBGA
- Series:
- STM32MP1
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Core Processor:
- ARM® Cortex®-A7
- Number of Cores/Bus Width:
- 1 Core, 32-Bit
- Speed:
- 1GHz
- Co-Processors/DSP:
- Multimedia; NEON™ MPE
- RAM Controllers:
- DDR3, DDR3L, LPDDR2, LPDDR3
- Graphics Acceleration:
- Yes
- Display & Interface Controllers:
- LCD
- Ethernet:
- 10/100/1000Mbps (2)
- SATA:
- -
- USB:
- USB 2.0 (2)
- Voltage - I/O:
- 1.8V, 2.5V, 3.3V
- Operating Temperature:
- -40°C ~ 105°C (TJ)
- Grade:
- -
- Qualification:
- -
- Security Features:
- AES, ARM TZ, Boot Security, Cryptography, Secure Debug, SHA-1/2, Tamper Detection, TRNG, Volatile key Storage
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 320-TFBGA (11x11)
- Additional Interfaces:
- CANbus, GPIO, I2C, I2S, IrDA, MMC/SD/SDIO, SAI, SPDIF, SPI, UART/USART
STM32MP135DAF7T FAQ
1.How can I place an order for STM32MP135DAF7T through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32MP135DAF7T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32MP135DAF7T reliable?
The price and inventory of STM32MP135DAF7T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32MP135DAF7T is usually 5 days.
3.What payment methods are accepted for STM32MP135DAF7T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32MP135DAF7T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32MP135DAF7T?
STM32MP135DAF7T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32MP135DAF7T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32MP135DAF7T?
For technical support, including STM32MP135DAF7T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32MP135DAF7T requirements.
6.How does Aetrix verify that STM32MP135DAF7T is sourced from the original manufacturer or authorized distributors?
All STM32MP135DAF7T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32MP135DAF7T meets industry standards.
7.What is the process for return or replacement of STM32MP135DAF7T?
All STM32MP135DAF7T units undergo pre-shipment inspection (PSI). If there is an issue with STM32MP135DAF7T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32MP135DAF7T part is unused and in its original packaging.
Return procedure for STM32MP135DAF7T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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