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STMicroelectronics STM32MP135FAE7
- Part No.:
- STM32MP135FAE7
- Manufacturer:
- STMicroelectronics
- Category:
- Microprocessors
- Package:
- 289-LFBGA
- Datasheet:
-
STM32MP135FAE7.pdf
- Description:
- 32-BIT ARM CORTEX-A7 900MHZ MPU
- Quantity:
- Payment:
- Shipping:
Inventory:1,026
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Product details
Overview
STM32MP135FAE7 from STMicroelectronics is a dual-core Arm® Cortex®-A7 microprocessor operating up to 1 GHz, integrating LCD-TFT controller, dual CAN FD interfaces, dual 12-bit ADCs (5 Msps), and hardware crypto acceleration (AES-256, PKA, SHA-512). It supports LPDDR3-1066/DDR3L-1066 memory, 2× Gigabit Ethernet with IEEE 1588v2, and camera interface up to 5 Mpix@15 fps - deployed in industrial HMIs, edge gateways, and secure IoT edge nodes.
For engineers reviewing the STM32MP135FAE7 datasheet, STM32MP135FAE7 pinout, STM32MP135FAE7 application, or STM32MP135FAE7 equivalent, key selection criteria include TrustZone®-enabled secure boot, DDR retention in Standby mode, 135 secure GPIOs with tamper detection, and dual Quad-SPI for parallel firmware storage.
Technical Context
The STM32MP135FAE7 implements a heterogeneous dual-Cortex-A7 subsystem with 128 KB unified L2 cache, Arm NEON™ for signal processing, and TrustZone® for hardware-enforced isolation between secure and non-secure worlds. Its interconnect matrix comprises a 64-bit AXI bus (266 MHz) and 32-bit AHB bus (209 MHz), enabling concurrent high-bandwidth peripheral access.
Security is architected via BSEC OTP fuses (3072-bit), 12 tamper pins (5 active), secure RTC, and dedicated cryptographic accelerators - including on-the-fly AES-128 DRAM encryption, DPA-resistant PKA/ECC/RSA, and a true RNG with triple oscillators. Boot flow enforces authenticated image loading from eMMC, SD, SPI NOR, or NAND via ROM code and TrustZone-aware first-stage bootloader.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Dual Arm® Cortex®-A7 @ up to 1 GHz - enables Linux-capable real-time edge compute with NEON™ SIMD support |
| Memory Interface | 16-bit DDR3/DDR3L/LPDDR2/LPDDR3 up to 1 Gbyte @ 1066 MT/s - supports low-power embedded SDRAM with ECC |
| Secure Boot | Hardware-rooted secure boot with BSEC OTP fuses and TrustZone® peripherals - prevents unauthorized firmware execution |
| ADC Performance | 2 × 12-bit ADCs, 5 Msps max - suitable for high-speed analog sensor acquisition in industrial control loops |
| Camera Interface | 8–16-bit parallel DCMIPP supporting 5 Mpix@15 fps color - enables cost-effective machine vision preprocessing without external ISP |
| Crypto Acceleration | AES-128/192/256, SHA-224/256/384/512, HMAC, PKA, TRNG - offloads TLS 1.3, secure OTA, and device attestation |
| Low-Power Modes | Standby with DDR retention, LPLV-Stop2, and VBAT domain - achieves sub-μA system sleep for battery-backed applications |
Pinout & Package
STM32MP135FAE7 is packaged in TFBGA289 (9 × 9 mm, 0.5 mm pitch), compliant with ECOPACK2 environmental standards. The package provides 289 I/O balls with defined power, ground, signal, and supply domains per ST's DS13483 Rev 7 pinout table (Section 4).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDDCORE | Core power supply | 1.1 V ±5% regulated input for CPU and L1/L2 caches - requires low-noise local decoupling |
| VDDQ_DDR | DDR I/O supply | 1.2 V or 1.35 V supply for DDR data/address bus - must be sequenced after VDDCORE |
| NRST | Active-low reset input | Asynchronous reset pin with internal pull-up - triggers full system reset including secure domain state clear |
| BOOT0 | Boot mode selection | Configures primary boot source (eMMC, SD, SPI NOR, NAND) at power-on - sampled during POR sequence |
| ETH1_RXD0–3 | Gigabit Ethernet receive data | RMII/RGMII-compatible 4-bit data lane - supports IEEE 1588v2 timestamping for deterministic networking |
| FDCAN1_TX/RX | CAN FD transceiver interface | Differential pair supporting 5 Mbit/s FD operation - integrated transceiver not included; requires external PHY |
Key Features
| Feature | Design Value |
|---|---|
| TrustZone®-enabled secure world | Hardware-isolated execution environment for secure boot, crypto key management, and tamper-resilient firmware updates |
| On-the-fly DRAM encryption | AES-128 encryption/decryption of DDR traffic in real time - prevents cold-boot and physical memory dump attacks |
| Dual Quad-SPI interface | Two independent QUADSPI controllers supporting XIP and dual-flash mirroring - enables fail-safe firmware redundancy |
| Secure RTC with sub-second accuracy | Hardware calendar and alarm with backup domain power - maintains time across deep sleep modes without external crystal |
| 135 secure GPIOs with interrupt/wakeup | Configurable as tamper inputs, secure event detectors, or isolated peripheral controls - all accessible in secure world only |
Applications
| Industrial HMI | Edge Gateway |
|---|---|
Use Scenario: Touch-enabled panel PC for factory floor monitoring with real-time PLC communication and local data logging. IC Role / Device Role / Timing Role: Main application processor running Linux with Qt-based UI, managing LCD-TFT display (WXGA@60 fps), dual CAN FD for fieldbus bridging, and dual ADC for analog sensor fusion. Use Value: Integrated LCD controller eliminates external TCON; TrustZone® isolates HMI runtime from secure firmware update partition. | Use Scenario: Smart building gateway aggregating BACnet/IP, Modbus TCP, and LoRaWAN sensor data before cloud upload. IC Role / Device Role / Timing Role: Dual-core A7 handles concurrent protocol stacks, 2× Ethernet MACs provide redundant LAN uplinks, and hardware crypto secures TLS 1.3 tunnels. Use Value: On-the-fly DRAM encryption protects cached sensor payloads; Standby mode with DDR retention enables instant wake-on-sensor-event. |
| Secure IoT Node | Machine Vision Edge Device |
Use Scenario: Tamper-evident asset tracker with GPS, cellular modem, and encrypted local storage for audit logs. IC Role / Device Role / Timing Role: Secure boot root-of-trust, 12 tamper pins detect enclosure breach, BSEC fuses store unique ID and HUK for AES-256 key wrapping. Use Value: Hardware RNG + PKA acceleration enables FIPS-compliant key generation; VBAT domain sustains RTC and tamper registers during main power loss. | Use Scenario: Embedded vision system for quality inspection using CMOS camera and real-time defect classification. IC Role / Device Role / Timing Role: DCMIPP processes raw Bayer data; NEON™ accelerates CNN inference; SAI/SPDIF routes audio feedback; LCD-TFT displays overlay results. Use Value: 5 Mpix@15 fps camera interface avoids external frame buffer; dual Quad-SPI stores model weights and firmware separately for A/B updates. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-core Arm Cortex-A7 microprocessor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32MP157C-DK2 | Same core, but higher L2 cache (256 KB), no LCD-TFT, adds PCIe, lower security feature set (no DPA-resistant PKA) | Better suited for headless gateway applications requiring PCIe expansion, less optimal for display-centric designs | Select when PCIe connectivity or reduced display requirements outweigh need for on-chip TFT controller and advanced crypto hardening |
| i.MX 8M Mini (NXP) | Quad-core Cortex-A53 + Cortex-M4, different ISA, lacks TrustZone®-integrated tamper pins and on-the-fly DRAM encryption | Stronger multimedia throughput (VPU), broader Android/Linux BSP support, weaker hardware security isolation | Prefer for Android-based UI or video streaming; avoid where certified secure boot and tamper detection are mandatory |
Compared with STM32MP135FAE7, STM32MP157C-DK2 trades display capability for PCIe and simplified security, while i.MX 8M Mini offers higher CPU throughput but lacks TrustZone®-anchored tamper resilience and DRAM encryption - making STM32MP135FAE7 optimal for safety-critical, display-integrated, and physically tamper-resistant edge deployments.
Availability
STM32MP135FAE7 is available at Aetrix Electronics and suitable for industrial HMIs, secure edge gateways, and machine vision systems requiring stable component supply, long-term lifecycle assurance, and qualified automotive-grade packaging.
Supply support for STM32MP135FAE7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, specializing in microcontrollers, power management, sensors, and automotive ICs with strong emphasis on industrial and secure embedded solutions.
The STM32MP series targets Linux-capable edge devices requiring hardware-enforced security, real-time responsiveness, and rich peripheral integration - designed specifically for industrial automation, smart infrastructure, and trusted IoT endpoints.
FAQ
What is the maximum DDR memory bandwidth supported by STM32MP135FAE7?
The STM32MP135FAE7 supports LPDDR3-1066 and DDR3L-1066 at 16-bit bus width, delivering up to 2.1 GB/s peak theoretical bandwidth. Actual sustained bandwidth depends on memory controller configuration, PCB layout, and DDR PHY tuning - validated in ST's MP13-EV1 evaluation board reference design.
Does STM32MP135FAE7 include an integrated Ethernet PHY?
No, STM32MP135FAE7 integrates dual Gigabit Ethernet MACs (ETH1/ETH2) with IEEE 1588v2 timestamping and RGMII/MII/RMII interfaces, but requires external PHY chips such as the DP83869HM or LAN8742A for physical layer connectivity and signal conditioning.
How many secure boot stages does STM32MP135FAE7 implement?
STM32MP135FAE7 implements a four-stage secure boot chain: ROM code → FSBL (first-stage bootloader in secure SRAM) → SSBL (second-stage bootloader in DDR) → U-Boot/Linux kernel. Each stage verifies the next using SHA-256 signatures stored in BSEC fuses or external secure storage.
Can the LCD-TFT controller drive Full HD resolution at 60 Hz?
No - the integrated LTDC supports Full HD (1920×1080) only at 30 fps due to pixel clock limit of 90 MHz and internal bandwidth constraints. For 60 Hz Full HD, external timing controller or FPGA-based scaling is required; WXGA (1366×768) is the highest resolution supported at 60 fps.
STM32MP135FAE7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 289-LFBGA
- Series:
- STM32MP1
- Packaging:
- Tray
- Product Status:
- Active
- Core Processor:
- ARM® Cortex®-A7
- Number of Cores/Bus Width:
- 1 Core, 32-Bit
- Speed:
- 1GHz
- Co-Processors/DSP:
- Multimedia; NEON™ SIMD
- RAM Controllers:
- DDR3, DDR3L, LPDDR2, LPDDR3
- Graphics Acceleration:
- Yes
- Display & Interface Controllers:
- LCD
- Ethernet:
- 10/100/1000Mbps (2)
- SATA:
- -
- USB:
- USB 2.0 (2)
- Voltage - I/O:
- 1.8V, 2.5V, 3.3V
- Operating Temperature:
- -40°C ~ 105°C (TJ)
- Grade:
- -
- Qualification:
- -
- Security Features:
- AES, ARM TZ, Boot Security, Cryptography, Secure Debug, SHA-1/2, Tamper Detection, TRNG, Volatile key Storage
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 289-LFBGA (14x14)
- Additional Interfaces:
- CANbus, GPIO, I2C, I2S, IrDA, MMC/SD/SDIO, SAI, SPDIF, SPI, UART/USART
STM32MP135FAE7 FAQ
1.How can I place an order for STM32MP135FAE7 through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32MP135FAE7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32MP135FAE7 reliable?
The price and inventory of STM32MP135FAE7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32MP135FAE7 is usually 5 days.
3.What payment methods are accepted for STM32MP135FAE7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32MP135FAE7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32MP135FAE7?
STM32MP135FAE7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32MP135FAE7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32MP135FAE7?
For technical support, including STM32MP135FAE7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32MP135FAE7 requirements.
6.How does Aetrix verify that STM32MP135FAE7 is sourced from the original manufacturer or authorized distributors?
All STM32MP135FAE7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32MP135FAE7 meets industry standards.
7.What is the process for return or replacement of STM32MP135FAE7?
All STM32MP135FAE7 units undergo pre-shipment inspection (PSI). If there is an issue with STM32MP135FAE7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32MP135FAE7 part is unused and in its original packaging.
Return procedure for STM32MP135FAE7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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