STMicroelectronics STM32MP151FAB1
- Part No.:
- STM32MP151FAB1
- Manufacturer:
- STMicroelectronics
- Category:
- Microprocessors
- Package:
- 354-LFBGA
- Datasheet:
-
STM32MP151FAB1.pdf
- Description:
- IC MPU STM32MP1 800MHZ 354LFBGA
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
STM32MP151FAB1 from STMicroelectronics is a dual-core Arm® Cortex®-A7 (800 MHz) + Cortex®-M4 (209 MHz) microprocessor unit with TrustZone® security, 708 KB on-chip SRAM, LPDDR3/DDR3 memory controller, and integrated LCD-TFT controller supporting WXGA @60 fps. It delivers heterogeneous processing for Linux-capable edge devices requiring real-time control, graphics, and secure boot in industrial HMIs and gateway applications.
For engineers reviewing the STM32MP151FAB1 datasheet, STM32MP151FAB1 pinout, STM32MP151FAB1 application, or STM32MP151FAB1 equivalent, key selection considerations include dual-core asymmetric architecture support, DDR memory retention in Standby mode (2 µA), hardware crypto acceleration (AES-256/HASH), and 176 I/Os with up to 8 secure GPIOs.
Technical Context
The STM32MP151FAB1 implements a tightly coupled dual-core architecture: the Cortex-A7 subsystem runs Linux or Android with NEON and L2 cache (256 KB), while the Cortex-M4 handles deterministic real-time tasks with FPU and MPU isolation. TrustZone® enforces secure world/non-secure world partitioning at both CPU and peripheral levels.
Its interconnect matrix comprises a 64-bit AXI bus (266 MHz) and 32-bit AHB bus (209 MHz), enabling concurrent high-bandwidth data paths for DDR, peripherals, and DMA controllers-including one MDMA and two dual-port DMAs with request routing-critical for multi-stream audio/video and sensor fusion workloads.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Cores | Dual-core: Arm Cortex-A7 @800 MHz + Cortex-M4 @209 MHz - enables Linux OS + real-time RTOS coexistence |
| Memory Interface | LPDDR2/LPDDR3-1066 or DDR3/DDR3L-1066, 16/32-bit - supports up to 1 Gbyte external DRAM with ECC |
| On-chip SRAM | 708 KB total: 256 KB AXI SYSRAM + 384 KB AHB SRAM + 64 KB Backup SRAM + 4 KB Backup domain SRAM - enables fast context switching and RTC-backed state retention |
| Graphics Support | LCD-TFT controller with 24-bit RGB888, up to WXGA (1366×768) @60 fps - drives industrial touchscreens without external GPU |
| Crypto Acceleration | AES-128/192/256, TDES, SHA-1/224/256, HMAC, 2× TRNG - offloads encryption for secure OTA updates and TLS stack |
| Low-power Mode | Standby mode current ≤2 µA (no RTC, no LSE, no BKPSRAM, no RETRAM) - enables battery-backed long-term sleep in remote sensors |
| I/O Count | Up to 176 GPIOs with interrupt capability, including 8 secure I/Os and 6 wakeup pins - supports complex peripheral expansion with hardware-enforced isolation |
Pinout & Package
STM32MP151FAB1 uses a TFBGA361 package (12 × 12 mm, 0.5 mm pitch), compliant with ECOPACK2 environmental standards. Pin functions are defined across multiple alternate function mappings (AF0–AF15) and support configurable roles per peripheral interface.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDDCORE | Core power supply | 1.1 V ±5% regulated input for Cortex-A7/M4 cores and internal logic - requires low-noise LDO with <10 mV ripple |
| VDDIO_3V3 | I/O power supply | 3.3 V ±10% supply for all general-purpose I/Os - supports 5 V-tolerant operation for legacy interface compatibility |
| NRST | System reset input | Active-low asynchronous reset pin - initiates full system reset including both A7 and M4 domains and memory controllers |
| BOOT0 | Boot mode selection | High at power-up selects internal Flash or eMMC boot; low selects SD card or USB device - determines initial firmware execution path |
| CLKIN | External clock input | Accepts 8–48 MHz crystal or oscillator signal for HSE - feeds PLLs to generate system clocks up to 800 MHz (A7) and 209 MHz (M4) |
| PA0 | General-purpose I/O / Wakeup | Configurable as GPIO or wakeup source - triggers exit from Stop/Standby modes with programmable edge sensitivity |
Key Features
| Feature | Design Value |
|---|---|
| TrustZone®-enabled peripheral isolation | Hardware-enforced memory and peripheral access control between secure/non-secure worlds - prevents unauthorized access to crypto keys and tamper registers |
| Dual-domain power management | Independent voltage regulators for core (1.1 V), I/O (3.3 V), USB PHY (1.8 V), and backup domain (~0.9 V) - enables selective power gating per subsystem |
| Advanced timer set | 25 timers including 2× 32-bit general-purpose, 2× advanced motor control, 10× 16-bit GP, 5× low-power, RTC, and SysTick - supports servo control, PWM generation, and precise timekeeping |
| Multi-protocol audio interface | 4× SAI (I2S/PDM/SPDIF Tx), SPDIF Rx (4 inputs), and internal audio PLL - enables simultaneous stereo playback, microphone array capture, and digital audio passthrough |
| Camera interface (DCMI) | 8–14-bit parallel interface supporting up to 140 MB/s throughput - connects directly to CMOS image sensors for machine vision preprocessing on M4 |
Applications
| Industrial HMI | Smart Gateway |
|---|---|
|
Use Scenario: Touchscreen-based operator interface for PLC-controlled machinery with local data logging and remote diagnostics. IC Role / Device Role / Timing Role: Main application processor running embedded Linux (A7) while M4 manages real-time I/O scanning and safety monitoring. Use Value: Integrated LCD-TFT controller eliminates external display bridge IC; TrustZone® isolates firmware update partition from runtime control code. |
Use Scenario: Field-deployed protocol translator aggregating Modbus, CAN, and BLE sensor data into MQTT messages for cloud upload. IC Role / Device Role / Timing Role: Dual-core coordination: A7 handles network stack and TLS encryption; M4 processes time-critical sensor interrupts and protocol framing. Use Value: Hardware crypto accelerators reduce CPU load by >70% during TLS handshake; 35 communication interfaces eliminate external transceivers. |
| Medical Edge Device | Automotive Infotainment Prototype |
|
Use Scenario: Portable ultrasound imaging unit with real-time beamforming, touchscreen UI, and DICOM export via Wi-Fi. IC Role / Device Role / Timing Role: M4 performs low-latency DSP on raw ADC data; A7 renders UI and manages DICOM over TCP/IP stack. Use Value: Dual Quad-SPI interface boots OS from secure flash while streaming captured frames to LPDDR3; 16-bit ADCs enable high-fidelity analog front-end sampling. |
Use Scenario: In-vehicle infotainment development platform supporting HDMI video output, Bluetooth audio streaming, and rear-view camera input. IC Role / Device Role / Timing Role: A7 drives Qt-based UI and media framework; M4 handles CAN bus diagnostics and button debounce logic. Use Value: HDMI-CEC interface enables TV remote control integration; DCMI + SAI + HDMI output allows full AV pipeline without external codecs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-core MPU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| NXP i.MX 8M Mini (LPC55S69) | Quad-core Cortex-A53 + Cortex-M33; lacks integrated TFT controller and TrustZone®-secured peripheral isolation | Better for multi-threaded Linux apps but requires external display bridge and separate secure element for crypto key storage | Select when higher A-class compute density is needed and display interface is handled externally |
| Renesas RZ/G2L (R9A07G043L220BG) | Single Cortex-A55 + Cortex-M33; smaller SRAM (512 KB), no hardware DFSDM or SPDIF RX | Suitable for cost-sensitive gateways but lacks audio capture flexibility and analog filtering for sigma-delta sensors | Select for compact designs where audio/video I/O count and analog subsystem depth are secondary |
Compared with i.MX 8M Mini and RZ/G2L, STM32MP151FAB1 uniquely combines TFT controller, TrustZone®-secured peripheral mapping, and dual-domain power management in a single TFBGA361 package - reducing BOM count and simplifying secure boot validation for industrial UIs.
Availability
STM32MP151FAB1 is available at Aetrix Electronics and suitable for industrial HMIs, smart gateways, medical edge devices, and automotive infotainment prototypes requiring stable component supply across extended product lifecycles.
Supply support for STM32MP151FAB1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in microcontrollers, power management, sensors, and automotive ICs with strong focus on industrial and embedded markets.
STM32MP series MPUs target heterogeneous computing applications demanding Linux capability alongside real-time responsiveness and hardware security - designed specifically for edge intelligence in resource-constrained environments.
FAQ
What boot sources does STM32MP151FAB1 support?
STM32MP151FAB1 supports boot from internal Flash (via ROM code), eMMC, SD card, USB device, SPI NOR, Quad-SPI NOR, NAND Flash, and UART. Boot mode is selected via BOOT0/BOOT1 pins and internal OTP configuration. The first-stage bootloader (FSBL) validates signature before loading second-stage (SSBL) and Linux kernel.
Does STM32MP151FAB1 require an external PMIC?
No - STM32MP151FAB1 integrates on-die LDOs for VDDCORE (1.1 V), VDDIO (3.3 V), USB PHY (1.8 V), and backup domain (~0.9 V). However, an external PMIC is recommended for high-efficiency multi-rail systems or when dynamic voltage scaling beyond fixed LDO outputs is required.
How is TrustZone® implemented on this MPU?
TrustZone® is implemented at both CPU and system level: Cortex-A7 cores include TrustZone® extensions for secure/non-secure world separation, while the ETZPC (Embedded TrustZone Protection Controller) gates access to peripherals and memories. Secure boot enforces chain-of-trust from ROM code through FSBL, SSBL, and OS.
What is the maximum resolution supported by the LCD-TFT controller?
The LTDC (LCD-TFT Display Controller) supports up to WXGA (1366 × 768) at 60 fps or Full HD (1920 × 1080) at 30 fps with pixel clock up to 90 MHz. It features dual layer composition, alpha blending, and programmable color LUT - enabling rich UI rendering without GPU acceleration.
STM32MP151FAB1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 354-LFBGA
- Series:
- STM32MP1
- Packaging:
- Tray
- Product Status:
- Active
- Core Processor:
- ARM® Cortex®-A7
- Number of Cores/Bus Width:
- 1 Core, 32-Bit
- Speed:
- 209MHz, 800MHz
- Co-Processors/DSP:
- ARM® Cortex®-M4
- RAM Controllers:
- DDR3, DDR3L, LPDDR2, LPDDR3
- Graphics Acceleration:
- Yes
- Display & Interface Controllers:
- HDMI-CEC, LCD
- Ethernet:
- 10/100Mbps (1)
- SATA:
- -
- USB:
- USB 2.0 (2), USB 2.0 OTG+ PHY (3)
- Voltage - I/O:
- 2.5V, 3.3V
- Operating Temperature:
- -20°C ~ 105°C (TJ)
- Grade:
- -
- Qualification:
- -
- Security Features:
- ARM TZ
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 354-LFBGA (16x16)
- Additional Interfaces:
- CAN, Ethernet, I2C, MMC/SD/SDIO, SPDIF, SPI, UART, USB
STM32MP151FAB1 FAQ
1.How can I place an order for STM32MP151FAB1 through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32MP151FAB1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32MP151FAB1 reliable?
The price and inventory of STM32MP151FAB1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32MP151FAB1 is usually 5 days.
3.What payment methods are accepted for STM32MP151FAB1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32MP151FAB1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32MP151FAB1?
STM32MP151FAB1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32MP151FAB1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32MP151FAB1?
For technical support, including STM32MP151FAB1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32MP151FAB1 requirements.
6.How does Aetrix verify that STM32MP151FAB1 is sourced from the original manufacturer or authorized distributors?
All STM32MP151FAB1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32MP151FAB1 meets industry standards.
7.What is the process for return or replacement of STM32MP151FAB1?
All STM32MP151FAB1 units undergo pre-shipment inspection (PSI). If there is an issue with STM32MP151FAB1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32MP151FAB1 part is unused and in its original packaging.
Return procedure for STM32MP151FAB1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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