Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Integrated Circuits (ICs) > Embedded > Microprocessors

STMicroelectronics STM32MP153CAA3

Name: STM32MP153CAA3
Brand: STMicroelectronics
SKU: STM32MP153CAA3
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: STM32MP153CAA3

Manufacturer:: STMicroelectronics

Category:: Microprocessors

Package:: 448-LFBGA

Datasheet:: STM32MP153CAA3.pdf

Description:: IC MPU STM32MP1 650MHZ 448LFBGA

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:393

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

STM32MP153CAA3 from STMicroelectronics is a dual-core Arm® Cortex®-A7 (800 MHz) + Cortex®-M4 microprocessor unit (MPU) with TrustZone®, NEON™, and hardware crypto acceleration (AES-256, SHA-256, RNG). It integrates TFT LCD controller (up to 1920×1080@30 fps), 37 communication interfaces including 2× CAN FD (one TTCAN), Gigabit Ethernet GMAC, and 6× I²C FM+, targeting industrial HMI, edge gateway, and smart appliance control systems.

For engineers reviewing the STM32MP153CAA3 datasheet, STM32MP153CAA3 pinout, STM32MP153CAA3 application, or STM32MP153CAA3 equivalent, key selection considerations include dual-core asymmetric processing capability, DDR3/LPDDR3 memory support up to 1 Gbyte, 708 Kbytes on-chip SRAM split across AXI/AHB domains, TrustZone-enabled secure boot, and TFBGA361 (12×12 mm, 0.5 mm pitch) package compatibility with industrial thermal and EMI requirements.

Technical Context

The device implements an asymmetric multiprocessing (AMP) architecture: Cortex-A7 cores handle Linux-based application layers (e.g., GUI rendering, network stack), while the Cortex-M4 (209 MHz) manages real-time tasks like motor control, sensor fusion, or safety-critical I/O-enabled by hardware semaphore (HSEM) and inter-processor communication controller (IPCC). Memory coherency is maintained via 256-Kbyte unified L2 cache and dual bus matrices (64-bit AXI @266 MHz, 32-bit AHB @209 MHz).

Clock management uses five fractional PLLs supporting precise timing for audio (SAI/I²S), video (LTDC pixel clock up to 90 MHz), and deterministic networking (IEEE 1588v2 in GMAC). Security is enforced at silicon level via TrustZone address space controller (TZC) for DDR, embedded tamper detection, and BSEC-managed one-time programmable fuses (3072 bits, including 96-bit UID).

Key Specifications

Parameter	Value and Actual Design Meaning
CPU Cores	Dual Arm® Cortex®-A7 @800 MHz + single Cortex®-M4 @209 MHz - enables Linux + RTOS coexistence with hardware-isolated resource partitioning.
Memory Interface	LPDDR2/LPDDR3-1066 or DDR3/DDR3L-1066 (16/32-bit, up to 1 Gbyte) - supports high-bandwidth display and networking stacks without external memory bottleneck.
On-chip SRAM	708 Kbytes total: 256 Kbytes AXI SYSRAM + 384 Kbytes AHB SRAM + 64 Kbytes Backup SRAM + 4 Kbytes Backup SRAM - enables fast context switching and RTC-retained state across low-power modes.
Graphics Controller	LCD-TFT controller (LTDC) with dual layer, programmable LUT, up to Full HD (1920×1080@30 fps) - eliminates need for external GPU in cost-sensitive industrial displays.
Crypto Acceleration	AES-128/192/256, SHA-1/224/256, HMAC, two TRNGs - accelerates TLS handshake, firmware signature verification, and secure OTA updates in edge devices.
Communication Peripherals	2× CAN FD (1× TTCAN), 6× I²C FM+, 4× UART/USART, 6× SPI, 4× SAI, Gigabit Ethernet GMAC, 3× SDMMC - supports multi-protocol industrial fieldbus integration and audio/video streaming.
ADC/DAC	2× 16-bit ADC (up to 3.6 Msps), 2× 12-bit DAC (1 MHz), DFSDM with 8 channels - enables precision analog sensing (e.g., current/voltage monitoring) and closed-loop actuator control.

Pinout & Package

STM32MP153CAA3 is housed in a TFBGA361 package (12 × 12 mm, 0.5 mm ball pitch), RoHS-compliant and ECOPACK2 certified. The package supports 176 general-purpose I/Os with interrupt capability, including 8 secure I/Os and 6 wakeup pins.

Pin/Terminal	Circuit Role	Design Meaning
VDDCORE	Core power supply	1.1 V ±5% supply for Cortex-A7/M4 cores and L1/L2 caches - requires low-noise regulation and decoupling per ST AN5250 guidelines.
VDDIO_3V3	I/O bank supply	3.3 V supply for GPIOs, UART, SPI, I²C - tolerant to 5 V inputs, enabling direct interfacing with legacy industrial logic.
NRST	System reset input	Active-low asynchronous reset for entire SoC - synchronized internally to avoid metastability during power sequencing.
BOOT0	Boot mode selection	Configures primary boot source (eMMC, SD card, QSPI, NAND) at power-up - sampled during POR, latched for system initialization.
ETH_MDIO / ETH_MDC	Ethernet PHY interface	Management Data Input/Output and Management Data Clock - enables runtime configuration of external Gigabit PHY (e.g., LAN8742A) without software driver overhead.
LTDC_R0–R7, G0–G7, B0–B7	TFT RGB data bus	24-bit parallel RGB888 interface - supports WXGA (1366×768@60 fps) or Full HD (1920×1080@30 fps) with pixel clock up to 90 MHz.

Key Features

Feature	Design Value
TrustZone-enabled secure boot	Hardware-enforced chain-of-trust from ROM loader through FSBL/SSBL to Linux kernel - prevents unauthorized firmware execution and protects cryptographic keys in OTP.
Dual-domain power management	Independent control of Cortex-A7, Cortex-M4, and peripheral power islands - enables selective retention (e.g., DDR in Standby mode at 2 µA total current) for rapid wake-up in battery-backed gateways.
Flexible memory controller (FMC)	Supports SLC NAND flash with 8-bit ECC and NOR/PSRAM - allows boot-from-NAND and local firmware storage without requiring eMMC or SD card.
Hardware-accelerated audio	Four SAI peripherals with I²S/PDM/SPDIF Tx/Rx and internal audio PLL - offloads CPU from real-time audio processing in voice-controlled HMI or IP intercom systems.
Camera interface (DCMI)	8–14-bit parallel interface, up to 140 Mbyte/s - enables integration of 5 MP image sensors for machine vision in industrial inspection or smart retail kiosks.

Applications

Industrial HMI Panel

Edge Gateway

Use Scenario: Touchscreen-based operator interface for PLC-controlled machinery with real-time diagnostics and web-based remote access.

IC Role / Device Role / Timing Role: MPU executes Linux with Qt-based GUI on Cortex-A7; Cortex-M4 handles CAN FD motion control loop and analog sensor acquisition.

Use Value: Dual-core isolation ensures deterministic response to button presses and alarm events while maintaining smooth video playback and network connectivity.

Use Scenario: Protocol translator aggregating Modbus RTU, CAN FD, and BLE sensor data into MQTT messages for cloud upload via Gigabit Ethernet or USB host-connected 4G modem.

IC Role / Device Role / Timing Role: Cortex-A7 runs OpenWrt and protocol stacks; Cortex-M4 manages time-triggered CAN FD scheduling and hardware timestamping for IEEE 1588 synchronization.

Use Value: Integrated GMAC with hardware timestamping and dual CAN FD controllers eliminate external PHY and transceiver components, reducing BOM cost and PCB area.

Smart Appliance Control

Medical Display Terminal

Use Scenario: Connected washing machine with TFT display, Wi-Fi/Ethernet connectivity, and motor control using field-oriented control (FOC).

IC Role / Device Role / Timing Role: Cortex-M4 executes FOC algorithm at 20 kHz PWM frequency; Cortex-A7 renders UI and handles OTA updates via HTTPS.

Use Value: On-chip 2× 12-bit DACs and 2× 16-bit ADCs enable direct current/voltage feedback without external signal conditioning ICs.

Use Scenario: Portable ultrasound or patient monitor with high-resolution color display, audio alerts, and secure data export via USB OTG.

IC Role / Device Role / Timing Role: LTDC drives 1280×800 medical-grade display; SAI interfaces with audio codec for voice prompts; TrustZone isolates HIPAA-compliant data paths.

Use Value: Hardware crypto acceleration (AES-256, SHA-256) ensures encrypted DICOM file export meets regulatory audit requirements without CPU performance penalty.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-core MPU applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
NXP i.MX 8M Mini (LPC55S69)	Quad-core Cortex-A53 + Cortex-M33; no integrated TFT controller; supports LPDDR4 but lacks TrustZone for DDR memory space.	Better for AI inference workloads; requires external display bridge IC for RGB panels; less suitable for cost-sensitive TFT-based HMIs.	Select when prioritizing ML acceleration over display integration and when DDR4 bandwidth is critical.
Renesas RZ/G2L (R9A07G043L2)	Dual Cortex-A55 + Cortex-M33; includes LVDS/eDP display output but no native RGB888 interface; lower crypto engine coverage (AES-128 only).	Optimized for automotive infotainment with functional safety support (ISO 26262 ASIL-B); lacks TTCAN and has fewer CAN FD instances.	Prefer for automotive-grade designs requiring ASIL-B certification and LVDS panel support, not industrial RGB TFT.

Compared with NXP i.MX 8M Mini and Renesas RZ/G2L, STM32MP153CAA3 uniquely combines TFT RGB888 controller, TTCAN, TrustZone-secured DDR, and 2 µA Standby current in a single TFBGA361 package-making it optimal for cost-constrained, display-centric industrial edge devices requiring deterministic real-time response and secure boot.

Availability

STM32MP153CAA3 is available at Aetrix Electronics and suitable for industrial HMI, edge gateway, and smart appliance control requiring stable component supply, long-term lifecycle assurance, and full production traceability.

Supply support for STM32MP153CAA3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in microcontrollers, power management, MEMS, and automotive ICs with over 40 years of industrial reliability heritage.

The STM32MP series targets heterogeneous computing for edge intelligence, combining Linux-capable application processors with real-time microcontroller subsystems to simplify development of secure, display-rich, and protocol-diverse industrial IoT devices.

FAQ

What boot sources does STM32MP153CAA3 support?

STM32MP153CAA3 supports boot from eMMC, SD card, Quad-SPI flash, NAND flash (with 8-bit ECC), and USB mass storage via BOOT0 pin configuration. The first-stage bootloader (FSBL) resides in embedded ROM and validates second-stage code integrity using SHA-256 before loading into SYSRAM.

Does STM32MP153CAA3 require external PMIC support?

No - STM32MP153CAA3 integrates multiple on-die LDOs (1.1 V core, 1.8 V USB, 3.3 V I/O, backup ~0.9 V) and supports direct connection to single 3.3 V or 5 V input. However, ST recommends using companion PMICs (e.g., STPMIC1) for advanced power sequencing, dynamic voltage scaling, and thermal monitoring in high-reliability systems.

How is TrustZone implemented for peripheral protection?

TrustZone protection is enforced via the ETZPC (Embedded TrustZone Protection Controller), which assigns each peripheral (e.g., UART4, SPI6, ADC1) to secure or non-secure privilege domains at reset. Access attempts from non-secure world trigger bus errors, and configuration is locked after boot unless reprogrammed via secure monitor call (SMC) from trusted firmware.

What is the maximum resolution supported by the LTDC controller?

The LTDC controller supports up to Full HD (1920 × 1080) at 30 fps with a pixel clock of 90 MHz. It features dual-layer composition, alpha blending, and programmable color LUTs - enabling overlay graphics, transparency effects, and gamma correction without GPU assistance.

STM32MP153CAA3 Specifications

Product attributes: Attribute value

Manufacturer:: STMicroelectronics

Package/Case:: 448-LFBGA

Series:: STM32MP1

Packaging:: Tray

Product Status:: Active

Core Processor:: ARM® Cortex®-A7

Number of Cores/Bus Width:: 2 Core, 32-Bit

Speed:: 209MHz, 650MHz

Co-Processors/DSP:: ARM® Cortex®-M4

RAM Controllers:: DDR3, DDR3L, LPDDR2, LPDDR3

Graphics Acceleration:: Yes

Display & Interface Controllers:: HDMI-CEC, LCD

Ethernet:: 10/100Mbps (1)

SATA:: -

USB:: USB 2.0 (2), USB 2.0 OTG+ PHY (3)

Voltage - I/O:: 2.5V, 3.3V

Operating Temperature:: -40°C ~ 125°C (TA)

Grade:: -

Qualification:: -

Security Features:: ARM TZ

Mounting Type:: Surface Mount

Supplier Device Package:: 448-LFBGA (18x18)

Additional Interfaces:: CAN, Ethernet, I2C, MMC/SD/SDIO, SPDIF, SPI, UART, USB

STM32MP153CAA3 FAQ

1.How can I place an order for STM32MP153CAA3 through Aetrix?

Please submit a Request for Quotation (RFQ) for STM32MP153CAA3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for STM32MP153CAA3 reliable?

The price and inventory of STM32MP153CAA3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32MP153CAA3 is usually 5 days.

3.What payment methods are accepted for STM32MP153CAA3?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32MP153CAA3 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for STM32MP153CAA3?

STM32MP153CAA3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your STM32MP153CAA3 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for STM32MP153CAA3?

For technical support, including STM32MP153CAA3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32MP153CAA3 requirements.

6.How does Aetrix verify that STM32MP153CAA3 is sourced from the original manufacturer or authorized distributors?

All STM32MP153CAA3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32MP153CAA3 meets industry standards.

7.What is the process for return or replacement of STM32MP153CAA3?

All STM32MP153CAA3 units undergo pre-shipment inspection (PSI). If there is an issue with STM32MP153CAA3, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The STM32MP153CAA3 part is unused and in its original packaging.

Return procedure for STM32MP153CAA3:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-03 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-01 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

2026-08-28 SR Latch Explained: NOR and NAND Circuits, Truth Tables, and Applications

An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

2026-08-27 Latch Circuit: SR and D Latches, Truth Tables, Timing, and Applications

Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

2026-08-21 What Is an LED Driver? Types, Circuits, Dimming, and Selection

An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…

2026-08-18 Operational Amplifier (Op Amp): Basics, Configurations, Feedback and Applications

Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

2026-08-14 Jumper Cables: How to Use, Connect and Choose Them Safely

Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…