STMicroelectronics STM32MP153CAC3T
- Part No.:
- STM32MP153CAC3T
- Manufacturer:
- STMicroelectronics
- Category:
- Microprocessors
- Package:
- 361-TFBGA
- Datasheet:
-
STM32MP153CAC3T.pdf
- Description:
- IC MPU STM32MP1 650MHZ 361TFBGA
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
STM32MP153CAC3T from STMicroelectronics is a dual-core Arm® Cortex®-A7 (800 MHz) + Cortex®-M4 (209 MHz) microprocessor unit with TrustZone® security, integrated LCD-TFT controller supporting up to Full HD (1920×1080@30 fps), 37 communication interfaces including dual CAN FD and Gigabit Ethernet, and 708 KB on-chip SRAM. It targets industrial HMI, edge gateway, and smart appliance control where real-time responsiveness, secure boot, and rich peripheral integration are required.
For engineers reviewing the STM32MP153CAC3T datasheet, STM32MP153CAC3T pinout, STM32MP153CAC3T application, or STM32MP153CAC3T equivalent, key selection considerations include dual-core asymmetric processing capability, DDR3/LPDDR3 memory controller support, hardware crypto acceleration (AES/SHA/HMAC/RNG), and TFBGA361 (12×12 mm, 0.5 mm pitch) package compatibility with industrial thermal and layout constraints.
Technical Context
The device implements an asymmetric multiprocessing architecture: Cortex-A7 cores run Linux for application-layer tasks while the Cortex-M4 handles deterministic real-time control, sensor fusion, or safety-critical functions-enabled by inter-processor communication (IPCC) and hardware semaphores (HSEM). Memory coherency is managed via AXI/AHB bus matrices and 256 KB L2 cache.
Security is enforced at silicon level through Arm TrustZone®, secure boot with BSEC OTP fuses, active tamper detection, and isolated peripherals (ETZPC). Clocking uses five fractional PLLs supporting precise audio (SAI/I2S), video (LTDC pixel clock up to 90 MHz), and network (IEEE 1588v2 GMAC) timing requirements.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Cores | Dual Arm Cortex-A7 @ 800 MHz + single Cortex-M4 @ 209 MHz - enables Linux + RTOS coexistence with dedicated interrupt routing and memory protection |
| Memory Interface | LPDDR2/LPDDR3-1066 or DDR3/DDR3L-1066 up to 1 Gbyte - supports high-bandwidth display and networking stacks without external memory bottleneck |
| On-chip SRAM | 708 KB total: 256 KB AXI SYSRAM + 384 KB AHB SRAM + 64 KB Backup domain SRAM + 4 KB Backup domain SRAM - enables fast context switching and RTC-retained state across low-power modes |
| Graphics Support | LCD-TFT controller with dual layer, programmable LUT, up to 24-bit RGB888 - drives WXGA (1366×768@60 fps) or Full HD (1920×1080@30 fps) panels directly without external GPU |
| Crypto Acceleration | AES-128/192/256, TDES, SHA-1/224/256, HMAC, two TRNGs - offloads TLS handshake, firmware signature verification, and secure OTA updates from CPU |
| Communication Peripherals | 2× CAN FD (1× TTCAN), 6× I2C FM+, 4× UART/4× USART, 6× SPI, 4× SAI, SPDIF Rx, HDMI-CEC, 3× SDMMC, 2× USB HS Host + 1× USB FS OTG - supports multi-protocol industrial fieldbus, audio streaming, and storage expansion |
| Analog Subsystem | 2× 16-bit ADC (up to 3.6 Msps), 2× 12-bit DAC (1 MHz), DFSDM with 8 channels, temp sensor - enables precision motor current sensing, audio DAC output, and sigma-delta sensor interface |
Pinout & Package
STM32MP153CAC3T is housed in a TFBGA361 package (12 × 12 mm, 0.5 mm ball pitch), RoHS-compliant and ECOPACK2 certified. The package provides 361 I/O balls with dedicated power/ground arrays, DDR signal groups, and configurable alternate function mapping per pin.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDDCORE | Core power supply | 1.1 V nominal supply for Cortex-A7/M4 cores and L1/L2 caches; requires tight regulation (±3%) and low-noise decoupling |
| VDDIO_3V3 | I/O power supply | 3.3 V supply for GPIOs, UART, SPI, I2C - supports 5 V-tolerant operation enabling direct interfacing with legacy industrial logic |
| NRST | System reset input | Active-low asynchronous reset controlling entire SoC; synchronized internally to avoid metastability during power sequencing |
| BOOT0 | Boot mode selection | Strapped high/low at power-up to select boot source (FSMC, QSPI, SDMMC, USB, or UART) - critical for field firmware recovery |
| CLKIN | External clock input | Accepts 8–48 MHz crystal or oscillator for HSE; feeds PLLs generating system clocks, USB PHY, and Ethernet MAC timing |
| ETH_MDIO / ETH_MDC | Ethernet management interface | Provides IEEE 802.3 MDIO/MDC access to PHY registers - essential for auto-negotiation, link status, and RGMII delay calibration |
| DCMI_D[0:13] | Parallel camera data bus | 14-bit wide synchronous interface supporting up to 140 MB/s throughput - enables direct connection to CMOS image sensors without FPGA bridging |
Key Features
| Feature | Design Value |
|---|---|
| Asymmetric Dual-Core Architecture | Enables concurrent Linux-based UI rendering and deterministic M4-based motor control or sensor preprocessing without OS interference |
| Hardware TrustZone Isolation | Secures boot code, cryptographic keys, and peripheral access via TZC (TrustZone Controller) and ETZPC (Protection Controller) |
| Integrated LTDC + Chrom-ART Accelerator | Reduces CPU load for GUI composition and layer blending - supports alpha blending, color space conversion, and dithering in hardware |
| Flexible Power Management | Supports Standby mode with DDR retention (2 µA total current) and multiple low-power states coordinated via PWR controller and PMIC interface |
| Dual CAN FD with TTCAN | Enables time-triggered deterministic messaging for automotive diagnostics and industrial motion control synchronization |
Applications
| Industrial HMI Panel | Edge Gateway Device |
|---|---|
|
Use Scenario: Touch-enabled operator interface for PLC-controlled machinery with real-time alarm visualization and recipe management. IC Role / Device Role / Timing Role: MPU executes Linux-based Qt application, drives 7-inch TFT display via LTDC, processes touch via I2C, and communicates with PLC over CAN FD and Ethernet. Use Value: Dual-core separation ensures UI remains responsive during CAN message bursts; hardware crypto secures remote firmware updates over HTTPS. |
Use Scenario: Field-deployed protocol translator aggregating Modbus RTU, CANopen, and BLE sensor data into MQTT packets for cloud upload. IC Role / Device Role / Timing Role: Cortex-A7 runs OpenWrt for network stack and MQTT broker; Cortex-M4 handles real-time Modbus polling and CAN frame parsing with sub-millisecond jitter. Use Value: Integrated SDMMC and USB host enable local data buffering and field service firmware loading; Gigabit Ethernet supports high-throughput telemetry streaming. |
| Smart Home Hub | Medical Patient Monitor |
|
Use Scenario: Central hub coordinating Zigbee, Z-Wave, and Matter-over-Thread devices with local voice assistant inference and display feedback. IC Role / Device Role / Timing Role: Cortex-A7 hosts Linux with ALSA audio stack and Matter SDK; Cortex-M4 manages low-latency audio capture via SAI and real-time LED indicator control. Use Value: Hardware-accelerated AES/SHA ensures Matter certification compliance; 37 communication interfaces eliminate need for external bridge ICs. |
Use Scenario: Portable bedside monitor acquiring ECG, SpO₂, and temperature data with waveform display, alarm triggering, and HL7 export via Wi-Fi/Ethernet. IC Role / Device Role / Timing Role: Cortex-M4 samples analog sensors at 1 kHz using ADC+DFSDM, performs real-time arrhythmia detection; Cortex-A7 renders waveforms on TFT and manages HL7 over TCP/IP. Use Value: On-chip 16-bit ADC and temperature sensor meet IEC 60601 accuracy requirements; TrustZone isolates patient data handling from UI stack. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-core MPU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| NXP i.MX 8M Mini (LPC55S69) | Quad Cortex-A53 + Cortex-M33; no integrated TFT controller; different crypto block (CAAM vs. CRYP/HASH); LPDDR4 support only | Better for AI inference workloads; lacks native display engine - requires external bridge or MIPI DSI PHY | Select when prioritizing ML acceleration over integrated graphics and lower BOM cost for display subsystem |
| Renesas RZ/G2L (R9A07G043L2) | Dual Cortex-A55 + Cortex-M33; integrated 2D GPU (not TFT); supports DDR4/LPDDR4x; different security model (ARM TrustZone + Renesas Secure Boot) | Stronger multimedia codec support (H.264 encode/decode); weaker analog peripheral set (no DFSDM, single 12-bit ADC) | Select when video encoding or higher DDR bandwidth is mandatory, and display is handled via HDMI or LVDS |
Compared with i.MX 8M Mini and RZ/G2L, STM32MP153CAC3T uniquely integrates TFT controller, DFSDM, and dual CAN FD in a cost-optimized TFBGA361 package - making it optimal for display-centric industrial edge devices requiring analog sensor fusion and deterministic fieldbus communication.
Availability
STM32MP153CAC3T is available at Aetrix Electronics and suitable for industrial HMI, edge gateway, and medical monitoring systems requiring stable component supply, long-term lifecycle assurance, and full traceability from wafer to shipment.
Supply support for STM32MP153CAC3T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, MEMS, and automotive-grade components since 1987.
The STM32MP series targets heterogeneous computing for industrial and consumer edge applications, combining Linux-capable application processors with real-time microcontroller cores - designed specifically to reduce system complexity and accelerate time-to-market for intelligent connected devices.
FAQ
What boot sources does STM32MP153CAC3T support?
The device supports boot from Quad-SPI flash, parallel NOR/NAND (via FMC), SD/eMMC, USB device, and UART. Boot mode is selected via BOOT0 and BOOT1 pins at power-on reset, with fallback to serial loader if primary source fails. Internal ROM bootloader validates signed images before execution.
Does STM32MP153CAC3T require an external PMIC?
No - it integrates multiple on-die LDOs (1.1 V core, 1.8 V USB, 3.3 V I/O, backup regulator) and supports direct connection to a companion PMIC via VREF_DDR, VREF_SDRAM, and PMIC_EN signals for advanced power sequencing and dynamic voltage scaling in high-efficiency designs.
How is TrustZone security implemented in this MPU?
TrustZone is implemented via hardware-enforced memory isolation: TZC (TrustZone Address Space Controller) gates DDR access, ETZPC (Embedded TrustZone Protection Controller) locks peripheral registers, and secure monitor mode enforces secure/non-secure world transitions. All boot code and crypto keys reside in secure memory regions inaccessible to non-secure software.
What is the maximum resolution and refresh rate supported by the LTDC?
The LTDC supports up to Full HD (1920 × 1080) at 30 fps or WXGA (1366 × 768) at 60 fps, with pixel clock up to 90 MHz. It includes dual layers, alpha blending, color LUTs, and dithering - enabling smooth GUI rendering without GPU offload or external frame buffer RAM.
STM32MP153CAC3T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 361-TFBGA
- Series:
- STM32MP1
- Packaging:
- Tray
- Product Status:
- Active
- Core Processor:
- ARM® Cortex®-A7
- Number of Cores/Bus Width:
- 2 Core, 32-Bit
- Speed:
- 209MHz, 650MHz
- Co-Processors/DSP:
- ARM® Cortex®-M4
- RAM Controllers:
- DDR3, DDR3L, LPDDR2, LPDDR3
- Graphics Acceleration:
- Yes
- Display & Interface Controllers:
- HDMI-CEC, LCD
- Ethernet:
- 10/100Mbps (1)
- SATA:
- -
- USB:
- USB 2.0 (2), USB 2.0 OTG+ PHY (3)
- Voltage - I/O:
- 2.5V, 3.3V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Security Features:
- ARM TZ
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 361-TFBGA (12x12)
- Additional Interfaces:
- CAN, Ethernet, I2C, MMC/SD/SDIO, SPDIF, SPI, UART, USB
STM32MP153CAC3T FAQ
1.How can I place an order for STM32MP153CAC3T through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32MP153CAC3T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32MP153CAC3T reliable?
The price and inventory of STM32MP153CAC3T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32MP153CAC3T is usually 5 days.
3.What payment methods are accepted for STM32MP153CAC3T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32MP153CAC3T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32MP153CAC3T?
STM32MP153CAC3T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32MP153CAC3T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32MP153CAC3T?
For technical support, including STM32MP153CAC3T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32MP153CAC3T requirements.
6.How does Aetrix verify that STM32MP153CAC3T is sourced from the original manufacturer or authorized distributors?
All STM32MP153CAC3T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32MP153CAC3T meets industry standards.
7.What is the process for return or replacement of STM32MP153CAC3T?
All STM32MP153CAC3T units undergo pre-shipment inspection (PSI). If there is an issue with STM32MP153CAC3T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32MP153CAC3T part is unused and in its original packaging.
Return procedure for STM32MP153CAC3T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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