STMicroelectronics STM32MP153CAD3T
- Part No.:
- STM32MP153CAD3T
- Manufacturer:
- STMicroelectronics
- Category:
- Microprocessors
- Package:
- 257-TFBGA
- Datasheet:
-
STM32MP153CAD3T.pdf
- Description:
- IC MPU STM32MP1 650MHZ 257TFBGA
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
STM32MP153CAD3T from STMicroelectronics is a dual-core Arm® Cortex®-A7 (800 MHz) + Cortex®-M4 microprocessor unit (MPU) with TrustZone®, NEON™, and hardware crypto acceleration (AES/SHA/HMAC/RNG). It integrates 708 KB SRAM, TFT LCD controller supporting up to Full HD @30 fps, dual CAN FD interfaces (one TTCAN), and 37 communication peripherals including USB 2.0 HS Host/OTG, Gigabit Ethernet, and HDMI-CEC - deployed in industrial HMIs, smart gateways, and edge AI vision terminals.
For engineers reviewing the STM32MP153CAD3T datasheet, STM32MP153CAD3T pinout, STM32MP153CAD3T application, or STM32MP153CAD3T equivalent, key selection criteria include dual-core asymmetric processing capability, DDR3/LPDDR3 memory controller support, TrustZone-enabled secure boot, low-power Standby mode (2 µA), and TFBGA361 (12 × 12 mm, 0.5 mm pitch) package compatibility with industrial thermal and layout constraints.
Technical Context
The STM32MP153CAD3T implements a heterogeneous dual-core architecture: two Cortex-A7 cores run Linux-based applications with 256 KB unified L2 cache and Arm NEON for media processing, while the Cortex-M4 (209 MHz) handles real-time control tasks with FPU and MPU isolation. TrustZone enforces secure/non-secure world separation at both CPU and peripheral levels via TZC and ETZPC.
Its interconnect matrix comprises a 64-bit AXI bus (266 MHz) and 32-bit AHB bus (209 MHz), enabling concurrent high-bandwidth data flows between DDR, SRAM, peripherals, and DMA controllers - including one MDMA and two dual-port DMAs with request routing for deterministic peripheral servicing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Cores | Dual Arm Cortex-A7 @800 MHz + single Cortex-M4 @209 MHz - enables Linux + RTOS coexistence on one die |
| Memory Interface | LPDDR2/LPDDR3-1066 or DDR3/DDR3L-1066 (16/32-bit) up to 1 Gbyte - supports cost-optimized or performance-tier SDRAM choices |
| Internal SRAM | 708 KB total: 256 KB AXI SYSRAM + 384 KB AHB SRAM + 64 KB Backup SRAM + 4 KB Backup SRAM - enables fast code/data access and RTC-retained state |
| Security | Arm TrustZone, secure boot, active tamper detection, 3072-bit fuses (96-bit UID) - meets IEC 62443-3-3 SL2 requirements for secure firmware updates |
| Graphics | LCD-TFT controller with dual layers, programmable LUT, pixel clock up to 90 MHz - drives WXGA (1366×768) @60 fps or Full HD (1920×1080) @30 fps displays directly |
| Low-Power Mode | Standby mode current ≤2 µA (no RTC/LSE/BKPSRAM/RETRAM) - enables battery-backed operation for >1 year on coin cell |
| Communication | 2× CAN FD (1× TTCAN), 6× I2C FM+, 4× UART/4× USART, 6× SPI, 4× SAI, SPDIF Rx, GMAC (IEEE 1588v2), USB 2.0 HS Host+OTG - covers industrial fieldbus, audio, time-sync, and connectivity needs |
Pinout & Package
STM32MP153CAD3T uses a TFBGA361 package (12 × 12 mm, 0.5 mm ball pitch, B031 variant), RoHS-compliant and ECOPACK2 certified. Pin assignment follows ST's documented ball map with dedicated power domains (VDDCORE, VDDIO, VDDUSB, VDDA), multiple I/O banks supporting 5 V-tolerant operation, and dedicated debug (SWD/JTAG), reset (NRST_CORE/NRST), and boot configuration pins.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDDCORE | Core power supply | 1.1 V ±5% input for Cortex-A7/M4 logic; requires low-noise external regulation |
| VDDIO | I/O power supply | 1.71–3.6 V domain powering all GPIOs; enables 5 V-tolerant I/O operation |
| NRST_CORE | Core reset input | Asynchronous active-low reset for Cortex-A7 subsystem only; independent of system NRST |
| BOOT0/BOOT1 | Boot mode selection | Two-pin strap controlling boot source (FSMC, QSPI, SDMMC, USB, UART) during power-up |
| OSC_IN/OSC_OUT | HSE oscillator interface | 8–48 MHz crystal connection for precise system clock generation and USB/Ethernet timing |
| PA0–PA15, PB0–PB15, etc. | General-purpose I/O | 176 total I/Os with interrupt/Wakeup/tamper capability; up to 8 configurable as secure I/Os |
Key Features
| Feature | Design Value |
|---|---|
| Asymmetric dual-core execution | Linux on Cortex-A7 + real-time control on Cortex-M4 eliminates need for separate MCU in gateway designs |
| Hardware crypto acceleration | AES-128/192/256, SHA-256, HMAC, and dual TRNG enable TLS 1.3 handshake in <100 ms without CPU load |
| Flexible memory controller (FMC) | Supports SLC NAND (8-bit ECC) and parallel NOR/PSRAM - enables local firmware storage with wear leveling |
| Advanced timer set | 29 timers including 2× advanced motor control timers (TIM1/TIM8), 5× low-power timers, and RTC with sub-second accuracy - suitable for servo control and time-stamped logging |
| Camera interface (DCMI) | 8–14-bit parallel interface up to 140 MB/s - captures 720p@60fps raw Bayer data for on-die image preprocessing |
Applications
| Industrial HMI | Smart Gateway |
|---|---|
Use Scenario: Touch-enabled panel PC in factory automation with local PLC interfacing and remote cloud telemetry. IC Role / Device Role / Timing Role: Main application processor running embedded Linux UI stack and real-time motion control firmware on Cortex-M4. Use Value: Dual-core isolation ensures deterministic response to encoder interrupts while rendering GUI - no OS jitter affects servo loop timing. | Use Scenario: Edge node aggregating Modbus, CAN FD, and BLE sensor data for predictive maintenance analytics. IC Role / Device Role / Timing Role: Protocol translation hub with secure boot, encrypted OTA updates, and IEEE 1588v2 time synchronization over GMAC. Use Value: Hardware-accelerated crypto and TrustZone protect firmware integrity and sensor data confidentiality end-to-end. |
| Medical Imaging Terminal | Automotive Infotainment Prototype |
Use Scenario: Portable ultrasound display terminal requiring real-time image rendering and DICOM export. IC Role / Device Role / Timing Role: Graphics processor driving 1080p display via LTDC while acquiring raw sensor frames via DCMI and compressing with NEON-optimized codecs. Use Value: Integrated TFT controller and 90 MHz pixel clock eliminate external TCON IC, reducing BOM and EMI risk. | Use Scenario: In-vehicle infotainment development platform supporting Android Automotive and safety-critical cluster functions. IC Role / Device Role / Timing Role: Application SoC for IVI middleware and isolated M4 core for ASIL-B diagnostics and CAN FD vehicle network monitoring. Use Value: TTCAN support enables time-triggered scheduling for synchronized actuator commands across ECUs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-core MPU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| NXP i.MX 8M Mini (LPC55S69) | Quad Cortex-A53 + Cortex-M33; lacks integrated TFT controller and TTCAN; higher typical power draw in Run mode | Better for multi-threaded Linux apps but requires external display bridge and CAN transceiver | Select when prioritizing ARMv8-A compute density over display integration and automotive time-triggered networking |
| Renesas RZ/G2L (R9A07G043L2) | Dual Cortex-A55 + Cortex-M33; includes 3D GPU and MIPI-DSI, but no hardware AES/SHA accelerators or TrustZone-configurable peripherals | Suited for rich GUIs with 3D effects but requires software crypto libraries for secure boot | Select when display output must be MIPI-DSI and GPU offload is critical, accepting higher SW security validation effort |
Compared with i.MX 8M Mini and RZ/G2L, STM32MP153CAD3T uniquely combines TFT-LCD controller, TTCAN, TrustZone-peripheral protection, and ultra-low Standby current - making it optimal for cost-sensitive, display-integrated industrial edge devices requiring long battery life and functional safety features.
Availability
STM32MP153CAD3T is available at Aetrix Electronics and suitable for industrial HMIs, smart gateways, and medical imaging terminals requiring stable component supply across extended product lifecycles.
Supply support for STM32MP153CAD3T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, designing and manufacturing microcontrollers, power management ICs, sensors, and analog chips for industrial, automotive, and consumer markets.
The STM32MP series targets heterogeneous computing at the intelligent edge - combining Linux-capable application processing with real-time MCU functionality and hardware security to replace multi-chip solutions in resource-constrained embedded systems.
FAQ
What boot sources does STM32MP153CAD3T support?
STM32MP153CAD3T supports boot from Quad-SPI flash, eMMC/SD card, NAND flash via FMC, USB device, and UART. Boot mode is selected by BOOT0/BOOT1 pin strapping at power-on reset, and the first-stage bootloader (FSBL) validates signature before loading second-stage firmware - enabling secure chain-of-trust execution.
Does STM32MP153CAD3T require an external PMIC?
STM32MP153CAD3T integrates on-die LDOs for RETRAM, BKPSRAM, USB 1.8 V, and 1.1 V core supply, but external PMIC is recommended for full system power sequencing, DDR termination voltage (VTT), and dynamic voltage scaling in high-performance use cases - especially when using LPDDR3 or DDR3L at 1066 MT/s.
How is TrustZone implemented on this MPU?
TrustZone is implemented at three levels: CPU-level secure monitor (Secure Monitor Call), memory-level address space protection via TrustZone Address Space Controller (TZC) for DDR, and peripheral-level access control via Enhanced TrustZone Protection Controller (ETZPC). All secure/non-secure world transitions are hardware-enforced with zero software overhead.
What is the maximum resolution supported by the LTDC controller?
The LTDC controller supports up to Full HD (1920 × 1080) at 30 fps or WXGA (1366 × 768) at 60 fps, with pixel clock up to 90 MHz and dual-layer composition including alpha blending and programmable color LUT - enabling overlay-based UIs without GPU acceleration.
STM32MP153CAD3T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 257-TFBGA
- Series:
- STM32MP1
- Packaging:
- Tray
- Product Status:
- Active
- Core Processor:
- ARM® Cortex®-A7
- Number of Cores/Bus Width:
- 2 Core, 32-Bit
- Speed:
- 209MHz, 650MHz
- Co-Processors/DSP:
- ARM® Cortex®-M4
- RAM Controllers:
- DDR3, DDR3L, LPDDR2, LPDDR3
- Graphics Acceleration:
- Yes
- Display & Interface Controllers:
- HDMI-CEC, LCD
- Ethernet:
- 10/100Mbps (1)
- SATA:
- -
- USB:
- USB 2.0 (2), USB 2.0 OTG+ PHY (3)
- Voltage - I/O:
- 2.5V, 3.3V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Security Features:
- ARM TZ
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 257-TFBGA (10x10)
- Additional Interfaces:
- CAN, Ethernet, I2C, MMC/SD/SDIO, SPDIF, SPI, UART, USB
STM32MP153CAD3T FAQ
1.How can I place an order for STM32MP153CAD3T through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32MP153CAD3T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32MP153CAD3T reliable?
The price and inventory of STM32MP153CAD3T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32MP153CAD3T is usually 5 days.
3.What payment methods are accepted for STM32MP153CAD3T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32MP153CAD3T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32MP153CAD3T?
STM32MP153CAD3T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32MP153CAD3T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32MP153CAD3T?
For technical support, including STM32MP153CAD3T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32MP153CAD3T requirements.
6.How does Aetrix verify that STM32MP153CAD3T is sourced from the original manufacturer or authorized distributors?
All STM32MP153CAD3T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32MP153CAD3T meets industry standards.
7.What is the process for return or replacement of STM32MP153CAD3T?
All STM32MP153CAD3T units undergo pre-shipment inspection (PSI). If there is an issue with STM32MP153CAD3T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32MP153CAD3T part is unused and in its original packaging.
Return procedure for STM32MP153CAD3T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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