STMicroelectronics STM32U535CEU6Q
- Part No.:
- STM32U535CEU6Q
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 48-UFQFN Exposed Pad
- Datasheet:
-
STM32U535CEU6Q.pdf
- Description:
- IC MCU 32BIT 512KB FLSH 48UFQFPN
- Quantity:
- Payment:

- Shipping:

Inventory:1,497
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
STM32U535CEU6Q from STMicroelectronics is an ultra-low-power Arm® Cortex®-M33 microcontroller with TrustZone® security, 512 KB flash, 274 KB SRAM, and integrated FPU/MPU-designed for secure, battery-operated IoT edge nodes requiring real-time sensor fusion, cryptographic operations, and sub-μA standby operation. It delivers 240 DMIPS at up to 160 MHz, supports LPBAM autonomous peripheral operation down to Stop 2 mode, and integrates hardware accelerators including CORDIC, FMAC, HASH, and a NIST SP800-90B-compliant TRNG.
For engineers reviewing the STM32U535CEU6Q datasheet, STM32U535CEU6Q pinout, STM32U535CEU6Q application, or STM32U535CEU6Q equivalent, key selection criteria include its dual-bank ECC flash with read-while-write capability, 370 nA Standby-with-RTC power profile, TrustZone-enabled secure boot and firmware upgrade (TF-M compatible), and support for CAN FD, USB FS host/device, and Octo-SPI external memory interfaces.
Technical Context
The STM32U535CEU6Q implements a dual-core security architecture: the Arm Cortex-M33 core executes in both Secure and Non-secure states under TrustZone, with SAU-configurable memory regions and securable peripherals. Its FlexPowerControl system enables dynamic voltage scaling between LDO and SMPS regulators, supporting on-the-fly switching and multiple low-power modes-including 90 nA Shutdown and 3.0 µA Stop 2 with 16-Kbyte SRAM retention.
Peripherals are partitioned across security domains via the Global TrustZone Controller (GTZC); critical blocks like RNG, HASH, and secure boot ROM reside exclusively in Secure state. The ART Accelerator includes 8-Kbyte instruction cache and 4-Kbyte data cache, enabling zero-wait-state execution from flash and external memories while maintaining deterministic timing for real-time tasks.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M33 with TrustZone, FPU, MPU - enables secure real-time execution with hardware-isolated secure/non-secure worlds. |
| Max Clock / Performance | 160 MHz / 240 DMIPS - supports high-throughput signal processing and protocol stacks without external co-processors. |
| Flash Memory | 512 KB with ECC, 2 banks, 100 kcycles endurance - allows safe over-the-air updates with atomic bank swapping and error correction. |
| SRAM | 274 KB total, up to 64 KB with ECC enabled - provides robust data buffering for cryptographic contexts and safety-critical variables. |
| Low-Power Modes | 90 nA Shutdown, 370 nA Standby-with-RTC, 3.0 µA Stop 2 (16 KB SRAM) - extends battery life in coin-cell-powered sensors and wearables. |
| Security Features | TrustZone, RDP, HDP, SFI, TF-M support, 96-bit UID, 512-byte OTP - meets PSA Level 3 and SESIP certification prerequisites for secure firmware lifecycle management. |
| Analog Peripherals | 14-bit 2.5-Msps ADC (oversampling), dual 12-bit DAC, OPAMP+PGA, ultra-low-power comparator - enables precision sensor conditioning and closed-loop control without external analog ICs. |
| Communication Interfaces | CAN FD, USB FS host/device, 5x USART/LPUART, 4x I²C FM+, 3x SPI, SAI, SDMMC, Octo-SPI - supports industrial fieldbus, audio streaming, secure bootloader, and high-speed external memory expansion. |
Pinout & Package
STM32U535CEU6Q is housed in a 48-pin UFQFPN package (7 × 7 mm, 0.5 mm pitch), optimized for space-constrained portable and wearable applications. This RoHS-compliant, ECOPACK2-qualified package features exposed thermal pad for enhanced heat dissipation in continuous operation scenarios.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VDDA, VDDIO2 | Core, analog, and I/O supply rails | Independent 1.71–3.6 V domains enable mixed-signal integrity and flexible power sequencing; VDDIO2 supports 1.08–3.6 V for low-voltage interface compatibility. |
| VSS, VSSA, VSSIO2 | Ground references | Dedicated analog and I/O ground planes minimize noise coupling into ADC/DAC paths and high-speed digital signals. |
| PA0–PA15, PB0–PB15, PC0–PC15, PD0–PD15, PE0–PE7 | General-purpose I/Os | Up to 82 fast GPIOs with interrupt capability; most are 5V-tolerant and support independent supply down to 1.08 V for interfacing with legacy logic or low-voltage sensors. |
| NRST | Active-low reset input | Asynchronous reset pin with internal pull-up; accepts external reset sources or watchdog timeout signals to initiate cold boot or recovery sequence. |
| BOOT0 | Boot mode selection | Configures boot source (system memory, main flash, or embedded SRAM) during power-on reset; used for DFU, secure boot, or debug recovery. |
| SWCLK, SWDIO | Serial Wire Debug interface | Two-pin debug port supporting full SWD functionality including breakpoints, watchpoints, and memory access - essential for secure firmware development and field diagnostics. |
| VBAT | Backup power supply | Connects to coin cell or supercapacitor to retain RTC time/calendar, 32×32-bit backup registers, and 2-Kbyte backup SRAM during main power loss. |
Key Features
| Feature | Design Value |
|---|---|
| LPBAM (Low-Power Background Autonomous Mode) | Enables DMA-driven peripheral chains (e.g., ADC→DMA→AES→SRAM) to execute without CPU wake-up - reduces active time by >90% in sensor logging applications. |
| FlexPowerControl with SMPS + LDO | Integrated step-down converter and LDO allow dynamic regulator selection based on performance vs. efficiency trade-offs - improves system-level energy efficiency by up to 30% vs. LDO-only designs. |
| CORDIC & FMAC Co-processors | Hardware-accelerated trigonometric and filtering math offloads CPU during motor control, FFT-based spectral analysis, or sensor fusion - cuts computation latency by 5× compared to software-only implementation. |
| Secure Firmware Installation (SFI) | Root-secure services (RSS) validate and install signed firmware images using immutable boot ROM - eliminates need for external secure elements in cost-sensitive edge devices. |
| Octo-SPI Interface | Supports x1/x2/x4/x8 I/O modes with DDR capability and wrap-around addressing - enables direct XIP execution from up to 2 GB external flash, reducing BOM cost and PCB footprint. |
| ULPMark™-CP Score | 464 - industry-leading benchmark score confirming best-in-class energy efficiency for active-mode computational workloads in ultra-low-power MCUs. |
Applications
| Smart Utility Metering | Wearable Health Monitor |
|---|---|
Use Scenario: Battery-powered gas/water meter with tamper detection, pulse counting, and LoRaWAN backhaul. IC Role / Device Role / Timing Role: Main application MCU handling metrology algorithms, secure OTA updates, RTC-based billing intervals, and FDCAN communication with internal modules. Use Value: 370 nA Standby-with-RTC ensures >10-year battery life; TrustZone isolates metrology firmware from connectivity stack; LPBAM automates sensor polling and encryption without CPU intervention. | Use Scenario: ECG/PPG patch with motion artifact compensation, Bluetooth LE telemetry, and onboard arrhythmia detection. IC Role / Device Role / Timing Role: Central sensor hub managing analog front-end (ADC+OPAMP+PGA), digital filter (MDF/ADF), BLE stack, and secure health data storage. Use Value: 14-bit ADC with hardware oversampling achieves <1 µV RMS noise floor; CORDIC/FMAC accelerate QRS detection in real time; 90 nA Shutdown extends shelf life before first use. |
| Industrial Predictive Maintenance Node | Secure Access Control Terminal |
Use Scenario: Vibration and temperature monitoring node on rotating machinery with local anomaly classification and encrypted cloud upload. IC Role / Device Role / Timing Role: Edge AI inference engine running TinyML models on sensor data, secured by TrustZone and authenticated via PKI-based TLS handshake. Use Value: 274 KB SRAM accommodates model weights and inference buffers; HASH + TRNG enable secure TLS 1.3 handshakes; Stop 3 mode (1.4 µA) preserves context between vibration bursts. | Use Scenario: Contactless smart card reader with biometric verification, PIN entry, and secure credential storage for physical access systems. IC Role / Device Role / Timing Role: Secure controller managing NFC interface, capacitive touch sensing (TSC), secure element emulation, and encrypted audit log storage. Use Value: 20-channel TSC supports multi-touch keypad and gesture recognition; 512-byte OTP stores root keys; HDP protects secure boot code from physical probing attacks. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ultra-low-power secure MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32L562VEJ6 | Same Cortex-M33 core and TrustZone, but lower max clock (110 MHz), 512 KB flash, no Octo-SPI, no CORDIC/FMAC, 12-bit ADC only. | Lacks hardware math acceleration and external memory bandwidth needed for edge AI or high-resolution sensor fusion. | Select when cost sensitivity outweighs need for advanced peripherals and higher compute throughput. |
| NXP LPC55S69JBD100 | Dual Cortex-M33 cores, 640 KB flash, no SMPS, higher active current (2.9 µA/MHz), lacks LPBAM and ULPMark-validated low-power modes. | Higher power consumption in Stop modes limits battery lifetime in always-on edge nodes. | Prefer for applications requiring dual-core parallelism over sub-µA quiescent current. |
Compared with STM32L562VEJ6 and LPC55S69JBD100, the STM32U535CEU6Q uniquely combines TrustZone security, sub-µA low-power modes, hardware math acceleration, and Octo-SPI expandability - making it optimal for next-generation secure, battery-constrained edge intelligence platforms.
Availability
STM32U535CEU6Q is available at Aetrix Electronics and suitable for smart utility metering, wearable health monitors, industrial predictive maintenance nodes, and secure access control terminals requiring stable component supply across long product lifecycles.
Supply support for STM32U535CEU6Q includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, delivering intelligent power, sensing, and control solutions for automotive, industrial, and consumer markets.
The STM32U5 series is ST's flagship ultra-low-power secure MCU line, designed specifically for battery-operated IoT endpoints demanding PSA-certifiable security, sub-µA power profiles, and hardware-accelerated edge processing capabilities.
FAQ
What is the maximum operating temperature range for STM32U535CEU6Q?
The STM32U535CEU6Q is qualified for industrial operation from –40 °C to +125 °C ambient temperature. This extended range is validated per JEDEC JESD47 and supports deployment in harsh environments such as smart meters, motor drives, and outdoor industrial gateways without derating.
Does STM32U535CEU6Q support USB device and host modes simultaneously?
No - the integrated USB full-speed controller supports either device or host mode, selectable at runtime via software configuration. Simultaneous dual-role operation is not supported; external USB PHY or companion IC would be required for OTG-like behavior.
How is TrustZone security enforced on STM32U535CEU6Q?
TrustZone is implemented via hardware-enforced isolation: the SAU defines secure/non-secure memory regions, GTZC gates peripheral access, and secure boot ROM validates firmware signatures before execution. All secure peripherals (RNG, HASH, AES) are accessible only from Secure state, with debug access disabled unless RDP level 0 is set.
Can the 2-Kbyte backup SRAM retain data during VDD power loss?
Yes - the 2-Kbyte backup SRAM retains data when powered solely by the VBAT rail (e.g., coin cell), alongside the RTC and 32×32-bit backup registers. Data persistence is guaranteed across all low-power modes including Shutdown, provided VBAT remains ≥1.0 V and the BKP domain is enabled.
STM32U535CEU6Q Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 48-UFQFN Exposed Pad
- Series:
- STM32U5
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-M33
- Core Size:
- 32-Bit
- Speed:
- 160MHz
- Connectivity:
- CANbus, I2C, IrDA, LINbus, SAI, SmartCard, SPDIF, SPI, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
- Number of I/O:
- 33
- Program Memory Size:
- 512KB (512K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 274K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 3.6V
- Data Converters:
- A/D 10x12/14b SAR; D/A 2x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32U535CEU6Q FAQ
1.How can I place an order for STM32U535CEU6Q through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32U535CEU6Q on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32U535CEU6Q reliable?
The price and inventory of STM32U535CEU6Q are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32U535CEU6Q is usually 5 days.
3.What payment methods are accepted for STM32U535CEU6Q?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32U535CEU6Q transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32U535CEU6Q?
STM32U535CEU6Q orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32U535CEU6Q order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32U535CEU6Q?
For technical support, including STM32U535CEU6Q datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32U535CEU6Q requirements.
6.How does Aetrix verify that STM32U535CEU6Q is sourced from the original manufacturer or authorized distributors?
All STM32U535CEU6Q products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32U535CEU6Q meets industry standards.
7.What is the process for return or replacement of STM32U535CEU6Q?
All STM32U535CEU6Q units undergo pre-shipment inspection (PSI). If there is an issue with STM32U535CEU6Q, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32U535CEU6Q part is unused and in its original packaging.
Return procedure for STM32U535CEU6Q:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
STM32U535CEU6Q Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

