STMicroelectronics STM32U535RCT6
- Part No.:
- STM32U535RCT6
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 64-LQFP
- Datasheet:
-
STM32U535RCT6.pdf
- Description:
- IC MCU 32BIT 256KB FLASH 64LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:4,229
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
STM32U535RCT6 from STMicroelectronics is an ultra-low-power Arm® Cortex®-M33 microcontroller with TrustZone® security, 512 KB flash, 274 KB SRAM, and integrated FPU-designed for secure, battery-constrained IoT edge nodes requiring real-time sensor fusion, encrypted OTA updates, and sub-μA sleep operation. It delivers 240 DMIPS at 160 MHz and supports LPBAM autonomous peripheral operation down to Stop 2 mode.
For engineers reviewing the STM32U535RCT6 datasheet, STM32U535RCT6 pinout, STM32U535RCT6 application, or STM32U535RCT6 equivalent, key selection criteria include its 90 nA Shutdown current, dual 14-bit/12-bit ADCs with hardware oversampling, CAN FD interface, TrustZone-enabled secure boot, and LQFP64 package compatibility with industrial-grade temperature range (–40 °C to +125 °C).
Technical Context
The STM32U535RCT6 implements a dual-bank flash architecture with ECC and read-while-write capability, enabling seamless firmware updates without runtime interruption. Its FlexPowerControl system integrates SMPS and LDO regulators with on-the-fly voltage scaling, supporting dynamic power states from 90 nA Shutdown to 16.3 μA/MHz Run mode.
TrustZone® enforces hardware-isolated secure/non-secure worlds: peripherals, memories, and I/Os are securable via GTZC, while the Root of Trust leverages unique boot entry, HDP, and embedded RSS for Secure Firmware Installation (SFI) and TF-M–based firmware upgrades.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M33 with TrustZone, FPU, MPU, and DSP extensions-enables secure real-time control with deterministic floating-point math. |
| Max Clock / Performance | 160 MHz / 240 DMIPS-achieved via 8-KB instruction cache (ART Accelerator), enabling zero-wait-state execution from flash. |
| Memory | 512 KB flash (ECC, 2 banks, 100 kcycles), 274 KB SRAM (up to 64 KB with ECC)-supports robust code storage and large buffer handling for sensor data aggregation. |
| Low-Power Modes | 90 nA Shutdown, 200 nA Standby, 3.0 µA Stop 2 with 16-KB SRAM-enables multi-year battery life in wireless sensor endpoints. |
| Analog Peripherals | 14-bit ADC @ 2.5 Msps (hardware oversampling), dual 12-bit DACs, 1 OPAMP with PGA, 1 ultra-low-power comparator-suitable for precision analog signal conditioning without external components. |
| Security Features | TrustZone isolation, 96-bit unique ID, 512-byte OTP, HASH accelerator, NIST SP800-90B–compliant TRNG, secure hide protection area (HDP)-meets PSA Level 3 and SESIP certification prerequisites. |
| Communication Interfaces | 1 CAN FD, 4 I²C FM+, 5 USART/LPUART, 1 USB FS host/device, 1 SAI, OCTOSPI, SDMMC-supports mixed wired/wireless connectivity in constrained-edge gateways. |
Pinout & Package
LQFP64 (10 × 10 mm, 0.5 mm pitch) package with exposed thermal pad; RoHS-compliant ECOPACK2.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VDDA, VDDIO2 | Core, analog, and I/O supply rails | Independent 1.71–3.6 V domains enable mixed-signal integrity and flexible power sequencing. |
| VSS, VSSA | Digital and analog ground returns | Separate analog/digital ground pins reduce noise coupling into ADC/DAC paths. |
| PA0–PA15, PB0–PB15, PC0–PC15, PD0–PD15, PE0–PE7 | General-purpose I/Os | Up to 82 fast I/Os; most 5V-tolerant, 14 support independent 1.08–3.6 V supply-ideal for interfacing legacy sensors and level-shifted buses. |
| NRST | Active-low reset input | Asynchronous reset with internal pull-up; compatible with external watchdog or power-on-reset ICs. |
| BOOT0 | Boot mode selection | Configures boot source (system memory, flash, or SRAM); critical for field firmware recovery and secure boot enforcement. |
| PA13/PA14/PA15 | SWD debug interface | Serial Wire Debug (SWD) pins-support full debug, trace, and programming without JTAG overhead. |
| PF0–PF1 | RTC oscillator inputs | Connect 32.768 kHz crystal for calendar RTC with hardware calibration and tamper detection. |
Key Features
| Feature | Design Value |
|---|---|
| LPBAM (Low-Power Background-Autonomous Mode) | Enables DMA-driven peripheral chains (e.g., ADC → memory → timer → GPIO) fully autonomous in Stop 2 mode-eliminates CPU wake-ups for sensor polling. |
| FlexPowerControl with SMPS | Integrated step-down SMPS reduces system power by up to 30% vs. LDO-only solutions; supports dynamic voltage scaling during runtime transitions. |
| CORDIC + FMAC co-processors | Hardware-accelerated trigonometric (sin/cos/tan) and filter math (IIR/FIR) offload CPU-critical for real-time motor control and audio preprocessing. |
| Secure Firmware Upgrade (TF-M) | ARM Trusted Firmware-M implementation validated for over-the-air updates with rollback protection, signature verification, and encrypted image loading. |
| VBAT domain retention | RTC, 32 × 32-bit backup registers, and 2-KB backup SRAM retain state during main power loss-preserves timekeeping and critical context across brownouts. |
Applications
| Smart Utility Meter | Industrial Wireless Sensor Node |
|---|---|
Use Scenario: Battery-powered gas/water meter with ultrasonic flow sensing, LoRaWAN backhaul, and 10-year battery life requirement. IC Role / Device Role / Timing Role: Main controller executing metrology algorithms, managing secure OTA updates, and orchestrating LPBAM-triggered ADC sampling and RF transmission bursts. Use Value: 90 nA Shutdown and 3.0 µA Stop 2 modes extend battery life; TrustZone isolates metrology firmware from communication stack; CAN FD enables local bus diagnostics. | Use Scenario: Factory-floor vibration monitor using MEMS accelerometer, BLE 5.0 telemetry, and predictive maintenance analytics at edge. IC Role / Device Role / Timing Role: Real-time sensor hub aggregating multi-axis data, performing FFT via CORDIC/FMAC, and enforcing secure firmware validation before each boot. Use Value: Dual 14-bit/12-bit ADCs capture high-fidelity vibration spectra; 274 KB SRAM buffers burst samples; 125 ULPMark™-PP score confirms ultra-low-power processing efficiency. |
| Medical Wearable Patch | Secure Smart Home Gateway |
Use Scenario: ECG/PPG patch with clinical-grade analog front-end, Bluetooth LE medical profile, and cryptographic signing of health data. IC Role / Device Role / Timing Role: Secure data acquisition MCU with isolated TrustZone secure world running crypto libraries and non-secure world handling BLE stack and UI. Use Value: 1 OPAMP with PGA conditions biopotential signals; TRNG and HASH accelerate TLS 1.3 handshakes; 464 ULPMark™-CP validates low-power cryptographic throughput. | Use Scenario: Zigbee/Z-Wave-to-Matter bridge with local policy enforcement, secure device onboarding, and firmware update coordination. IC Role / Device Role / Timing Role: Root-of-trust anchor managing device identity, secure boot, and encrypted inter-device messaging via SAI and I²C peripherals. Use Value: 96-bit unique ID and 512-byte OTP store device credentials; securable I/Os prevent side-channel tampering; OCTOSPI interfaces external secure element or flash. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ultra-low-power secure MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32U575RIT6 | Higher flash (2 MB), larger SRAM (1 MB), added Octo-SPI XIP mode and dual-core support (Cortex-M33 + Cortex-M0+) | Targeted at complex edge AI inference and multi-protocol gateway use cases requiring >512 KB code space | Select when needing extended memory, hardware XIP, or asymmetric multiprocessing-not for cost- or size-constrained endpoints. |
| RA4M3GDB00FHI#AA0 | Arm Cortex-M4F core, 1 MB flash, 384 KB SRAM, no TrustZone, Renesas Secure Crypto Engine instead of TrustZone | Designed for industrial HMI and motor control with strong DSP performance but less granular peripheral security than TrustZone | Choose if prioritizing floating-point DSP throughput over hardware-enforced memory isolation and PSA-certified secure boot. |
Compared with STM32U575RIT6, the STM32U535RCT6 offers lower BOM cost and smaller footprint for mid-tier secure IoT nodes; versus RA4M3, it provides stronger hardware-based security partitioning and superior ultra-low-power metrics-making it optimal for battery-critical, certification-driven deployments.
Availability
STM32U535RCT6 is available at Aetrix Electronics and suitable for smart utility meters, industrial wireless sensor nodes, medical wearable patches, and secure smart home gateways requiring stable component supply, long-term lifecycle assurance, and certified security features.
Supply support for STM32U535RCT6 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, specializing in microcontrollers, power management, sensors, and automotive ICs-with over 40 years of embedded systems innovation.
The STM32U5 series targets ultra-low-power, secure edge computing applications-including battery-operated IoT endpoints, medical wearables, and industrial monitoring-by integrating TrustZone, advanced power gating, and hardware accelerators into a single die.
FAQ
What is the maximum operating temperature for STM32U535RCT6?
The STM32U535RCT6 is qualified for industrial and extended temperature ranges: –40 °C to +125 °C ambient, verified per JEDEC JESD22-A104. This rating applies to all LQFP64 variants and is confirmed in Section 5.3.1 of DS14217 Rev 5, supporting deployment in harsh environments like smart meters and factory automation.
Does STM32U535RCT6 support hardware encryption acceleration?
Yes-it includes a dedicated HASH hardware accelerator supporting SHA-1, SHA-224, and SHA-256 algorithms, plus a NIST SP800-90B–compliant True Random Number Generator (TRNG). These are accessible from both secure and non-secure worlds under TrustZone control, enabling efficient TLS 1.2/1.3 and secure key generation without software overhead.
Can STM32U535RCT6 run code directly from external Octo-SPI flash?
No-STM32U535RCT6 does not support execute-in-place (XIP) from Octo-SPI flash. Its OCTOSPI interface is configured for memory-mapped data access only. Code execution must occur from internal flash or SRAM; external flash is used for data storage, firmware images, or configuration tables.
Is the LQFP64 package of STM32U535RCT6 lead-free and RoHS compliant?
Yes-the LQFP64 package (order code 5W) is ECOPACK2 certified, meeting RoHS Directive 2011/65/EU and REACH Regulation (EC) No. 1907/2006. Lead-free matte tin termination and halogen-free molding compound are confirmed in Section 6.4 of DS14217 Rev 5 and ST's official packaging documentation.
STM32U535RCT6 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 64-LQFP
- Series:
- STM32U5
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-M33
- Core Size:
- 32-Bit
- Speed:
- 160MHz
- Connectivity:
- CANbus, I2C, IrDA, LINbus, SAI, SmartCard, SPDIF, SPI, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
- Number of I/O:
- 51
- Program Memory Size:
- 256KB (256K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 274K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 3.6V
- Data Converters:
- A/D 17x12/14b SAR; D/A 2x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32U535RCT6 FAQ
1.How can I place an order for STM32U535RCT6 through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32U535RCT6 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32U535RCT6 reliable?
The price and inventory of STM32U535RCT6 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32U535RCT6 is usually 5 days.
3.What payment methods are accepted for STM32U535RCT6?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32U535RCT6 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32U535RCT6?
STM32U535RCT6 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32U535RCT6 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32U535RCT6?
For technical support, including STM32U535RCT6 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32U535RCT6 requirements.
6.How does Aetrix verify that STM32U535RCT6 is sourced from the original manufacturer or authorized distributors?
All STM32U535RCT6 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32U535RCT6 meets industry standards.
7.What is the process for return or replacement of STM32U535RCT6?
All STM32U535RCT6 units undergo pre-shipment inspection (PSI). If there is an issue with STM32U535RCT6, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32U535RCT6 part is unused and in its original packaging.
Return procedure for STM32U535RCT6:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
STM32U535RCT6 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

