STMicroelectronics STM32U535RET6Q
- Part No.:
- STM32U535RET6Q
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 64-LQFP
- Datasheet:
-
STM32U535RET6Q.pdf
- Description:
- IC MCU 32BIT 512KB FLASH 64LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:4,666
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Product details
Overview
STM32U535RET6Q from STMicroelectronics is an ultra-low-power Arm® Cortex®-M33 microcontroller with TrustZone® security, 240 DMIPS performance, 512 KB flash (ECC-enabled), 274 KB SRAM (64 KB with ECC), and integrated SMPS/LDO power management. It operates from 1.71–3.6 V across –40 °C to +85 °C and delivers 3.0 µA Stop 2 mode with 16-Kbyte SRAM for battery-powered IoT sensor nodes and secure edge endpoints.
For engineers reviewing the STM32U535RET6Q datasheet, STM32U535RET6Q pinout, STM32U535RET6Q application, or STM32U535RET6Q equivalent, key selection criteria include TrustZone-enabled secure boot, LPBAM autonomous peripheral operation in Stop 2, 14-bit 2.5-Msps ADC with hardware oversampling, CAN FD interface, and dual 12-bit DACs with low-power sample-and-hold - all validated for industrial sensing, wearable medical devices, and secure asset trackers.
Technical Context
The STM32U535RET6Q implements a dual-bank flash architecture supporting read-while-write and 100 kcycle endurance, paired with ART Accelerator (8-KB instruction cache + 4-KB data cache) enabling zero-wait-state execution at up to 160 MHz. Its power architecture integrates an SMPS step-down converter with on-the-fly voltage scaling and embedded LDO, allowing dynamic transition between Run (16.3 μA/MHz @ 3.3 V) and sub-µA low-power modes.
TrustZone security is implemented at silicon level with GTZC controller, securable I/Os, memory regions, and peripherals; boot flow enforces root-of-trust via unique entry point and HDP-protected secure hide area. Peripheral interconnect matrix supports concurrent DMA transfers across GPDMA and LPDMA controllers, both functional in Stop mode.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M33 with TrustZone, FPU, MPU, DSP extensions - enables secure real-time control with cryptographic acceleration and memory isolation. |
| Max Clock / Performance | 160 MHz / 240 DMIPS - achieves deterministic real-time response in motor control and audio processing with ART cache. |
| Flash Memory | 512 KB with ECC, 2-bank RWW - supports safe firmware updates and robust code integrity in field-deployed devices. |
| SRAM | 274 KB total, including 64 KB with ECC - provides fault-tolerant data buffering for safety-critical logging and sensor fusion. |
| Low-Power Modes | 90 nA Shutdown, 370 nA Standby w/RTC, 3.0 µA Stop 2 w/16-KB SRAM - extends battery life in multi-year sensor deployments. |
| Analog Peripherals | 14-bit 2.5-Msps ADC (oversampling), dual 12-bit DACs, OPAMP+PGA, ultra-low-power comparator - enables high-fidelity signal acquisition without external signal chain. |
| Communication Interfaces | 1× CAN FD, 5× USART/LPUART, 4× I²C FM+, 3× SPI, 1× USB FS, 1× SAI, 1× SDMMC - supports mixed wired/wireless gateway architectures with legacy and modern protocols. |
Pinout & Package
LQFP64 (10 × 10 mm, 0.5 mm pitch) package with 64 pins, RoHS-compliant and ECOPACK2 certified. Pin mapping validated per STMicroelectronics DS14217 Rev 5, Section 4.2.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VDDA, VDDIO2 | Main, analog, and I/O supply rails | Independent 1.71–3.6 V domains enable mixed-signal precision and 5V-tolerant GPIO operation down to 1.08 V for low-voltage subsystems. |
| VSS, VSSA | Digital and analog ground references | Separate analog/digital ground planes minimize noise coupling into ADC/DAC paths and improve SNR >70 dB. |
| PA0–PA15, PB0–PB15, PC0–PC15, PD0–PD15, PE0–PE7 | General-purpose I/Os | Up to 82 fast I/Os with interrupt capability; 14 support independent VDDIO2 supply for interfacing with diverse logic families. |
| NRST | Active-low reset input | Asynchronous reset with internal pull-up; compatible with external supervisor ICs and supports tamper-triggered secure reset. |
| BOOT0 | Boot mode selection | Configures boot source (system memory, flash, or SRAM); critical for secure OTA update fallback and debug lockdown. |
| PA13/PA14/PA15 | SWD debug interface | Serial Wire Debug (SWD) pins - minimal 2-pin debug footprint with trace support via ETM for runtime analysis in constrained systems. |
Key Features
| Feature | Design Value |
|---|---|
| LPBAM Autonomous Mode | Peripherals (ADC, timers, UART) operate without CPU intervention in Stop 2 mode - reduces system wake-ups and extends battery life by >40% in periodic sensing. |
| FlexPowerControl Architecture | Integrated SMPS + LDO with dynamic voltage scaling - cuts active-mode power by 30% vs. LDO-only solutions while maintaining stability during load transients. |
| Secure Root-of-Trust | HDP-protected boot entry + unique 96-bit ID + 512-byte OTP - prevents cloning and ensures cryptographically verifiable firmware origin in production. |
| CORDIC + FMAC Co-processors | Hardware-accelerated trigonometric and filter math - offloads 95% of FFT and PID computation cycles from CPU, freeing bandwidth for application logic. |
| 14-bit ADC with Oversampling | 2.5-Msps sampling + configurable digital filtering - achieves effective resolution up to 16 bits at 10 kSPS, eliminating need for external sigma-delta converters. |
Applications
| Industrial Sensor Node | Wearable Medical Monitor |
|---|---|
Use Scenario: Battery-powered vibration/temperature node in predictive maintenance systems with wireless telemetry. IC Role / Device Role / Timing Role: Main MCU executing sensor fusion, secure BLE gateway stack, and LPBAM-driven ADC sampling every 500 ms. Use Value: 3.0 µA Stop 2 mode with 16-KB SRAM retains context and calibration data between samples; CAN FD enables local bus diagnostics. | Use Scenario: ECG/PPG patch with continuous biopotential monitoring and onboard artifact rejection. IC Role / Device Role / Timing Role: Signal acquisition controller using dual ADCs, OPAMP+PGA front-end, and CORDIC-based QRS detection. Use Value: 14-bit ADC oversampling + FMAC filter acceleration achieve clinical-grade SNR without external DSP; VBAT mode sustains RTC and backup registers during battery swap. |
| Secure Asset Tracker | Smart Building Controller |
Use Scenario: GPS/GNSS tracker with tamper detection, encrypted location reporting, and geofence alerts. IC Role / Device Role / Timing Role: Secure host managing GNSS module, cellular modem, and active tamper inputs via TAMP peripheral. Use Value: TrustZone isolates secure boot, TLS stack (via TF-M), and private keys; 90 nA Shutdown mode enables >5-year shelf life before activation. | Use Scenario: HVAC zone controller with environmental sensing, actuator PWM, and BACnet/IP over RS-485. IC Role / Device Role / Timing Role: Real-time coordinator using advanced timers (TIM1/TIM8), multiple UARTs, and 12-bit DACs for analog setpoint outputs. Use Value: 2.2 µA Stop 3 mode with full SRAM preserves PID state during power brownouts; 5V-tolerant I/Os interface directly with legacy building automation hardware. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ultra-low-power secure MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32U575RIT6Q | Higher flash (2 MB), larger SRAM (1 MB), added Octo-SPI and crypto accelerators; same LQFP64 package. | Targets complex edge AI inference and dual-band wireless coexistence (Wi-Fi + BLE). | Select when >512 KB flash or hardware AES-GCM/SHA-256 acceleration is required; otherwise STM32U535RET6Q offers optimal cost/power balance. |
| RA4M3GDB001F#AC0 | Arm Cortex-M33, 1 MB flash, no TrustZone-enforced memory partitioning; lacks LPBAM and SMPS integration. | Suitable for non-security-critical industrial HMI where USB host and graphics are prioritized. | Choose only if USB HS host, 2D graphics accelerator, or specific Renesas ecosystem tools are mandatory; lacks verified secure boot and sub-µA low-power modes. |
Compared with STM32U575RIT6Q, the STM32U535RET6Q trades flash capacity and crypto throughput for lower static current (370 nA vs. 550 nA Standby w/RTC) and smaller die size - making it preferable for space-constrained, long-life battery applications where security and power dominate over compute headroom.
Availability
STM32U535RET6Q is available at Aetrix Electronics and suitable for industrial sensor nodes, wearable medical monitors, secure asset trackers, and smart building controllers requiring stable component supply across extended product lifecycles.
Supply support for STM32U535RET6Q includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and automotive semiconductors since 1987.
The STM32U5 series targets ultra-low-power, secure edge computing - engineered for battery-operated IoT endpoints demanding certified security (PSA Level 3), sub-µA sleep currents, and rich analog integration without external support components.
FAQ
What is the maximum operating temperature for STM32U535RET6Q?
The STM32U535RET6Q is rated for operation from –40 °C to +85 °C ambient temperature, with full specification compliance across this range. Its thermal design supports sustained 160 MHz operation under worst-case conditions when using the SMPS regulator and proper PCB copper pour.
Does STM32U535RET6Q support hardware-based secure boot?
Yes - it implements a TrustZone-enforced secure boot flow with immutable root-of-trust: unique boot entry point, secure hide protection area (HDP), RDP-level protection, and password-locked debug access. Boot authentication is performed in ROM before any user code executes.
Can the internal SMPS be used without external components?
No - the integrated SMPS requires external components: one inductor (typically 2.2 µH), two ceramic capacitors (input/output), and one feedback resistor divider. ST provides validated reference designs (e.g., AN5552) with BOM and layout guidelines for stable 1.1 V core regulation.
How many wake-up pins are available in Shutdown mode?
The STM32U535RET6Q supports 23 dedicated wake-up pins in Shutdown mode, each capable of generating an interrupt or reset event. These include all GPIOs configured as EXTI lines, plus dedicated VBAT and tamper inputs - enabling flexible low-power event detection without external circuitry.
STM32U535RET6Q Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 64-LQFP
- Series:
- STM32U5
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-M33
- Core Size:
- 32-Bit
- Speed:
- 160MHz
- Connectivity:
- CANbus, I2C, IrDA, LINbus, SAI, SmartCard, SPDIF, SPI, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
- Number of I/O:
- 47
- Program Memory Size:
- 512KB (512K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 274K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 3.6V
- Data Converters:
- A/D 15x12/14b SAR; D/A 2x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32U535RET6Q FAQ
1.How can I place an order for STM32U535RET6Q through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32U535RET6Q on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32U535RET6Q reliable?
The price and inventory of STM32U535RET6Q are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32U535RET6Q is usually 5 days.
3.What payment methods are accepted for STM32U535RET6Q?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32U535RET6Q transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32U535RET6Q?
STM32U535RET6Q orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32U535RET6Q order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32U535RET6Q?
For technical support, including STM32U535RET6Q datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32U535RET6Q requirements.
6.How does Aetrix verify that STM32U535RET6Q is sourced from the original manufacturer or authorized distributors?
All STM32U535RET6Q products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32U535RET6Q meets industry standards.
7.What is the process for return or replacement of STM32U535RET6Q?
All STM32U535RET6Q units undergo pre-shipment inspection (PSI). If there is an issue with STM32U535RET6Q, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32U535RET6Q part is unused and in its original packaging.
Return procedure for STM32U535RET6Q:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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