STMicroelectronics STM32U535VEI6
- Part No.:
- STM32U535VEI6
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 100-UFBGA
- Datasheet:
-
STM32U535VEI6.pdf
- Description:
- IC MCU 32BIT 512KB FLSH 100UFBGA
- Quantity:
- Payment:

- Shipping:

Inventory:4,879
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Product details
Overview
STM32U535VEI6 from STMicroelectronics is an ultra-low-power Arm® Cortex®-M33 microcontroller with TrustZone® security, 512 KB flash, 274 KB SRAM, and FPU-designed for secure, battery-operated edge nodes in industrial sensing and smart metering. It delivers 240 DMIPS at up to 160 MHz, supports LPBAM autonomous peripheral operation down to Stop 2 mode, and integrates hardware accelerators including CORDIC and FMAC.
For engineers reviewing the STM32U535VEI6 datasheet, STM32U535VEI6 pinout, STM32U535VEI6 application, or STM32U535VEI6 equivalent, key selection criteria include its 90 nA Shutdown current, dual 14-/12-bit ADCs with Stop 2 autonomy, TrustZone-enabled secure boot and firmware upgrade, and CAN FD + USB FS + Octo-SPI interface concurrency.
Technical Context
The STM32U535VEI6 implements a dual-bank ECC-protected flash architecture enabling read-while-write operations and secure firmware updates via TF-M. Its power architecture combines embedded LDO and SMPS with dynamic voltage scaling and on-the-fly switching to optimize energy per task across Run, Stop 2/3, and Standby modes.
TrustZone® enforces hardware-isolated secure/non-secure worlds with configurable SAU regions, securable I/Os, and root-of-trust features including unique boot entry, HDP, and SFI. The ART Accelerator includes 8-KB instruction cache and 4-KB data cache for zero-wait-state execution from flash and external memories.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M33 with TrustZone, FPU, MPU, DSP extensions - enables secure real-time control with cryptographic acceleration and memory isolation. |
| Max Clock / Performance | 160 MHz / 240 DMIPS - supports high-throughput sensor fusion and protocol stacks without compromising low-power operation. |
| Memory | 512 KB flash (ECC, 2 banks, 100 kcycles), 274 KB SRAM (up to 64 KB with ECC) - ensures robust code storage and runtime resilience in harsh environments. |
| Low-Power Modes | 90 nA Shutdown, 370 nA Standby+RTC, 1.4 µA Stop 3 (16 KB SRAM) - extends battery life in maintenance-free IoT endpoints for >10 years. |
| Analog Peripherals | 14-bit 2.5-Msps ADC (hardware oversampling), 12-bit ADC autonomous in Stop 2, 2× DAC, OPAMP+PGA, COMP - enables high-fidelity signal acquisition with minimal wake-up overhead. |
| Security Features | TrustZone, RDP, HDP, SFI, HASH, TRNG (NIST SP800-90B), 96-bit UID, 512-byte OTP - meets PSA Level 3 and SESIP certification requirements for secure device identity and firmware integrity. |
| Communication Interfaces | CAN FD, USB FS (host/device), 5× USART/LPUART, 4× I²C FM+, 3× SPI, SAI, SDMMC, Octo-SPI - supports mixed wired/wireless edge gateway architectures with deterministic timing. |
Pinout & Package
LQFP100 (14 × 14 mm, 0.5 mm pitch) package with 82 fast I/Os - 5V-tolerant on most pins, 14 I/Os support independent supply down to 1.08 V for mixed-voltage system interfacing.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VSS | Main power supply and ground | Supports 1.71–3.6 V operation; decoupling required per datasheet layout guidelines for noise immunity in mixed-signal operation. |
| VDDA, VSSA | Analog domain power and ground | Independent analog supply improves ADC/DAC accuracy and reduces coupling noise from digital switching. |
| PA0–PA15, PB0–PB15, etc. | General-purpose I/Os | Up to 82 pins with interrupt capability; most 5V-tolerant - simplifies level-shifting in legacy industrial interfaces. |
| PC13–PC15 | RTC oscillator inputs | Connects to 32.768 kHz crystal for calendar RTC with hardware calibration - enables precise timekeeping in battery-backed applications. |
| PD0–PD1 | USART2 TX/RX | Dedicated low-power UART for sensor telemetry during Stop modes - maintains communication without full core wake-up. |
| PF0–PF1 | OSC_IN/OSC_OUT | 4–50 MHz crystal input for main system clock - enables high-accuracy timing for USB, CAN FD, and audio synchronization. |
Key Features
| Feature | Design Value |
|---|---|
| LPBAM (Low-Power Background-Autonomous Mode) | Enables DMA-driven peripheral chains (e.g., ADC→DMA→memory→COMP trigger) without CPU involvement - reduces active time by >90% in sensor logging. |
| FlexPowerControl with SMPS+LDO | Switches between SMPS (high efficiency) and LDO (low noise) on-the-fly - optimizes power delivery for analog precision vs. digital throughput phases. |
| CORDIC + FMAC co-processors | Accelerates trigonometric and filter computations in hardware - cuts firmware latency for motor control and FFT-based vibration analysis by 5×. |
| Secure Firmware Installation (SFI) | Uses embedded Root-Secure Services (RSS) to validate and install signed firmware images - eliminates need for external secure element in OTA update pipelines. |
| VBAT domain with RTC + 2 KB backup SRAM | Maintains real-time clock and critical state during main power loss - enables tamper detection and graceful recovery in smart utility meters. |
Applications
| Smart Utility Metering | Industrial Predictive Maintenance Sensor |
|---|---|
Use Scenario: Battery-powered gas/water meter with hourly pressure/temperature sampling, encrypted data upload via NB-IoT. IC Role / Device Role / Timing Role: Main controller executing secure metering firmware, managing LPBAM-triggered ADC sampling, and handling TLS handshake via SecureMark™-TLS acceleration. Use Value: 90 nA Shutdown current enables >15-year battery life; TrustZone isolates metering algorithms from connectivity stack to prevent firmware tampering. | Use Scenario: Vibration and temperature node mounted on rotating machinery, performing edge FFT and anomaly detection before wireless transmission. IC Role / Device Role / Timing Role: Real-time signal processor using CORDIC/FMAC for fast spectral analysis, with autonomous ADC→DMA→FMAC chain running in Stop 2 mode. Use Value: 12-bit ADC operational in Stop 2 mode allows continuous monitoring at <2 µA total system current; CAN FD enables local diagnostics bus integration. |
| Secure Wearable Health Monitor | Low-Power Edge Gateway |
Use Scenario: ECG/PPG patch collecting biometric data, storing locally, and transmitting only upon detected arrhythmia event. IC Role / Device Role / Timing Role: Trusted execution environment host for medical algorithm validation, with secure enclave for PPG signal processing and encrypted flash storage. Use Value: 64 KB SRAM with ECC prevents data corruption during RF bursts; TRNG and HASH enable HIPAA-compliant session key generation. | Use Scenario: Field-deployed gateway aggregating Modbus RTU, BLE, and LoRaWAN sensors into unified MQTT stream for cloud ingestion. IC Role / Device Role / Timing Role: Protocol translation hub with concurrent USB FS (for configuration), CAN FD (fieldbus), and Octo-SPI (external QSPI flash for OTA image storage). Use Value: Dual-bank flash enables atomic firmware updates without service interruption; 82 I/Os support mixed-voltage sensor interfacing (1.8 V/3.3 V/5 V). |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ultra-low-power secure MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32U575ZIT6 | Higher flash (2 MB), larger package (LQFP144), adds Ethernet MAC and crypto accelerator (AES-GCM) | Targeted at gateway-class devices requiring network stack offload and higher code density | Select when needing >1 MB flash or hardware-accelerated TLS beyond SecureMark™-TLS baseline |
| RA4M3GDB000FJ#AC0 | Arm Cortex-M4F, 1 MB flash, 384 KB SRAM, no TrustZone, Renesas Secure Crypto Engine | Focused on industrial HMI and motor control with integrated graphics support | Select when prioritizing GUI rendering or specific Renesas ecosystem tools over PSA-certified TrustZone isolation |
Compared with STM32U575ZIT6, the STM32U535VEI6 offers lower system cost and smaller footprint for endpoint sensing, while RA4M3GDB000FJ#AC0 trades hardware-enforced security for richer peripheral integration in non-certification-critical applications.
Availability
STM32U535VEI6 is available at Aetrix Electronics and suitable for smart metering, predictive maintenance sensors, wearable health monitors, and low-power edge gateways requiring stable component supply across multi-year production cycles.
Supply support for STM32U535VEI6 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, specializing in microcontrollers, power management, and automotive ICs with strong focus on energy efficiency and functional safety.
The STM32U5 series is ST's flagship ultra-low-power secure MCU line, designed specifically for battery-operated IoT endpoints requiring PSA Level 3 certification, long-term firmware maintainability, and deterministic real-time performance under strict energy budgets.
FAQ
What is the maximum operating temperature range for STM32U535VEI6?
The STM32U535VEI6 is rated for –40 °C to +125 °C operation, validated per JEDEC JESD47 stress testing. This extended range supports deployment in automotive under-hood modules, industrial motor drives, and outdoor utility infrastructure where ambient temperatures exceed standard commercial limits.
Does STM32U535VEI6 support hardware-accelerated TLS?
Yes - it achieves 137,000 SecureMark™-TLS score via dedicated cryptographic peripherals including HASH, TRNG, and memory protection units. This enables full TLS 1.2/1.3 handshake offload in firmware using TF-M, reducing CPU load and memory footprint versus software-only implementations.
How many wake-up pins are available in Shutdown mode?
The STM32U535VEI6 provides 23 dedicated wake-up pins in Shutdown mode, each configurable as edge- or level-sensitive triggers. These pins retain state and detect events while consuming only 90 nA, making them ideal for door/window sensors or emergency interrupt sources in always-on systems.
Is the 512 KB flash memory organized in dual banks with read-while-write capability?
Yes - the flash is split into two independently erasable banks, allowing one bank to be read while the other is being programmed or erased. This enables seamless firmware updates and real-time data logging without halting application execution, critical for fail-safe industrial controllers.
STM32U535VEI6 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 100-UFBGA
- Series:
- STM32U5
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-M33
- Core Size:
- 32-Bit
- Speed:
- 160MHz
- Connectivity:
- CANbus, I2C, IrDA, LINbus, SAI, SmartCard, SPDIF, SPI, UART/USART, USB
- Peripherals:
- Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
- Number of I/O:
- 82
- Program Memory Size:
- 512KB (512K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 274K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 3.6V
- Data Converters:
- A/D 20x12/14b SAR; D/A 2x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32U535VEI6 FAQ
1.How can I place an order for STM32U535VEI6 through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32U535VEI6 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32U535VEI6 reliable?
The price and inventory of STM32U535VEI6 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32U535VEI6 is usually 5 days.
3.What payment methods are accepted for STM32U535VEI6?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32U535VEI6 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32U535VEI6?
STM32U535VEI6 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32U535VEI6 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32U535VEI6?
For technical support, including STM32U535VEI6 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32U535VEI6 requirements.
6.How does Aetrix verify that STM32U535VEI6 is sourced from the original manufacturer or authorized distributors?
All STM32U535VEI6 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32U535VEI6 meets industry standards.
7.What is the process for return or replacement of STM32U535VEI6?
All STM32U535VEI6 units undergo pre-shipment inspection (PSI). If there is an issue with STM32U535VEI6, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32U535VEI6 part is unused and in its original packaging.
Return procedure for STM32U535VEI6:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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