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STMicroelectronics STM32U545VEI6
- Part No.:
- STM32U545VEI6
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 100-UFBGA
- Datasheet:
-
STM32U545VEI6.pdf
- Description:
- IC MCU 32BIT 512KB FLSH 100UFBGA
- Quantity:
- Payment:
- Shipping:
Inventory:4,802
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Product details
Overview
STM32U545VEI6 from STMicroelectronics is an ultra-low-power Arm® Cortex®-M33 microcontroller with TrustZone® security, 512 KB flash, 274 KB SRAM, and hardware crypto accelerators including dual AES engines and PKA. It delivers 240 DMIPS at up to 160 MHz, supports LPBAM autonomous peripheral operation down to Stop 2 mode, and targets secure, battery-constrained IoT edge nodes requiring long runtime and firmware integrity.
For engineers reviewing the STM32U545VEI6 datasheet, STM32U545VEI6 pinout, STM32U545VEI6 application, or STM32U545VEI6 equivalent, key selection criteria include its 90 nA Shutdown current, PSA Level 3/SESIP3 certification, 14-bit 2.5-Msps ADC with Stop 2 autonomy, Octo-SPI on-the-fly decryption, and TrustZone-enforced secure boot with HUK-based key binding.
Technical Context
The STM32U545VEI6 integrates an Arm Cortex-M33 core with TrustZone-enabled memory isolation, MPU, FPU, and DSP extensions, coupled with ART Accelerator (8 KB I-cache + 4 KB D-cache) enabling zero-wait-state execution at 160 MHz. Its power architecture combines embedded LDO and SMPS with dynamic voltage scaling and switch-on-the-fly regulation.
Security is implemented via hardware root of trust: unique boot entry, secure hide protection area (HDP), embedded root-secure services (RSS) for SFI, and tamper-aware RTC/backup domain. Cryptographic acceleration includes DPA-resistant AES coprocessors, PKA, HASH, OTFDEC for external Octo-SPI memory, and NIST SP800-90B-compliant TRNG.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M33 with TrustZone, FPU, MPU, DSP - enables secure, deterministic real-time control with hardware-isolated secure/non-secure worlds. |
| Max Clock / Performance | 160 MHz / 240 DMIPS - supports high-throughput sensor fusion and protocol stacks without compromising ultra-low-power operation. |
| Memory | 512 KB flash (ECC, RWW, 100 kcycles) + 274 KB SRAM (up to 64 KB with ECC) - ensures robust firmware storage and data retention in safety-critical logging. |
| Low-Power Modes | 90 nA Shutdown, 370 nA Standby+RTC, 1.4 µA Stop 3 (16 KB SRAM) - extends coin-cell or energy-harvesting device lifetime to years. |
| Crypto Acceleration | Dual AES (one DPA-resistant), PKA, HASH, OTFDEC, TRNG - offloads TLS handshake, secure OTA, and encrypted firmware updates from CPU. |
| Analog Peripherals | 14-bit 2.5-Msps ADC (autonomous in Stop 2), dual 12-bit DAC, OPAMP with PGA, ultra-low-power comparator - enables precision sensor interface with minimal wake-up overhead. |
| Connectivity | CAN FD, USB FS host/device, 5x USART/LPUART, 4x I²C FM+, 3x SPI, SAI, SDMMC, Octo-SPI - supports industrial fieldbus, audio streaming, and high-speed external memory expansion. |
Pinout & Package
LQFP100 (14 × 14 mm, 0.5 mm pitch) package with 82 fast I/Os - 5V-tolerant on most pins, 14 I/Os support independent supply down to 1.08 V for mixed-voltage system interfacing.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VDDA, VDDIO2 | Power supply inputs | Separate domains for digital core (1.71–3.6 V), analog (1.62–3.6 V), and I/O (1.08–3.6 V) enable precise noise isolation and flexible voltage rail design. |
| NRST | Active-low reset input | Asynchronous reset with internal pull-up; supports external reset supervision and brown-out detection coordination. |
| BOOT0 | Boot mode selection | Configures boot source (system memory, flash, or SRAM); critical for secure firmware recovery and DFU implementation. |
| PA13/PA14 | SWD debug interface | Serial-wire debug (SWD) pins - enable non-intrusive debugging and programming without JTAG footprint overhead. |
| PC14/PC15 | 32.768 kHz crystal oscillator inputs | Drive low-power RTC with ±20 ppm accuracy; supports calendar, alarm, and tamper timestamping in VBAT mode. |
| PF0–PF15 | General-purpose I/O bank | Up to 14 pins support independent VDDIO2 supply - allows direct interface to 1.8 V sensors or logic without level shifters. |
Key Features
| Feature | Design Value |
|---|---|
| LPBAM (Low-Power Background-Autonomous Mode) | Enables DMA-driven peripheral chains (ADC→DMA→memory→timer) without CPU wake-up - reduces active time by >90% in sensor polling loops. |
| TrustZone + GTZC | Hardware-enforced partitioning of memory, peripherals, and I/Os into secure/non-secure worlds - prevents unauthorized access to cryptographic keys and secure firmware. |
| Octo-SPI OTFDEC | Real-time decryption of external flash/XIP memory using AES-128/256 - enables secure code execution from external memory without exposing plaintext. |
| VBAT Domain | RTC, 32×32-bit backup registers, and 2 KB backup SRAM retain state during main power loss - supports tamper event logging and graceful shutdown recovery. |
| CORDIC + FMAC | Hardware trigonometric (sin/cos/tan) and filter math acceleration - cuts motor control loop latency by 4× vs. software implementation, enabling 20 kHz PWM update rates. |
Applications
| Smart Utility Meter | Secure Industrial Sensor Node |
|---|---|
Use Scenario: Battery-powered water/gas meter with ultrasonic flow sensing, RF mesh backhaul, and 10-year lifespan requirement. IC Role / Device Role: Main controller executing metrology algorithms, managing secure OTA updates, and maintaining tamper-proof usage logs. Use Value: 90 nA Shutdown current and LPBAM-driven ADC+DMA sampling extend battery life; TrustZone isolates metrology firmware from communication stack. |
Use Scenario: Wireless vibration/temperature node in hazardous factory environment with SIL-2 functional safety requirements. IC Role / Device Role: Real-time sensor fusion hub with secure boot, encrypted telemetry, and fail-safe watchdog supervision. Use Value: PSA Level 3 certification validates secure boot chain; 14-bit ADC + CORDIC enables sub-0.1% RMS error in FFT-based bearing fault detection. |
| Medical Wearable Patch | Edge AI Inference Endpoint |
Use Scenario: ECG/PPG patch with continuous biosignal acquisition, local arrhythmia detection, and Bluetooth LE transmission. IC Role / Device Role: Low-noise analog front-end controller with autonomous ADC oversampling, FIR filtering, and secure health data storage. Use Value: 12-bit ADC autonomous in Stop 2 mode captures heartbeat intervals at 1 µA avg current; HUK-encrypted SRAM protects PHI before BLE transmission. |
Use Scenario: TinyML endpoint performing keyword spotting on microphone input using quantized neural network models stored in external Octo-SPI flash. IC Role / Device Role: Secure inference accelerator with OTFDEC-decrypted model weights and FMAC-accelerated convolution layers. Use Value: On-the-fly decryption eliminates flash read latency penalty; FMAC reduces inference latency by 3.2× vs. Cortex-M33 baseline - enabling 20-ms response time. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ultra-low-power secure MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32U575ZIT6 | 1 MB flash, 512 KB SRAM, dual-core (Cortex-M33 + Cortex-M0+), no Octo-SPI OTFDEC | Targeted at higher-firmware-complexity applications needing dual-core task separation but lacking external encrypted memory needs | Select when firmware size exceeds 512 KB or asymmetric processing (e.g., M33 for app, M0+ for comms) is required; avoid if OTFDEC is mandatory. |
| NXP LPC55S69JBD100 | ARM Cortex-M33, 640 KB flash, 320 KB SRAM, no TrustZone-certified boot ROM, single AES engine | Suitable for cost-sensitive industrial controls where PSA Level 3 certification is not mandated | Choose for lower BOM cost where SESIP3/PSA Level 3 validation is not contractually required; verify external crypto library support for missing accelerators. |
Compared with STM32U545VEI6, the STM32U575ZIT6 offers greater memory headroom and dual-core flexibility but sacrifices Octo-SPI on-the-fly decryption; the LPC55S69JBD100 provides competitive performance and lower unit cost but lacks PSA Level 3 certification and hardware root-of-trust assurance required for regulated medical or utility deployments.
Availability
STM32U545VEI6 is available at Aetrix Electronics and suitable for smart utility meters, secure industrial sensor nodes, medical wearables, and edge AI endpoints requiring stable component supply across multi-year production cycles.
Supply support for STM32U545VEI6 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in microcontrollers, power management, sensors, and automotive ICs with over 40 years of embedded systems expertise.
The STM32U5 series is ST's flagship ultra-low-power secure MCU line, designed specifically for battery-operated and energy-harvesting IoT endpoints demanding PSA Level 3 certification, sub-µA sleep currents, and hardware-accelerated cryptography.
FAQ
What is the maximum operating temperature range for STM32U545VEI6?
The STM32U545VEI6 is qualified for industrial operation from –40 °C to +125 °C ambient temperature. This extended range is validated per JEDEC JESD47 and supports deployment in harsh environments such as smart meters mounted on outdoor transformers or industrial motor drives with high thermal dissipation.
Does STM32U545VEI6 support USB device and host modes simultaneously?
No - the integrated USB full-speed controller supports either device or host mode, selected at runtime via the USB_OTG_FS_GUSBCFG register. Dual-role operation requires external USB switch logic and careful power management coordination, as the PHY does not support concurrent enumeration.
How is TrustZone security enforced on STM32U545VEI6?
TrustZone is implemented via hardware-enforced memory and peripheral partitioning controlled by the Global TrustZone Controller (GTZC). Secure/non-secure attribution is defined at boot via option bytes and enforced by AXI bus monitors - no software can override secure memory accesses or peripheral configuration in non-secure world.
Can the 14-bit ADC operate autonomously in Stop 2 mode?
Yes - ADC1 supports full autonomous conversion, DMA transfer, and result processing in Stop 2 mode using LPDMA and low-power timers. This enables periodic sensor sampling (e.g., temperature every 30 s) while consuming only 4.6 µA total system current, with no CPU intervention required.
STM32U545VEI6 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 100-UFBGA
- Series:
- STM32U5
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-M33
- Core Size:
- 32-Bit
- Speed:
- 160MHz
- Connectivity:
- CANbus, I2C, IrDA, LINbus, MMC/SD/SDIO, SAI, SmartCard, SPDIF, SPI, UART/USART, USB, USB OTG
- Peripherals:
- Brown-out Detect/Reset, DMA, LCD, Motor Control PWM, POR, PWM, WDT
- Number of I/O:
- 82
- Program Memory Size:
- 512KB (512K x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 274K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 3.6V
- Data Converters:
- A/D 20x12/14b SAR; D/A 2x12b
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32U545VEI6 FAQ
1.How can I place an order for STM32U545VEI6 through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32U545VEI6 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32U545VEI6 reliable?
The price and inventory of STM32U545VEI6 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32U545VEI6 is usually 5 days.
3.What payment methods are accepted for STM32U545VEI6?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32U545VEI6 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32U545VEI6?
STM32U545VEI6 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32U545VEI6 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32U545VEI6?
For technical support, including STM32U545VEI6 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32U545VEI6 requirements.
6.How does Aetrix verify that STM32U545VEI6 is sourced from the original manufacturer or authorized distributors?
All STM32U545VEI6 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32U545VEI6 meets industry standards.
7.What is the process for return or replacement of STM32U545VEI6?
All STM32U545VEI6 units undergo pre-shipment inspection (PSI). If there is an issue with STM32U545VEI6, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32U545VEI6 part is unused and in its original packaging.
Return procedure for STM32U545VEI6:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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