STMicroelectronics STM32U575OIY3QTR

Overview

STM32U575OIY3QTR from STMicroelectronics is an ultra-low-power Arm® Cortex®-M33 32-bit microcontroller with TrustZone® security, FPU, and 240 DMIPS performance. It integrates 2 MB Flash (ECC-enabled), 786 KB SRAM, and supports LPBAM autonomous peripheral operation down to Stop 2 mode. Designed for battery-powered industrial sensors and secure edge nodes, it delivers 4.3 µA Stop 3 mode with full SRAM retention and 19.5 µA/MHz Run mode at 3.3 V.

For engineers reviewing the STM32U575OIY3QTR datasheet, STM32U575OIY3QTR pinout, STM32U575OIY3QTR application, or STM32U575OIY3QTR equivalent, key selection considerations include TrustZone-enforced memory partitioning, dual 14-/12-bit ADCs with hardware oversampling, CAN FD + USB Type-C®/PD controller integration, and verified 160 MHz operation with ART Accelerator and 8-KB instruction cache.

Technical Context

The STM32U575OIY3QTR implements a dual-bank Flash architecture enabling read-while-write operations and 100 kcycle endurance for critical firmware sections. Its FlexPowerControl system combines embedded LDO and SMPS step-down converter with dynamic voltage scaling and on-the-fly switching to optimize power across operating modes.

TrustZone® is implemented at silicon level with Global TrustZone Controller (GTZC) managing secure/non-secure memory regions, securable peripherals (including I/Os, DMA, timers), and root-of-trust boot via unique entry point and HDP protection. The CORDIC and FMAC coprocessors accelerate trigonometric and filter computations without CPU intervention.

Key Specifications

Pinout & Package

STM32U575OIY3QTR uses a UFQFPN48 (7 × 7 mm) package with 48 terminals, optimized for space-constrained portable and industrial IoT designs. Pin functions are validated per STMicroelectronics DS13737 Rev 10, Section 4.2.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar ultra-low-power secure MCU applications.

Compared with STM32L562VEJ6 and LPC55S69JBD100, the STM32U575OIY3QTR uniquely combines 2 MB Flash, UCPD + CAN FD, and sub-µA shutdown - making it optimal for long-life, multi-protocol, field-upgradable industrial endpoints where security and power efficiency are co-primary constraints.

Availability

STM32U575OIY3QTR is available at Aetrix Electronics and suitable for smart utility meters, predictive maintenance sensors, secure wearables, and USB-C-powered edge gateways requiring stable component supply across extended product lifecycles.

Supply support for STM32U575OIY3QTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, delivering intelligent power, sensing, and control solutions for industrial, automotive, and consumer markets.

The STM32U5 series is ST's flagship ultra-low-power secure MCU line, designed specifically for battery-operated, certifiable edge devices demanding PSA Level 3 security, ULPMark™-CP >400, and seamless integration of analog, digital, and connectivity peripherals.

FAQ

What is the maximum operating frequency and how is it achieved?

The STM32U575OIY3QTR achieves 160 MHz maximum CPU frequency using its ART Accelerator with 8-KB instruction cache, enabling zero-wait-state execution from Flash. This is validated across the full –40 °C to +125 °C temperature range with supply voltage 1.71–3.6 V, and requires proper configuration of the PLL and voltage scaling (VOS1). No external oscillator beyond the 4–50 MHz crystal is needed to reach this speed.

Does this MCU support secure boot and runtime attestation?

Yes. The device implements a hardware-rooted secure boot chain starting from immutable ROM code, validating signed firmware images against public keys stored in OTP. Runtime attestation is supported via TrustZone-isolated measurement agents and HASH-accelerated integrity checks of critical memory regions, aligned with PSA Certified Level 3 requirements.

What are the key differences between Stop 2 and Stop 3 low-power modes?

Stop 2 retains full SRAM content and enables autonomous peripheral operation (e.g., ADC conversion, DMA transfer) while disabling the CPU and most clocks. Stop 3 further disables the voltage regulator, reducing current to 1.9 µA (16 KB SRAM) or 4.3 µA (full SRAM), but limits peripheral activity to only RTC, LSE, and wakeup logic. Both modes support 24 wakeup pins and retain TrustZone state.

Can the UCPD peripheral be used for both USB-C power negotiation and data role swapping?

Yes. The integrated UCPD controller supports full USB Type-C 2.0 and USB Power Delivery 3.0 specification compliance, including Source/Sink role negotiation, VCONN switching, and Alternate Mode discovery. It handles BMC encoding/decoding in hardware and interfaces directly with the system DMA, enabling concurrent power contract management and data tunneling without CPU involvement.