STMicroelectronics STM32U575QGI6Q
- Part No.:
- STM32U575QGI6Q
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 132-UFBGA
- Datasheet:
-
STM32U575QGI6Q.pdf
- Description:
- IC MCU 32BIT 1MB FLASH 132UFBGA
- Quantity:
- Payment:

- Shipping:

Inventory:4,905
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Product details
Overview
STM32U575QGI6Q from STMicroelectronics is an ultra-low-power Arm® Cortex®-M33 32-bit microcontroller with TrustZone® security, FPU, and 240 DMIPS performance. It integrates 2 MB Flash (with ECC), 786 KB SRAM, dual 14-/12-bit ADCs, 2 DACs, 2 op-amps, CAN FD, USB Type-C®/PD controller, and Octo-SPI - deployed in battery-powered industrial sensors and secure edge nodes.
For engineers reviewing the STM32U575QGI6Q datasheet, STM32U575QGI6Q pinout, STM32U575QGI6Q application, or STM32U575QGI6Q equivalent, key selection considerations include TrustZone-enabled secure boot, LPBAM autonomous peripheral operation down to Stop 2 mode, 160 nA Shutdown current, 19.5 µA/MHz Run-mode efficiency, and UFBGA132 (7 × 7 mm) package compatibility with high-density PCB layouts.
Technical Context
The device implements a dual-bank Flash architecture supporting read-while-write and 100 kcycle endurance on 512 KB, with ECC protection for both Flash and SRAM (up to 322 KB). Its power system combines embedded LDO and SMPS step-down converter, enabling dynamic voltage scaling and on-the-fly switching between regulators to optimize active and low-power modes.
TrustZone® partitions memory, peripherals, and I/Os into secure/non-secure worlds, enforced by GTZC and RDP-based life-cycle control; secure firmware installation (SFI) and TF-M–enabled upgrade are supported via embedded root secure services (RSS) and HDP-protected boot entry.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M33 with TrustZone®, FPU, MPU, and DSP extensions - enables secure real-time control with hardware-isolated execution environments. |
| Max Clock / Performance | 160 MHz / 240 DMIPS - delivers deterministic real-time response for motor control and audio processing at ultra-low energy cost. |
| Flash Memory | 2 MB with ECC and dual-bank RWW - supports safe over-the-air updates without service interruption and robust data integrity in harsh environments. |
| SRAM | 786 KB total (722 KB with up to 322 KB ECC-enabled) - provides ample buffer space for cryptographic operations and sensor fusion algorithms in secure context. |
| Low-Power Modes | 160 nA Shutdown, 530 nA Standby+RTC, 4.3 µA Stop 3 with full SRAM - extends battery life to years in wireless sensor nodes and wearable medical devices. |
| Analog Peripherals | 14-bit 2.5-Msps ADC + 12-bit 2.5-Msps ADC (autonomous in Stop 2), 2× DAC, 2× op-amp, 2× comparator - enables high-fidelity signal acquisition and closed-loop analog control without waking core. |
| Security Features | TrustZone®, 96-bit UID, 512-byte OTP, HASH accelerator, NIST SP800-90B TRNG, tamper detection - meets PSA Level 3 and SESIP certification prerequisites for IoT endpoint authentication. |
Pinout & Package
STM32U575QGI6Q uses a 132-ball UFBGA package (7 × 7 mm, 0.5 mm pitch) with 114 user I/Os, including 14 low-voltage I/Os (1.08 V supply) and most pins 5V-tolerant. The package supports fine-pitch routing and thermal dissipation suitable for compact industrial and portable designs.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VDDA, VDDIO2 | Main, analog, and I/O domain supplies | Independent power domains enable mixed-signal precision and flexible I/O voltage scaling (1.08–3.6 V). |
| VBAT | Backup power supply | Retains RTC, 32×32-bit backup registers, and 2 KB backup SRAM during main power loss. |
| PA0–PA15, PB0–PB15, etc. | General-purpose I/Os | 136 fast GPIOs with interrupt capability; up to 14 support independent low-voltage supply for interfacing with sub-1.2 V logic. |
| PC13–PC15 | RTC-related functions | Dedicated pins for LSE oscillator (32.768 kHz), RTC clock input, and tamper detection - critical for timekeeping integrity. |
| PD0–PD1 | OCTOSPI interface | Octo-SPI data/command/address lines enabling high-speed external NOR/PSRAM/F-RAM expansion up to 133 MHz. |
| PE2–PE7 | FDCAN TX/RX | High-integrity CAN FD bus interface supporting 5 Mbps data phase - used in industrial automation and automotive diagnostics gateways. |
Key Features
| Feature | Design Value |
|---|---|
| LPBAM (Low-Power Background Autonomous Mode) | Enables DMA-driven peripheral chains (ADC→DMA→memory) without CPU wake-up - reduces active time by >90% in sensor logging applications. |
| ART Accelerator with 8 KB I-cache & 4 KB D-cache | Eliminates flash wait states at 160 MHz and accelerates external memory access - improves real-time determinism for audio and graphics workloads. |
| Chrom-ART Accelerator (DMA2D) | Offloads 2D graphic rendering (ARGB blending, image copy, format conversion) from CPU - cuts GUI frame generation time by 4× in HMI displays. |
| CORDIC + FMAC coprocessors | Hardware-accelerated trigonometric and filtering math - reduces FFT computation latency by 60% and enables real-time vibration analysis in predictive maintenance systems. |
| Secure Firmware Installation (SFI) | Root-of-trust boot flow using HDP-protected ROM code and RSS-managed keys - prevents unauthorized firmware injection during manufacturing or field update. |
Applications
| Industrial Wireless Sensor Node | Secure Medical Wearable |
|---|---|
Use Scenario: Battery-powered temperature/humidity/pressure node transmitting encrypted telemetry via LoRaWAN every 15 minutes. IC Role / Device Role / Timing Role: Main MCU executing sensor fusion, AES-256 encryption, and low-power scheduling; RTC maintains precise wakeup timing. Use Value: 160 nA Shutdown current and LPBAM-driven ADC/DMA sequence extend 2xAA battery life beyond 5 years without compromising security or measurement fidelity. | Use Scenario: ECG patch continuously acquiring biopotential signals while detecting arrhythmia and storing encrypted logs locally. IC Role / Device Role / Timing Role: Secure host processor managing analog front-end (op-amps, ADCs), cryptographic co-processing (HASH, TRNG), and tamper-aware data storage. Use Value: Dual ADCs with autonomous Stop 2 operation capture 250 SPS ECG waveforms without CPU intervention; TrustZone isolates patient data from BLE stack. |
| Smart Energy Metering Gateway | USB-C PD Power Controller |
Use Scenario: DIN-rail mounted gateway aggregating Modbus RTU data from 32 smart meters and forwarding via cellular to cloud platform. IC Role / Device Role / Timing Role: Central controller running FreeRTOS, managing multiple UARTs, SDMMC logging, and secure TLS handshake with backend server. Use Value: 2 MB Flash accommodates dual-application image + secure bootloader; 109 ULPMark™-PP score ensures efficient background connectivity management. | Use Scenario: Embedded USB-C port controller negotiating 100 W power delivery contracts while monitoring VBUS, CC lines, and thermal limits. IC Role / Device Role / Timing Role: Dedicated UCPD peripheral handling PD protocol state machine, BMC encoding/decoding, and fault-safe power path control. Use Value: Integrated UCPD PHY eliminates external transceiver; hardware CRC and timeout logic guarantee <100 µs fault response - meeting USB PD 3.1 safety requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ultra-low-power secure MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32U585QII6Q | Includes integrated SMPS controller (vs. SMPS support only), adds AES-256/GCM/CCM crypto accelerator and additional 64 KB SRAM. | Better suited for high-throughput secure communication (TLS 1.3, IPsec) and larger OTA image storage. | Select when requiring hardware-accelerated authenticated encryption and higher memory bandwidth for cloud-connected endpoints. |
| NXP KW38 | ARM Cortex-M4F core, no TrustZone, lower Flash (512 KB), Bluetooth LE 5.0 radio integrated, 1.5 µA Stop mode. | Optimized for Bluetooth mesh sensor networks with minimal external components - lacks CAN FD, Octo-SPI, and advanced analog. | Choose for cost-sensitive, short-range wireless applications where radio integration outweighs security and peripheral richness. |
Compared with STM32U575QGI6Q, STM32U585QII6Q offers stronger cryptographic throughput and power-conversion integration but at higher BOM cost; KW38 trades security depth and mixed-signal capability for Bluetooth-native connectivity and lower standby current in RF-centric use cases.
Availability
STM32U575QGI6Q is available at Aetrix Electronics and suitable for industrial wireless sensor nodes, secure medical wearables, smart energy gateways, and USB-C PD controller designs requiring stable component supply across multi-year production cycles.
Supply support for STM32U575QGI6Q includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power ICs, sensors, and automotive semiconductors since 1987.
The STM32U5 series targets ultra-low-power, high-security embedded applications - combining Arm TrustZone with ST's proprietary FlexPowerControl and LPBAM to enable decade-long battery life in certified IoT endpoints.
FAQ
What is the maximum operating temperature range for STM32U575QGI6Q?
The STM32U575QGI6Q is rated for –40 °C to +125 °C ambient operation, validated per industrial-grade specifications. This extended range supports deployment in under-hood automotive modules, outdoor utility meters, and factory-floor controllers without derating or external thermal management.
Does STM32U575QGI6Q support hardware-based secure boot with public-key verification?
Yes - it implements a root-of-trust boot flow using a unique boot entry point, secure hide protection area (HDP), and embedded ROM code that validates signed firmware images via ECDSA P-256 before execution. Public keys are stored in OTP or secure flash, and debug access is disabled via RDP level 2.
Can the 14-bit ADC operate autonomously in Stop 2 mode?
No - only the 12-bit ADC4 supports autonomous conversion in Stop 2 mode. The 14-bit ADC1 requires the CPU or a peripheral trigger source active in Run or Sleep mode; its higher resolution and sampling rate (2.5 Msps) are optimized for high-fidelity acquisition during active sensing phases.
Which development tools are officially supported for STM32U575QGI6Q firmware development?
ST provides full support via STM32CubeIDE (v1.14+), STM32CubeMX for configuration, and STM32U5xx HAL/LL drivers. Debugging uses SWD/JTAG via ST-LINK/V3; secure firmware signing and TF-M integration are enabled through STM32CubeProgrammer and Arm PSA Certified reference implementations.
STM32U575QGI6Q Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 132-UFBGA
- Series:
- STM32U5
- Packaging:
- Bulk
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-M33
- Core Size:
- 32-Bit
- Speed:
- 160MHz
- Connectivity:
- CANbus, I2C, IrDA, LINbus, MMC/SD/SDIO, SAI, SmartCard, SPDIF, SPI, UART/USART, USB, USB OTG
- Peripherals:
- Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
- Number of I/O:
- 106
- Program Memory Size:
- 1MB (1M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 784K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 3.6V
- Data Converters:
- A/D 24x12/14b SAR; D/A 2x12b
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32U575QGI6Q FAQ
1.How can I place an order for STM32U575QGI6Q through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32U575QGI6Q on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32U575QGI6Q reliable?
The price and inventory of STM32U575QGI6Q are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32U575QGI6Q is usually 5 days.
3.What payment methods are accepted for STM32U575QGI6Q?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32U575QGI6Q transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32U575QGI6Q?
STM32U575QGI6Q orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32U575QGI6Q order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32U575QGI6Q?
For technical support, including STM32U575QGI6Q datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32U575QGI6Q requirements.
6.How does Aetrix verify that STM32U575QGI6Q is sourced from the original manufacturer or authorized distributors?
All STM32U575QGI6Q products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32U575QGI6Q meets industry standards.
7.What is the process for return or replacement of STM32U575QGI6Q?
All STM32U575QGI6Q units undergo pre-shipment inspection (PSI). If there is an issue with STM32U575QGI6Q, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32U575QGI6Q part is unused and in its original packaging.
Return procedure for STM32U575QGI6Q:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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