STMicroelectronics STM32U575QII3
- Part No.:
- STM32U575QII3
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 132-UFBGA
- Datasheet:
-
STM32U575QII3.pdf
- Description:
- IC MCU 32BIT 2MB FLASH 132UFBGA
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
STM32U575QII3 from STMicroelectronics is an ultra-low-power Arm® Cortex®-M33 32-bit microcontroller with TrustZone® security, 240 DMIPS performance, 2 MB Flash (ECC), 786 KB SRAM, and integrated SMPS regulator. It operates from 1.71–3.6 V across –40 °C to +125 °C and delivers 4.3 µA Stop 3 mode with full SRAM retention - ideal for battery-powered industrial sensors and secure IoT edge nodes.
For engineers reviewing the STM32U575QII3 datasheet, STM32U575QII3 pinout, STM32U575QII3 application, or STM32U575QII3 equivalent, key selection criteria include TrustZone-enabled secure boot, LPBAM autonomous peripheral operation in Stop 2, 14-bit 2.5-Msps ADC with hardware oversampling, CAN FD interface, and UFBGA132 (7 × 7 mm) package compatibility with high-density PCB layouts.
Technical Context
The STM32U575QII3 implements a dual-bank Arm Cortex-M33 core with MPU, FPU, and TrustZone® for hardware-isolated secure/non-secure execution environments. Its ART Accelerator includes 8-KB instruction cache and 4-KB data cache, enabling zero-wait-state execution at up to 160 MHz.
Power architecture integrates an embedded LDO and configurable SMPS step-down converter with on-the-fly voltage scaling. Low-power modes are orchestrated via FlexPowerControl, supporting autonomous DMA-driven peripheral operation down to Stop 2 - including 12-bit ADC sampling and RTC calendar functions - without CPU intervention.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M33 with TrustZone®, FPU, and DSP extensions - enables secure real-time control with cryptographic acceleration and deterministic interrupt latency. |
| Max Clock Speed | 160 MHz - delivers 240 DMIPS and 651 CoreMark® (4.07 CoreMark®/MHz) for high-throughput sensor fusion and protocol stack execution. |
| Flash Memory | 2 MB with ECC, dual-bank read-while-write - supports safe over-the-air firmware updates and robust code integrity in harsh environments. |
| SRAM | 786 KB total: 722 KB with optional ECC (up to 322 KB), 64 KB retained in Stop 3 - balances safety-critical data storage with ultra-low leakage. |
| Low-Power Modes | 160 nA Shutdown, 530 nA Standby with RTC, 4.3 µA Stop 3 with full SRAM - extends 10+ year battery life in metering and environmental monitoring. |
| Analog Peripherals | 14-bit 2.5-Msps ADC (hardware oversampling), dual 12-bit DAC, 2 op-amps with PGA, 2 ultra-low-power comparators - enables precision analog front-end design without external signal conditioning. |
| Security Features | TrustZone®-secured I/Os/memories/peripherals, 96-bit unique ID, 512-byte OTP, HASH accelerator, NIST SP800-90B TRNG - meets PSA Level 3 and SESIP certification requirements. |
Pinout & Package
STM32U575QII3 uses a 132-ball UFBGA package (7 × 7 mm, 0.5 mm pitch, A0G8 variant), optimized for compact industrial and portable designs requiring thermal efficiency and high I/O density.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VDDA, VDDIO2 | Main, analog, and I/O power supplies | Independent supply domains enable noise isolation for ADC/DAC and flexible I/O voltage scaling (1.08–3.6 V). |
| VSS, VSSA, VSSIO2 | Ground references | Dedicated analog and I/O ground planes minimize coupling noise in mixed-signal operation. |
| NRST | Active-low reset input | Asynchronous reset with internal pull-up; supports external debounced push-button or supervisor IC assertion. |
| BOOT0 | Boot mode selection | Configures boot source (system memory, embedded Flash, or SRAM) during power-on reset - critical for field firmware recovery. |
| PA0–PA15, PB0–PB15, etc. | General-purpose I/Os | Up to 136 fast I/Os with interrupt capability; most 5V-tolerant and configurable as LP-GPIO for sub-µA wake-up in Stop modes. |
| PC13–PC15 | RTC/LSE domain pins | Support 32.768 kHz crystal oscillator (LSE) and backup registers/SRAM retention in VBAT mode - essential for timekeeping during main power loss. |
| PD0–PD1 | OCTOSPI clock/data | Drive high-speed Octo-SPI interfaces for external NOR/PSRAM/F-RAM expansion - enables >100 MB/s memory bandwidth beyond internal Flash. |
Key Features
| Feature | Design Value |
|---|---|
| LPBAM (Low-Power Background Autonomous Mode) | Enables DMA-driven peripheral chains (ADC→DMA→memory→timer) without CPU wake-up - reduces active time by >90% in sensor logging applications. |
| FlexPowerControl with SMPS | Integrated switch-mode power supply dynamically scales Vcore from 0.9–1.2 V, cutting dynamic power by 3× vs. LDO-only operation at 160 MHz. |
| Secure Firmware Installation (SFI) | Leverages embedded Root Secure Services (RSS) to validate and install signed firmware images - eliminates need for external secure element in OTA update architectures. |
| CORDIC + FMAC coprocessors | Accelerates trigonometric (sin/cos/tan) and filter coefficient calculations in real time - offloads 30–50% of CPU cycles in motor control and audio preprocessing. |
| Chrom-ART Accelerator (DMA2D) | Hardware bitmap blending, format conversion, and layer composition - enables smooth GUI rendering on 320×240 displays with <1 ms frame time. |
Applications
| Smart Utility Meter | Secure Industrial Gateway |
|---|---|
Use Scenario: Battery-powered electricity/water/gas meter with 10-year lifespan, tamper detection, and HAN communication. IC Role / Device Role / Timing Role: Primary MCU executing metrology algorithms, secure TLS stack, and RTC-based billing intervals. Use Value: 160 nA Shutdown current and VBAT-protected RTC/calendar ensure accurate time-stamping and event logging during main power failure. | Use Scenario: Edge gateway aggregating Modbus, CAN FD, and BLE sensor data for cloud upload via TLS-secured cellular link. IC Role / Device Role / Timing Role: Secure host controller managing encrypted data routing, certificate validation, and watchdog-monitored failover. Use Value: TrustZone®-isolated secure world runs TF-M for PSA-certified firmware updates, while non-secure world handles protocol stacks and UI. |
| Portable Medical Sensor | Automotive Cabin Controller |
Use Scenario: Wearable ECG/SpO₂ monitor with clinical-grade analog front-end and Bluetooth LE telemetry. IC Role / Device Role / Timing Role: Signal acquisition MCU performing real-time filtering, artifact rejection, and low-latency BLE packetization. Use Value: 14-bit 2.5-Msps ADC with hardware oversampling achieves >100 dB SNR; CORDIC accelerates QRS detection with <2 ms latency. | Use Scenario: In-vehicle ambient lighting, seat position, and HVAC control module with ASIL-B functional safety requirements. IC Role / Device Role / Timing Role: Safety-monitoring MCU validating sensor inputs, driving PWM dimming, and reporting faults via CAN FD. Use Value: Dual-lockstep timer peripherals (TIM1/TIM8) and ECC-protected Flash/SRAM meet ISO 26262 diagnostic coverage targets for ASIL-B compliance. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ultra-low-power secure MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32L562VEJ6 | Same Cortex-M33 core and TrustZone®, but 512 KB Flash, 256 KB SRAM, no SMPS, lower max frequency (110 MHz) | Targeted at cost-sensitive, lower-compute IoT endpoints - lacks OCTOSPI, CAN FD, and advanced analog features | Select when system requires only basic secure boot and BLE connectivity without external memory or motor control. |
| NXP LPC55S69JBD100 | Dual Cortex-M33 cores, 640 KB Flash, 320 KB SRAM, no SMPS, different security IP (EdgeLock SE050 co-processor) | Emphasizes multi-core RTOS partitioning and discrete secure element integration - weaker analog subsystem and no LPBAM | Prefer for heterogeneous compute tasks (e.g., vision + control) where dedicated crypto offload outweighs ultra-low-power analog needs. |
Compared with STM32L562VEJ6, the STM32U575QII3 adds SMPS, OCTOSPI, CAN FD, and richer analog peripherals - making it superior for high-fidelity sensing and memory-intensive edge AI. Against LPC55S69JBD100, it offers tighter power optimization, integrated TrustZone® peripherals, and LPBAM - better suited for long-life battery systems demanding autonomous operation.
Availability
STM32U575QII3 is available at Aetrix Electronics and suitable for smart utility meters, secure industrial gateways, portable medical sensors, and automotive cabin controllers requiring stable component supply across extended product lifecycles.
Supply support for STM32U575QII3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and analog components for industrial, automotive, and consumer markets.
The STM32U5 series targets ultra-low-power, high-security embedded applications - combining energy efficiency below 5 µA/MHz with PSA Certified Level 3 and SESIP certified security foundations for mission-critical edge devices.
FAQ
What is the maximum operating temperature range for STM32U575QII3?
The STM32U575QII3 is qualified for operation from –40 °C to +125 °C, meeting industrial and extended-temperature automotive cabin requirements. This rating applies to all UFBGA132-packaged variants and is validated per JEDEC JESD22-A104 and A119 standards.
Does STM32U575QII3 support USB Type-C Power Delivery?
Yes - it integrates a dedicated USB Type-C®/USB Power Delivery (UCPD) controller compliant with USB PD 3.0 and USB Type-C 1.3 specifications. The UCPD block supports VCONN switching, dead-battery charging, and programmable power role negotiation without external transceivers.
How does the LPBAM feature reduce system power consumption?
LPBAM enables autonomous peripheral operation using GPDMA and LPGPIO in Stop 2 mode: for example, ADC sampling → DMA transfer → memory store → timer-triggered wakeup - all without CPU involvement. This cuts average current by up to 70% in periodic sensor readout scenarios.
Is the 2 MB Flash memory organized in dual banks with read-while-write capability?
Yes - the 2 MB Flash is split into two independent banks (Bank 1: 1 MB, Bank 2: 1 MB), each supporting simultaneous read and write operations. This allows seamless firmware updates via bank-swapping while maintaining application execution in the active bank.
STM32U575QII3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 132-UFBGA
- Series:
- STM32U5
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-M33
- Core Size:
- 32-Bit
- Speed:
- 160MHz
- Connectivity:
- CANbus, I2C, IrDA, LINbus, MMC/SD/SDIO, SAI, SmartCard, SPDIF, SPI, UART/USART, USB, USB OTG
- Peripherals:
- Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
- Number of I/O:
- 110
- Program Memory Size:
- 2MB (2M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 784K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 3.6V
- Data Converters:
- A/D 24x12/14b SAR; D/A 2x12b
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32U575QII3 FAQ
1.How can I place an order for STM32U575QII3 through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32U575QII3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32U575QII3 reliable?
The price and inventory of STM32U575QII3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32U575QII3 is usually 5 days.
3.What payment methods are accepted for STM32U575QII3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32U575QII3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32U575QII3?
STM32U575QII3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32U575QII3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32U575QII3?
For technical support, including STM32U575QII3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32U575QII3 requirements.
6.How does Aetrix verify that STM32U575QII3 is sourced from the original manufacturer or authorized distributors?
All STM32U575QII3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32U575QII3 meets industry standards.
7.What is the process for return or replacement of STM32U575QII3?
All STM32U575QII3 units undergo pre-shipment inspection (PSI). If there is an issue with STM32U575QII3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32U575QII3 part is unused and in its original packaging.
Return procedure for STM32U575QII3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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