STMicroelectronics STM32U575QII6Q
- Part No.:
- STM32U575QII6Q
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 132-UFBGA
- Datasheet:
-
STM32U575QII6Q.pdf
- Description:
- IC MCU 32BIT 2MB FLASH 132UFBGA
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
STM32U575QII6Q from STMicroelectronics is an ultra-low-power Arm® Cortex®-M33 32-bit MCU with TrustZone® security, 240 DMIPS performance, 2 MB Flash (ECC), 786 KB SRAM, and integrated SMPS power management. It operates from 1.71–3.6 V across –40 °C to +125 °C and delivers 4.3 µA Stop 3 mode with full SRAM retention - ideal for battery-powered industrial sensors and secure IoT edge nodes.
For engineers reviewing the STM32U575QII6Q datasheet, STM32U575QII6Q pinout, STM32U575QII6Q application, or STM32U575QII6Q equivalent, key selection criteria include TrustZone-enabled secure boot, LPBAM autonomous peripheral operation in Stop 2 mode, 14-bit 2.5-Msps ADC with hardware oversampling, CAN FD interface, and UFBGA132 (7 × 7 mm) package compatibility with high-density PCB layouts.
Technical Context
The device implements a dual-bank Arm Cortex-M33 core with MPU, FPU, and TrustZone isolation, enabling secure firmware execution and peripheral partitioning. Its ART Accelerator includes 8-KB instruction cache and 4-KB data cache, supporting zero-wait-state execution at up to 160 MHz from Flash or external memory.
Power architecture integrates an embedded LDO and configurable SMPS step-down converter with on-the-fly voltage scaling. Low-power modes are orchestrated via FlexPowerControl, enabling LPBAM-driven DMA transfers and autonomous analog conversions down to Stop 2 - with RTC, 32×32-bit backup registers, and 2-KB VBAT SRAM retained.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M33 with TrustZone, FPU, and MPU - enables secure, isolated execution of firmware and peripherals. |
| Max Clock / Performance | 160 MHz / 240 DMIPS - supports real-time control and signal processing without external co-processors. |
| Flash Memory | 2 MB with ECC and read-while-write - ensures code integrity and concurrent firmware updates. |
| SRAM | 786 KB total (722 KB with ECC ON) - provides ample buffer space for cryptographic operations and sensor fusion. |
| Low-Power Stop 3 | 4.3 µA with full SRAM retention - extends battery life in always-on sensing applications. |
| Analog Peripherals | 14-bit 2.5-Msps ADC + 12-bit 2.5-Msps ADC (autonomous in Stop 2) + 2× DAC + 2× OPAMP - enables high-precision local signal conditioning. |
| Security Features | TrustZone, Secure Boot, 96-bit UID, 512-byte OTP, HASH accelerator, NIST SP800-90B TRNG - meets PSA Level 3 and SESIP certification requirements. |
| Communication Interfaces | CAN FD, USB OTG FS, USB Type-C/USB PD controller (UCPD), 6× USART, 4× I²C, 3× SPI, 2× SAI, 2× SDMMC - supports mixed wired/wireless edge node connectivity. |
Pinout & Package
STM32U575QII6Q uses a 132-ball UFBGA package (7 × 7 mm, 0.5 mm pitch) with 114 user I/Os. The package supports 1.08–3.6 V I/O supply flexibility, including 14 pins with independent low-voltage supply for interfacing with sub-1.2 V logic.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VDDA, VDDIO2 | Main, analog, and I/O domain supplies | Independent regulation enables noise isolation between digital core, analog converters, and mixed-voltage peripherals. |
| VSS, VSSA, VSSIO2 | Ground references | Dedicated analog and I/O ground planes reduce coupling noise in precision measurement paths. |
| PA0–PA15, PB0–PB15, etc. | General-purpose I/Os | Up to 136 fast I/Os with interrupt capability; most are 5 V-tolerant and support multiple alternate functions (e.g., USART, SPI, TIM). |
| PC13–PC15 | RTC-related pins | Support 32.768 kHz LSE crystal, RTC oscillator, and tamper detection - critical for time-stamped secure logging. |
| VBAT | Backup power input | Supplies RTC, 32×32-bit backup registers, and 2-KB backup SRAM during main power loss. |
| NRST | Active-low reset input | Asynchronous reset with internal pull-up; compatible with external reset supervisors and push-button recovery. |
| BOOT0 | Boot mode selection | Configures boot source (system memory, Flash, or SRAM); used during firmware update or debug entry. |
Key Features
| Feature | Design Value |
|---|---|
| LPBAM (Low-Power Background Autonomous Mode) | Enables DMA-driven peripheral chains (e.g., ADC → memory → timer trigger) without CPU wake-up - reduces active time by >90% in sensor polling loops. |
| FlexPowerControl with SMPS | Integrated step-down converter supports dynamic voltage scaling and switch-on-the-fly between LDO/SMPS - improves efficiency by 30–50% vs. LDO-only operation at >10 mA loads. |
| TrustZone + Secure Boot | Hardware-enforced isolation between secure/non-secure firmware; root-of-trust established via unique boot entry and HDP-protected secure services - prevents unauthorized firmware injection. |
| ART Accelerator with ICACHE/DCACHE | 8-KB instruction cache eliminates Flash wait states at 160 MHz; 4-KB data cache accelerates external memory access - sustains 4.07 CoreMark®/MHz across memory-mapped peripherals. |
| Autonomous Analog Subsystem | 12-bit ADC4 operates fully in Stop 2 mode with hardware oversampling and DMA offload - enables continuous vibration or temperature monitoring at <1 µA system current. |
| CORDIC + FMAC Coprocessors | Hardware-accelerated trigonometric (sin/cos/tan) and filter (IIR/FIR) computations - offloads 85% of CPU cycles in motor control or audio preprocessing tasks. |
Applications
| Industrial Predictive Maintenance Sensor | Secure Smart Metering Node |
|---|---|
Use Scenario: Vibration and temperature monitoring on rotating machinery with wireless telemetry upload every 5 minutes. IC Role / Device Role / Timing Role: MCU executes FFT-based anomaly detection, manages BLE/Wi-Fi coexistence timing, and secures firmware OTA updates via TrustZone-protected flash sectors. Use Value: LPBAM reduces average current to 3.8 µA between uploads; 14-bit ADC captures bearing fault harmonics at 2.5 Msps; UCPD enables secure meter calibration over USB-C. | Use Scenario: Tamper-resistant electricity meter with real-time tariff switching, load profiling, and encrypted data logging. IC Role / Device Role / Timing Role: Secure runtime environment for metrology algorithms; RTC with calendar and calibration maintains billing accuracy; VBAT-backed registers preserve billing state during mains outage. Use Value: 530 nA Standby with RTC ensures >10-year battery backup; SHA-256/HASH acceleration signs 100+ log entries/sec; 96-bit UID binds firmware to hardware identity. |
| Medical Wearable ECG Monitor | Automotive Cabin Air Quality Controller |
Use Scenario: Disposable patch-style ECG device with 7-day battery life, Bluetooth LE telemetry, and on-device arrhythmia classification. IC Role / Device Role / Timing Role: Processes raw electrode signals using OPAMP-PGA front-end and CORDIC-based QRS detection; synchronizes BLE advertising intervals with low-power timers. Use Value: 2× OPAMP with PGA configures gain/offset for microvolt-level biopotentials; 12-bit ADC4 runs autonomously in Stop 2 to capture baseline waveforms at 1 kSPS while drawing <500 nA. | Use Scenario: In-cabin CO₂/VOC sensor with PWM-controlled fan, I²C gas sensors, and CAN FD integration into vehicle body network. IC Role / Device Role / Timing Role: Real-time air quality index calculation; CAN FD message scheduling with guaranteed latency; secure firmware update via UCPD over service port. Use Value: CAN FD controller handles 5 Mbps diagnostics and sensor fusion messages; 160 nA Shutdown mode enables rapid wake-on-gas-threshold; 17 timers coordinate PWM fan control and sensor sampling without CPU intervention. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ultra-low-power secure MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32L562VET6 | Same Cortex-M33 core and TrustZone, but 512 KB Flash, 256 KB SRAM, no SMPS, lower max clock (110 MHz) | Lacks LPBAM, Octo-SPI, UCPD, and CAN FD - suitable only for simpler secure sensor nodes without complex connectivity or high-speed peripherals | Select when cost sensitivity outweighs need for CAN FD, USB-C PD, or >1 MB Flash; verify absence of SMPS meets system efficiency targets. |
| RA4M3GFP | Arm Cortex-M33 with TrustZone, 1 MB Flash, 384 KB SRAM, no SMPS, 120 MHz max, different peripheral set (no UCPD/CAN FD) | Uses Renesas' Flexible Software Package (FSP); lacks autonomous analog subsystem and LPBAM - requires more CPU intervention for low-power operation | Choose if existing Renesas toolchain alignment or specific IP licensing (e.g., AES-256 HW) drives design; confirm missing peripherals don't block end-product certification. |
Compared with STM32L562VET6 and RA4M3GFP, STM32U575QII6Q uniquely combines SMPS-based power efficiency, LPBAM-driven autonomy, and full-featured secure connectivity (UCPD + CAN FD), making it the only option capable of sustaining <5 µA average current while executing real-time sensor fusion and authenticated wireless uploads.
Availability
STM32U575QII6Q is available at Aetrix Electronics and suitable for industrial predictive maintenance sensors, secure smart metering nodes, medical wearable ECG monitors, and automotive cabin air quality controllers requiring stable component supply across extended product lifecycles.
Supply support for STM32U575QII6Q includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and automotive-grade components since 1987.
The STM32U5 series targets ultra-low-power, high-security embedded applications - specifically engineered for battery-operated IoT endpoints, industrial edge nodes, and medical wearables where energy efficiency, cryptographic integrity, and long-term supply assurance are non-negotiable.
FAQ
What is the maximum operating temperature range for STM32U575QII6Q?
The STM32U575QII6Q is qualified for operation from –40 °C to +125 °C ambient temperature. This extended industrial grade rating is validated per JEDEC JESD22-A104 and applies to all package variants, including the UFBGA132. Thermal derating begins above 105 °C for sustained 160 MHz operation.
Does STM32U575QII6Q support hardware-accelerated cryptography beyond HASH and TRNG?
Yes - the device integrates dedicated hardware accelerators for AES-128/256 (ECB/CBC/CTR/GCM), PKA (RSA/ECC/DH), and SHA-2 (SHA-224/256). These are accessible via the CryptoCell-312 security subsystem and enabled through ST's X-CUBE-CRYPTOLIB middleware, supporting TLS 1.2/1.3 handshake acceleration and secure boot signature verification.
Can the SMPS be used simultaneously with the internal LDO for mixed-domain power delivery?
Yes - the SMPS can power the VCORE domain while the LDO independently supplies VDDA (analog) and VDDIO2 (I/O) domains. This configuration is supported in all active and low-power modes except Shutdown, and is configured via the PWR_CR3 register. Voltage sequencing is managed automatically during mode transitions.
How many wake-up pins are available in Standby mode, and what is their voltage tolerance?
STM32U575QII6Q supports 24 dedicated wake-up pins in Standby mode, each configurable as edge-triggered inputs. All 24 pins are 5 V-tolerant when VDDIO2 ≥ 2.0 V, and retain wake capability even when VDDIO2 is supplied at 1.08 V - enabling direct interfacing with legacy 5 V logic or low-voltage sensors without level shifters.
STM32U575QII6Q Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 132-UFBGA
- Series:
- STM32U5
- Packaging:
- Bulk
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-M33
- Core Size:
- 32-Bit
- Speed:
- 160MHz
- Connectivity:
- CANbus, I2C, IrDA, LINbus, MMC/SD/SDIO, SAI, SmartCard, SPDIF, SPI, UART/USART, USB, USB OTG
- Peripherals:
- Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
- Number of I/O:
- 106
- Program Memory Size:
- 2MB (2M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 784K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 3.6V
- Data Converters:
- A/D 24x12/14b SAR; D/A 2x12b
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32U575QII6Q FAQ
1.How can I place an order for STM32U575QII6Q through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32U575QII6Q on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32U575QII6Q reliable?
The price and inventory of STM32U575QII6Q are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32U575QII6Q is usually 5 days.
3.What payment methods are accepted for STM32U575QII6Q?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32U575QII6Q transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32U575QII6Q?
STM32U575QII6Q orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32U575QII6Q order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32U575QII6Q?
For technical support, including STM32U575QII6Q datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32U575QII6Q requirements.
6.How does Aetrix verify that STM32U575QII6Q is sourced from the original manufacturer or authorized distributors?
All STM32U575QII6Q products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32U575QII6Q meets industry standards.
7.What is the process for return or replacement of STM32U575QII6Q?
All STM32U575QII6Q units undergo pre-shipment inspection (PSI). If there is an issue with STM32U575QII6Q, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32U575QII6Q part is unused and in its original packaging.
Return procedure for STM32U575QII6Q:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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