STMicroelectronics STM32U575RIT3
- Part No.:
- STM32U575RIT3
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- -
- Datasheet:
-
STM32U575RIT3.pdf
- Description:
- IC MCU 32BIT 2MB FLASH 64LQFP
- Quantity:
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Product details
Overview
STM32U575RIT3 from STMicroelectronics is an ultra-low-power Arm® Cortex®-M33 32-bit MCU with TrustZone® and FPU, delivering 240 DMIPS at up to 160 MHz. It integrates 2 MB Flash (with ECC), 786 KB SRAM, and supports LPBAM autonomous peripheral operation down to Stop 2 mode. Designed for battery-powered IoT edge nodes, it enables secure sensor fusion and real-time control in smart meters and wearable medical devices.
For engineers reviewing the STM32U575RIT3 datasheet, STM32U575RIT3 pinout, STM32U575RIT3 application, or STM32U575RIT3 equivalent, key selection criteria include its 160 MHz max clock with ART Accelerator, 19.5 µA/MHz Run mode @ 3.3 V, TrustZone-enabled secure boot, dual 14-/12-bit ADCs with hardware oversampling, and integrated SMPS for dynamic voltage scaling.
Technical Context
The STM32U575RIT3 implements a dual-bank Flash architecture enabling read-while-write operations and supports TrustZone-enforced memory isolation between secure and non-secure firmware partitions. Its FlexPowerControl system combines LDO and SMPS regulators with on-the-fly switching to optimize power across operating modes.
It features three PLLs - one for system clock (up to 160 MHz), one for USB/OTG, and one for audio/ADC - and includes dedicated low-power timers (LPTIM1–LPTIM4) functional in Stop mode, alongside a 32-bit RTC with hardware calendar and calibration.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M33 with TrustZone, FPU, MPU, and DSP extensions - enables secure real-time execution with hardware-enforced privilege separation. |
| Max Clock / Performance | 160 MHz with ART Accelerator (0-wait-state flash execution); 240 DMIPS - sustains deterministic real-time response in resource-constrained edge applications. |
| Memory | 2 MB Flash (ECC, dual-bank RWW), 786 KB SRAM (722 KB with ECC ON) - supports robust firmware updates and data integrity in safety-critical logging. |
| Low-Power Modes | 160 nA Shutdown, 530 nA Standby with RTC, 4.3 µA Stop 3 with full SRAM - extends battery life to years in always-on sensor endpoints. |
| Analog Peripherals | 14-bit ADC @ 2.5 Msps (hardware oversampling), 12-bit ADC autonomous in Stop 2, 2× DAC, 2× OPAMP, 2× comparator - enables high-fidelity signal acquisition without waking CPU. |
| Security | TrustZone, secure boot via unique entry + HDP, HASH accelerator, NIST SP800-90B TRNG, 96-bit UID, 512-byte OTP - meets PSA Level 3 and SESIP certification prerequisites. |
| Communication | 1× CAN FD, 6× USART, 4× I²C FM+, 2× SAI, 1× USB OTG FS, 1× UCPD, 2× SDMMC - supports mixed wired/wireless connectivity stacks including BLE coexistence and USB-C PD negotiation. |
Pinout & Package
STM32U575RIT3 is housed in a 64-pin LQFP64 (10 × 10 mm) package with exposed thermal pad, rated for industrial temperature range (–40 °C to +85 °C). Pin functions are validated per DS13737 Rev 10 Section 4.2 (Pin description) and Table 12 (LQFP64 pinout).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VDDA, VDDIO2 | Main, analog, and I/O supply rails | Independent 1.71–3.6 V domains enable precise analog measurement and 5V-tolerant GPIO interfacing without level shifters. |
| PA0–PA15, PB0–PB15, etc. | General-purpose I/Os | Up to 136 fast I/Os with interrupt capability; 14 support independent 1.08–3.6 V supply for mixed-voltage subsystem interfacing. |
| PC13–PC15 | RTC/LSE oscillator pins | Dedicated low-power crystal interface for 32.768 kHz RTC timing with <±20 ppm stability over temperature and voltage. |
| BOOT0 | Boot mode selection | Configures boot source (system memory, embedded Flash, or SRAM) at reset; critical for field firmware recovery and secure update staging. |
| NRST | Active-low reset input | Asynchronous reset with internal pull-up; supports external watchdog or power supervisor assertion with 20 ns minimum pulse width. |
| VREF+ / VREF– | ADC reference inputs | Enable external precision reference (e.g., REF3325) for <±0.5 LSB INL in high-accuracy sensor front-ends. |
Key Features
| Feature | Design Value |
|---|---|
| LPBAM (Low-Power Background Autonomous Mode) | Enables DMA-driven peripheral chains (e.g., ADC → DMA → memory → timer trigger) without CPU wake-up - reduces active time by >90% in periodic sensing. |
| FlexPowerControl with SMPS | Integrated step-down converter supports dynamic voltage scaling from 1.1 V to 1.26 V core voltage, cutting active power by up to 30% vs. LDO-only operation. |
| ART Accelerator with ICACHE/DCACHE | 8 KB instruction cache + 4 KB data cache eliminate wait states for flash and external memory access - ensures deterministic 160 MHz execution in real-time control loops. |
| Secure Firmware Installation (SFI) | Embedded Root Secure Services (RSS) validate and install signed firmware images in secure memory - eliminates need for external secure element in OTA update architectures. |
| Chrom-ART Accelerator (DMA2D) | Hardware-accelerated 2D graphics rendering offloads CPU during GUI composition - enables smooth 320×240 LCD updates at <1% CPU load in portable HMI designs. |
Applications
| Smart Utility Metering | Wearable Health Monitor |
|---|---|
Use Scenario: Battery-operated gas/water meter with ultrasonic flow sensing, tamper detection, and LoRaWAN backhaul. IC Role / Device Role / Timing Role: Main controller executing metrology algorithms, managing secure OTA updates, and coordinating low-power radio sleep/wake cycles. Use Value: 530 nA Standby with RTC maintains calendar/timekeeping for billing intervals while extending 10-year battery life; TrustZone isolates metrology firmware from communication stack. | Use Scenario: ECG patch with continuous biopotential acquisition, motion artifact compensation, and Bluetooth LE telemetry. IC Role / Device Role / Timing Role: Signal processor running CORDIC-based QRS detection and FMAC-filtered noise suppression in Stop 2 mode. Use Value: 12-bit ADC autonomous in Stop 2 acquires 1 kSPS ECG data without CPU wake-up; 1.9 µA Stop 3 preserves 16 KB SRAM for waveform buffering. |
| Industrial Predictive Maintenance Node | Secure Asset Tracker |
Use Scenario: Vibration-sensing node on rotating machinery with FFT-based anomaly detection and cellular fallback reporting. IC Role / Device Role / Timing Role: Real-time vibration analysis host using MDF digital filters and CORDIC trigonometric acceleration. Use Value: Multifunction digital filter (MDF) performs real-time 6-channel FFT preprocessing; 4.3 µA Stop 3 retains full SRAM for post-event waveform capture. | Use Scenario: GPS/GNSS tracker with geofence alerts, encrypted location upload, and anti-tamper shutdown. IC Role / Device Role / Timing Role: Secure location manager handling GNSS parsing, AES-256 encryption, and tamper-triggered VBAT-backed SRAM wipe. Use Value: VBAT domain powers RTC and 2 KB backup SRAM during main supply removal; 96-bit UID + OTP enable device identity binding in cloud enrollment. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ultra-low-power secure MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32L562RET6 | Same Cortex-M33 core but lacks SMPS, lower Flash (512 KB), no Octo-SPI, and no UCPD controller. | Suitable for cost-sensitive secure applications without USB-C PD or external PSRAM/NOR expansion needs. | Select when power efficiency below 1 µA Standby is not required and external memory bandwidth is minimal. |
| RA4M3AFGB | Arm Cortex-M4F core, 1 MB Flash, no TrustZone, Renesas Secure Crypto Engine instead of TrustZone, different peripheral set (no CAN FD, no UCPD). | Better suited for motor control + connectivity combos where floating-point performance outweighs security partitioning requirements. | Choose when CORDIC/FMAC acceleration is unnecessary and legacy Renesas ecosystem integration is prioritized. |
Compared with STM32L562RET6, the STM32U575RIT3 delivers 4× more Flash, integrated SMPS for sub-µA standby, and USB-C PD capability - making it superior for feature-rich, long-life, field-upgradable edge nodes. Against RA4M3AFGB, it provides hardware-enforced TrustZone isolation and broader analog/peripheral integration for certified secure deployments.
Availability
STM32U575RIT3 is available at Aetrix Electronics and suitable for smart utility metering, wearable health monitoring, industrial predictive maintenance nodes, and secure asset tracking requiring stable component supply across multi-year production cycles.
Supply support for STM32U575RIT3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and automotive semiconductors.
The STM32U5 series targets ultra-low-power, secure edge computing applications - combining energy efficiency, hardware-based security, and rich analog/mixed-signal integration for next-generation IoT endpoints.
FAQ
What is the maximum operating frequency and how is it sustained?
The STM32U575RIT3 achieves 160 MHz maximum CPU frequency using the ART Accelerator's 8 KB instruction cache, which enables zero-wait-state execution from internal Flash. This is verified under 3.3 V supply and ambient temperatures up to +85 °C per DS13737 Rev 10 Section 5.3.1. The cache eliminates flash access bottlenecks, ensuring deterministic timing for real-time control loops without code relocation to SRAM.
Does STM32U575RIT3 support hardware cryptographic acceleration beyond TRNG and HASH?
No - the STM32U575RIT3 integrates a NIST SP800-90B-compliant True Random Number Generator and a HASH (SHA-256) accelerator, but does not include AES, PKA (public-key accelerator), or DES engines. Cryptographic operations beyond hash generation require software libraries (e.g., Mbed TLS) or external secure elements for full TLS 1.2/1.3 stack acceleration.
How many I/O pins support independent VDDIO2 supply and what is their voltage range?
14 I/O pins (PA0–PA7, PB0–PB7) support independent VDDIO2 supply, configurable from 1.08 V to 3.6 V. This allows direct interfacing with low-voltage peripherals (e.g., 1.8 V sensors or memories) without external level shifters, preserving signal integrity and reducing BOM count in mixed-voltage systems.
What debug interfaces are supported and are they accessible in all low-power modes?
The STM32U575RIT3 supports Serial Wire Debug (SWD) and JTAG via dedicated SWCLK/SWDIO and TCK/TMS/TDI/TDO pins. Debug access is disabled in Shutdown and Standby modes but remains available in Stop 2 and Stop 3 modes when DBGMCU_CR register bits are configured to retain debug clock and peripheral clocks - enabling live register inspection during ultra-low-power operation.
STM32U575RIT3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- -
- Series:
- -
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
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- Core Size:
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- Speed:
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- Connectivity:
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- Peripherals:
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- Number of I/O:
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- Program Memory Size:
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- Program Memory Type:
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- EEPROM Size:
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- RAM Size:
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- Voltage - Supply (Vcc/Vdd):
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- Data Converters:
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- Qualification:
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- Supplier Device Package:
STM32U575RIT3 FAQ
1.How can I place an order for STM32U575RIT3 through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32U575RIT3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32U575RIT3 reliable?
The price and inventory of STM32U575RIT3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32U575RIT3 is usually 5 days.
3.What payment methods are accepted for STM32U575RIT3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32U575RIT3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32U575RIT3?
STM32U575RIT3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32U575RIT3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32U575RIT3?
For technical support, including STM32U575RIT3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32U575RIT3 requirements.
6.How does Aetrix verify that STM32U575RIT3 is sourced from the original manufacturer or authorized distributors?
All STM32U575RIT3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32U575RIT3 meets industry standards.
7.What is the process for return or replacement of STM32U575RIT3?
All STM32U575RIT3 units undergo pre-shipment inspection (PSI). If there is an issue with STM32U575RIT3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32U575RIT3 part is unused and in its original packaging.
Return procedure for STM32U575RIT3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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