STMicroelectronics STM32U575RIT6
- Part No.:
- STM32U575RIT6
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 64-LQFP
- Datasheet:
-
STM32U575RIT6.pdf
- Description:
- IC MCU 32BIT 2MB FLASH 64LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:878
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
STM32U575RIT6 from STMicroelectronics is an ultra-low-power Arm® Cortex®-M33 32-bit MCU with TrustZone® and FPU, delivering 240 DMIPS at up to 160 MHz. It integrates 2 MB Flash with ECC, 786 KB SRAM (722 KB with ECC ON), and supports LPBAM autonomous peripheral operation down to Stop 2 mode. Used in battery-powered industrial sensors and secure IoT edge nodes requiring certified security and sub-μA standby.
For engineers reviewing the STM32U575RIT6 datasheet, STM32U575RIT6 pinout, STM32U575RIT6 application, or STM32U575RIT6 equivalent, key selection criteria include TrustZone-enabled secure boot, 160 nA Shutdown mode with 24 wake-up pins, dual 14-/12-bit ADCs with hardware oversampling, CAN FD interface, and UFQFPN48 package compatibility for space-constrained designs.
Technical Context
The STM32U575RIT6 implements a dual-bank Flash architecture enabling read-while-write and secure firmware installation via embedded Root Secure Services (RSS). Its FlexPowerControl system combines LDO and SMPS regulators with dynamic voltage scaling and on-the-fly switching to optimize power across Run, Stop 2/3, and Standby modes.
TrustZone® partitions memory, peripherals, and I/Os into secure/non-secure worlds, enforced by the Global TrustZone Controller (GTZC) and securable SYSCFG. The ART Accelerator includes 8-KB instruction cache and 4-KB data cache, enabling zero-wait-state execution from Flash and external memories at 160 MHz.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M33 with TrustZone, FPU, MPU, and DSP extensions - enables secure real-time control with cryptographic acceleration. |
| Max Clock / Performance | 160 MHz / 240 DMIPS - supports high-throughput sensor fusion and audio processing in low-power contexts. |
| Memory | 2 MB Flash (ECC, dual-bank RWW), 786 KB SRAM (722 KB with ECC ON) - ensures robust code storage and runtime data integrity for safety-critical firmware. |
| Low-Power Modes | 160 nA Shutdown, 530 nA Standby with RTC, 4.3 µA Stop 3 with full SRAM - extends battery life in always-on edge devices beyond 10 years. |
| Analog Peripherals | 14-bit ADC @ 2.5 Msps (hardware oversampling), dual 12-bit DACs, 2 op-amps with PGA, 2 ultra-low-power comparators - enables precision analog sensing without external signal conditioning. |
| Security Features | TrustZone, 96-bit unique ID, 512-byte OTP, HASH accelerator, NIST SP800-90B TRNG, secure hide protection area (HDP) - meets PSA Level 3 and SESIP certification requirements. |
| Communication Interfaces | 1 CAN FD, 6 USART/LPUART, 4 I²C FM+, 2 SAI, 1 USB OTG FS, 1 UCPD, 2 SDMMC - supports mixed wired/wireless connectivity in industrial gateways and smart meters. |
Pinout & Package
STM32U575RIT6 is housed in a 7 × 7 mm UFQFPN48 package with 48 terminals, optimized for compact PCB layouts and thermal performance in sealed enclosures. Pin functions support flexible I/O mapping, including 5V-tolerant GPIOs, independent VDDIO supplies for 1.08–3.6 V logic levels, and dedicated TrustZone-secured debug (SWD) and tamper detection pins.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VSS | Core power supply and ground | Supports 1.71–3.6 V operation; decoupling required per datasheet layout guidelines for SMPS/LDO stability. |
| VDDA, VSSA | Analog domain supply and ground | Independent 1.62–3.6 V supply for ADC/DAC/OPAMP - critical for noise-sensitive analog accuracy. |
| PA0–PA15, PB0–PB15, etc. | General-purpose I/Os | Up to 136 fast I/Os; most 5V-tolerant, 14 with independent VDDIO - enables mixed-voltage interfacing with legacy peripherals. |
| NRST | Active-low reset input | Asynchronous reset with internal pull-up; supports external reset supervisor ICs for fail-safe recovery. |
| BOOT0 | Boot mode selection | Configures boot source (system memory, Flash, or SRAM); tied low for normal Flash execution. |
| SWCLK, SWDIO | Serial Wire Debug interface | 2-pin debug port supporting programming, trace, and secure debug authentication via TrustZone-aware SWD protocol. |
Key Features
| Feature | Design Value |
|---|---|
| LPBAM (Low-Power Background Autonomous Mode) | Enables DMA-driven peripheral chains (ADC→DMA→memory) without CPU wake-up - reduces active time by >90% in sensor logging applications. |
| FlexPowerControl with SMPS + LDO | Switches between SMPS (high-efficiency) and LDO (low-noise) on-the-fly - maintains <1.9 µA Stop 3 current while preserving analog accuracy. |
| ART Accelerator with ICACHE/DCACHE | 8-KB instruction + 4-KB data cache - eliminates Flash wait states at 160 MHz and accelerates external memory access for Octo-SPI PSRAM/NOR. |
| Secure Firmware Installation (SFI) | Uses embedded RSS and HDP to validate and install signed firmware images - prevents unauthorized code injection during field updates. |
| Dual 14-/12-bit ADC with autonomous Stop 2 operation | 12-bit ADC operates fully in Stop 2 mode with hardware oversampling - enables continuous battery voltage monitoring at <5 µA system current. |
Applications
| Smart Utility Meter | Industrial Predictive Maintenance Sensor |
|---|---|
Use Scenario: Battery-powered gas/water meter with ultrasonic flow sensing, RF mesh backhaul, and 10-year lifespan. IC Role / Device Role / Timing Role: Main controller executing secure metering algorithms, managing CAN FD communication to concentrator, and scheduling LPBAM-triggered ADC sampling every 10 seconds. Use Value: 160 nA Shutdown mode and VBAT-RTC preserve calendar/timekeeping during main power loss; TrustZone isolates metrology firmware from RF stack. | Use Scenario: Wireless vibration/temperature node mounted on rotating machinery, transmitting FFT data via BLE gateway. IC Role / Device Role / Timing Role: Real-time signal processor running CORDIC/FMAC-accelerated FFT on ADC samples, with autonomous Stop 2 mode activation between 1-second acquisition bursts. Use Value: 4.3 µA Stop 3 with full SRAM retains 2 MB of waveform history; 14-bit ADC oversampling achieves <100 µV RMS noise floor for bearing fault detection. |
| Secure Access Control Terminal | Medical Wearable Monitor |
Use Scenario: Tamper-resistant door controller with fingerprint reader, NFC, and encrypted audit log storage. IC Role / Device Role / Timing Role: Secure root-of-trust MCU authenticating biometric data, managing encrypted EEPROM writes, and enforcing RDP-level debug lockdown. Use Value: 96-bit UID + 512-byte OTP stores device-specific keys; active tamper detection pins trigger immediate SRAM wipe on enclosure breach. | Use Scenario: Patch-style ECG/SpO₂ monitor with 7-day battery life, Bluetooth LE telemetry, and clinical-grade analog front-end. IC Role / Device Role / Timing Role: Analog hub managing dual-opamp PGA gain stages, 12-bit DAC for reference calibration, and simultaneous 2-channel ADC sampling at 1 kHz. Use Value: Independent VDDIO on 14 GPIOs interfaces directly with 1.8 V sensor ICs; 530 nA Standby with RTC enables daily sync without draining coin cell. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ultra-low-power secure MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32L562RET6 | Same Cortex-M33 core and TrustZone, but 512 KB Flash, 256 KB SRAM, no Octo-SPI or UCPD; lower ULPMark-PP (82 vs 109). | Lacks CAN FD and USB Type-C PD controller - unsuitable for smart charging or automotive gateway roles. | Select when cost-sensitive designs require baseline TrustZone security without advanced connectivity or large memory footprint. |
| RA4M3AFGB | Arm Cortex-M4F core, 1 MB Flash, 384 KB SRAM, no TrustZone hardware partitioning; uses Renesas Secure Crypto Engine instead. | Higher Run-mode current (38 µA/MHz vs 19.5 µA/MHz); lacks LPBAM and Stop 2 autonomous ADC - limits battery lifetime in intermittent-sensing use cases. | Choose for legacy Renesas ecosystem integration or where software-based security suffices and higher DSP throughput is prioritized over sub-µA sleep. |
Compared with STM32L562RET6 and RA4M3AFGB, the STM32U575RIT6 uniquely combines 2 MB Flash, CAN FD, UCPD, and LPBAM - making it the only option among the three capable of hosting full TF-M-based secure firmware upgrades while sustaining multi-year battery operation in connected edge nodes.
Availability
STM32U575RIT6 is available at Aetrix Electronics and suitable for smart utility meters, industrial predictive maintenance sensors, secure access control terminals, and medical wearable monitors requiring stable component supply across long product lifecycles.
Supply support for STM32U575RIT6 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and analog components for industrial, automotive, and consumer markets.
The STM32U5 series targets ultra-low-power, high-security embedded applications - engineered specifically for battery-operated IoT endpoints, smart meters, and medical wearables demanding PSA Certified Level 3 and functional safety readiness.
FAQ
What is the maximum operating temperature range for STM32U575RIT6?
The STM32U575RIT6 is qualified for industrial operation from –40 °C to +85 °C and extended industrial operation up to +125 °C. This rating applies to all package variants including the UFQFPN48, and is validated per JEDEC JESD47 stress testing standards with full functionality across the range.
Does STM32U575RIT6 support hardware-based secure boot with public-key verification?
Yes. The device implements a hardware-rooted secure boot using a unique boot entry vector and immutable ROM bootloader that validates ECDSA-signed firmware images against keys stored in the Secure Hide Protection Area (HDP). This process enforces chain-of-trust before any user code executes.
Can the 14-bit ADC operate autonomously in Stop 2 mode?
No - only the 12-bit ADC4 supports full autonomous operation in Stop 2 mode, including hardware oversampling and DMA transfer. The 14-bit ADC1 requires CPU presence or at least Stop 1 mode for conversion control and result handling.
What debug interfaces are supported, and are they accessible in secure configurations?
STM32U575RIT6 supports Serial Wire Debug (SWD) and JTAG. In secure configurations, debug access is gated by RDP level and TrustZone policy: RDP Level 2 disables SWD/JTAG entirely, while RDP Level 1 permits authenticated debug via secure debug session keys negotiated through the embedded debug authentication unit.
STM32U575RIT6 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 64-LQFP
- Series:
- STM32U5
- Packaging:
- Bulk
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-M33
- Core Size:
- 32-Bit
- Speed:
- 160MHz
- Connectivity:
- CANbus, I2C, IrDA, LINbus, MMC/SD/SDIO, SAI, SmartCard, SPDIF, SPI, UART/USART, USB, USB OTG
- Peripherals:
- Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
- Number of I/O:
- 51
- Program Memory Size:
- 2MB (2M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 784K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 3.6V
- Data Converters:
- A/D 17x12/14b SAR; D/A 2x12b
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32U575RIT6 FAQ
1.How can I place an order for STM32U575RIT6 through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32U575RIT6 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32U575RIT6 reliable?
The price and inventory of STM32U575RIT6 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32U575RIT6 is usually 5 days.
3.What payment methods are accepted for STM32U575RIT6?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32U575RIT6 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32U575RIT6?
STM32U575RIT6 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32U575RIT6 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32U575RIT6?
For technical support, including STM32U575RIT6 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32U575RIT6 requirements.
6.How does Aetrix verify that STM32U575RIT6 is sourced from the original manufacturer or authorized distributors?
All STM32U575RIT6 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32U575RIT6 meets industry standards.
7.What is the process for return or replacement of STM32U575RIT6?
All STM32U575RIT6 units undergo pre-shipment inspection (PSI). If there is an issue with STM32U575RIT6, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32U575RIT6 part is unused and in its original packaging.
Return procedure for STM32U575RIT6:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
STM32U575RIT6 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

