STMicroelectronics STM32U575ZGT3Q
- Part No.:
- STM32U575ZGT3Q
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 144-LQFP
- Datasheet:
-
STM32U575ZGT3Q.pdf
- Description:
- IC MCU 32BIT 1MB FLASH 144LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:2,570
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
STM32U575ZGT3Q from STMicroelectronics is an ultra-low-power Arm® Cortex®-M33 32-bit MCU with TrustZone® and FPU, delivering 240 DMIPS at up to 160 MHz. It integrates 2 MB Flash (with ECC), 786 KB SRAM, and supports LPBAM autonomous peripheral operation down to Stop 2 mode. Used in battery-powered industrial sensors and secure IoT edge nodes requiring certified firmware updates and real-time analog acquisition.
For engineers reviewing the STM32U575ZGT3Q datasheet, STM32U575ZGT3Q pinout, STM32U575ZGT3Q application, or STM32U575ZGT3Q equivalent, key selection criteria include TrustZone-enabled secure boot, 14-bit 2.5-Msps ADC with Stop 2 autonomy, ULPMark™-CP score of 450, and dual Octo-SPI interfaces for external memory expansion.
Technical Context
The device implements Arm TrustZone® for hardware-enforced isolation between secure and non-secure firmware execution, with root-of-trust established via unique boot entry and HDP-protected secure hide area. Its FlexPowerControl architecture enables dynamic voltage scaling and SMPS/LDO switching on-the-fly to optimize power across operating modes.
Core peripherals include two independent 14-bit/12-bit ADCs (one functional in Stop 2), dual Octo-SPI controllers supporting XIP from NOR/FRAM, and a USB Type-C®/PD controller (UCPD) with integrated transceivers. The ART Accelerator provides zero-wait-state execution from Flash at 160 MHz using 8-KB instruction cache and 4-KB data cache.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M33 with TrustZone®, FPU, MPU, and DSP extensions - enables secure real-time control with deterministic floating-point math. |
| Max Clock / Performance | 160 MHz / 240 DMIPS - supports high-throughput sensor fusion and audio preprocessing without external co-processors. |
| Memory | 2-MB Flash (ECC, RWW), 786-KB SRAM (ECC OFF) - allows robust firmware storage and large buffer space for encrypted OTA updates. |
| Low-Power Modes | 160 nA Shutdown, 530 nA Standby with RTC - extends battery life to multi-year operation in wireless sensor endpoints. |
| Analog Peripherals | 14-bit 2.5-Msps ADC + 12-bit 2.5-Msps ADC (autonomous in Stop 2), 2× DAC, 2× OPAMP, 2× COMP - enables simultaneous precision sensing and actuator control with minimal wake-up latency. |
| Security Features | TrustZone, 96-bit UID, 512-byte OTP, HASH accelerator, NIST SP800-90B TRNG - meets PSA Level 3 and SESIP certification requirements for secure boot and runtime attestation. |
| Communication | 1× CAN FD, 6× USART, 4× I²C, 2× SAI, 2× SDMMC, 1× UCPD - supports mixed wired/wireless connectivity including USB-C PD negotiation and automotive-grade bus communication. |
Pinout & Package
STM32U575ZGT3Q uses a 144-pin LQFP package (14 × 14 mm, pitch 0.5 mm) with exposed thermal pad. Pin functions are validated per DS13737 Rev 10 Section 4.2 (Pin description) and Table 12 (LQFP144 pinout).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VDDA, VDDIO2 | Power supply inputs | Independent 1.71–3.6 V domains for core, analog, and I/O - enable precise noise isolation and flexible rail sequencing. |
| PA0–PA15, PB0–PB15, etc. | General-purpose I/Os | Up to 136 fast GPIOs, most 5V-tolerant; 14 support independent 1.08–3.6 V supply - allow direct interfacing with legacy logic and low-voltage sensors. |
| PC13–PC15 | RTC-related pins | LSE oscillator input/output and RTC tamper - provide calendar timekeeping and intrusion detection during VBAT-only operation. |
| PF0–PF15 | Octo-SPI interface | Dedicated OCTOSPI1/OCTOSPI2 signals - enable XIP from external flash/FRAM with single/dual/octal I/O modes and wrap-around addressing. |
| PA9/PA10 | USB OTG FS | Full-speed USB 2.0 D+/D− - support device/host roles with embedded PHY and battery charging detection (BC1.2). |
| PD0/PD1 | UCPD interface | USB Type-C CC1/CC2 lines with integrated transceivers - handle plug orientation detection, VBUS monitoring, and PD message exchange without external IC. |
Key Features
| Feature | Design Value |
|---|---|
| LPBAM (Low-Power Background Autonomous Mode) | Enables DMA-driven peripheral chains (ADC→DMA→memory) without CPU wake-up - reduces active time by >90% in sensor logging applications. |
| ART Accelerator with ICACHE/DCACHE | Zero-wait-state execution from Flash at 160 MHz and accelerated access to external PSRAM/NOR - eliminates performance penalty of external memory use. |
| Secure Firmware Installation (SFI) | Uses embedded Root Secure Services (RSS) to validate and install signed firmware images - eliminates need for external secure element in cost-sensitive edge devices. |
| CORDIC + FMAC coprocessors | Hardware-accelerated trigonometric and filter math - cuts FFT computation time by 4× vs. software implementation, critical for real-time vibration analysis. |
| Chrom-ART Accelerator (DMA2D) | 2D graphics rendering engine with alpha blending and color format conversion - enables responsive GUI on segment LCD or parallel RGB displays without CPU load. |
Applications
| Industrial Predictive Maintenance Sensor | Secure Smart Metering Endpoint |
|---|---|
Use Scenario: Vibration and temperature monitoring on rotating machinery with local FFT analysis and wireless alert transmission. IC Role / Device Role / Timing Role: Main controller executing TrustZone-secured firmware, acquiring synchronized analog data via dual ADCs, and running CORDIC/FMAC for real-time spectral analysis. Use Value: LPBAM reduces average current to <5 µA during idle sensing; 14-bit ADC oversampling achieves ±0.1°C thermal resolution without external signal conditioning. | Use Scenario: Electricity meter with tamper detection, encrypted consumption logging, and PLC/GPRS backhaul. IC Role / Device Role / Timing Role: Secure system-on-chip managing metrology ADC, RTC calendar, backup SRAM, and cryptographic signing of billing data using HASH/TRNG. Use Value: VBAT mode sustains RTC and 2-KB backup SRAM for >10 years on coin cell; HDP-protected secure hide area prevents firmware rollback attacks. |
| USB-C Powered Portable Medical Device | Low-Power Edge AI Vision Node |
Use Scenario: Handheld ECG monitor powered and charged via USB-C with PD negotiation and clinical-grade signal acquisition. IC Role / Device Role / Timing Role: UCPD controller handles CC line negotiation and VBUS control; dual OPAMPs condition analog front-end; 12-bit ADC runs autonomously in Stop 2. Use Value: Integrated UCPD eliminates external PD controller BOM cost; 210 nA Standby with RTC ensures >6-month shelf life before first use. | Use Scenario: Battery-operated camera node performing on-device person detection using lightweight CNN inference. IC Role / Device Role / Timing Role: Host processor for DCMI image capture, DMA2D-assisted frame preprocessing, and TF-M-managed secure model update over BLE. Use Value: Chrom-ART Accelerator offloads RGB/YUV conversion and scaling; 722-KB SRAM with ECC ON buffers full HD frames for inference without external DRAM. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ultra-low-power secure MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32U585ZIT6Q | Same core and memory, adds AES-256/HSM, higher temp grade (–40 to +125 °C), no UCPD | Better suited for automotive under-hood telemetry where crypto acceleration and extended temperature are critical | Select when HSM-level crypto acceleration and AEC-Q100 qualification are required; avoid if USB-C PD functionality is mandatory. |
| NXP LPC55S69JBD100 | Arm Cortex-M33, 640 KB Flash, 320 KB SRAM, no TrustZone partitioning, lacks Octo-SPI and LPBAM | Targeted at cost-optimized consumer IoT with basic security and simpler peripheral sets | Choose for lower-cost designs where dual ADC autonomy, external memory bandwidth, and PSA-certified secure boot are not required. |
Compared with STM32U575ZGT3Q, the STM32U585ZIT6Q trades UCPD for HSM and extended temperature, while the LPC55S69JBD100 offers reduced memory and no LPBAM - making the U575 optimal for USB-C–powered secure edge nodes needing both analog fidelity and autonomous low-power operation.
Availability
STM32U575ZGT3Q is available at Aetrix Electronics and suitable for industrial predictive maintenance sensors, secure smart metering endpoints, and USB-C powered portable medical devices requiring stable component supply and long-term lifecycle assurance.
Supply support for STM32U575ZGT3Q includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and analog components for industrial, automotive, and consumer markets.
The STM32U5 series targets ultra-low-power secure edge computing, combining Arm TrustZone with ST's proprietary FlexPowerControl and LPBAM to deliver certified security and multi-year battery life in constrained environments.
FAQ
What is the maximum operating frequency and associated DMIPS rating?
The STM32U575ZGT3Q operates at up to 160 MHz with an ART Accelerator, achieving 240 DMIPS (Dhrystone 2.1). This performance is sustained with zero wait states from internal Flash due to the 8-KB instruction cache, enabling deterministic real-time response in motor control and sensor fusion applications.
Does this MCU support true autonomous operation in low-power modes?
Yes - LPBAM enables full DMA-driven peripheral sequences (e.g., ADC sampling → filtering → memory store) without CPU intervention, functional down to Stop 2 mode. The 12-bit ADC remains active in Stop 2 with hardware oversampling, allowing continuous sensor monitoring at sub-µA average current.
How does the UCPD peripheral differ from standard USB OTG FS?
The UCPD (USB Type-C®/Power Delivery) controller integrates CC line transceivers, VBUS discharge FETs, and PD protocol stack hardware - enabling plug orientation detection, source/sink role negotiation, and voltage/current contract management. Unlike OTG_FS, it requires no external PD controller or level shifters.
What security certifications does the STM32U575ZGT3Q support out of the box?
The device supports PSA Certified Level 3 and SESIP Level 3 through hardware features including TrustZone isolation, secure boot with immutable root of trust, HDP-protected secure hide area, and NIST SP800-90B–compliant TRNG. These enable certified secure firmware installation (SFI) and over-the-air updates using TF-M without additional secure elements.
STM32U575ZGT3Q Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 144-LQFP
- Series:
- STM32U5
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-M33
- Core Size:
- 32-Bit
- Speed:
- 160MHz
- Connectivity:
- CANbus, I2C, IrDA, LINbus, MMC/SD/SDIO, SAI, SmartCard, SPDIF, SPI, UART/USART, USB, USB OTG
- Peripherals:
- Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
- Number of I/O:
- 111
- Program Memory Size:
- 1MB (1M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 784K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 3.6V
- Data Converters:
- A/D 22x12/14b SAR; D/A 2x12b
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32U575ZGT3Q FAQ
1.How can I place an order for STM32U575ZGT3Q through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32U575ZGT3Q on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32U575ZGT3Q reliable?
The price and inventory of STM32U575ZGT3Q are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32U575ZGT3Q is usually 5 days.
3.What payment methods are accepted for STM32U575ZGT3Q?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32U575ZGT3Q transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32U575ZGT3Q?
STM32U575ZGT3Q orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32U575ZGT3Q order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32U575ZGT3Q?
For technical support, including STM32U575ZGT3Q datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32U575ZGT3Q requirements.
6.How does Aetrix verify that STM32U575ZGT3Q is sourced from the original manufacturer or authorized distributors?
All STM32U575ZGT3Q products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32U575ZGT3Q meets industry standards.
7.What is the process for return or replacement of STM32U575ZGT3Q?
All STM32U575ZGT3Q units undergo pre-shipment inspection (PSI). If there is an issue with STM32U575ZGT3Q, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32U575ZGT3Q part is unused and in its original packaging.
Return procedure for STM32U575ZGT3Q:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
STM32U575ZGT3Q Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

