STMicroelectronics STM32U575ZIT3Q
- Part No.:
- STM32U575ZIT3Q
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- -
- Datasheet:
-
STM32U575ZIT3Q.pdf
- Description:
- IC MCU 32BIT 2MB FLASH 144LQFP
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Product details
Overview
STM32U575ZIT3Q from STMicroelectronics is an ultra-low-power Arm® Cortex®-M33 32-bit microcontroller with TrustZone® security, 2 MB Flash, 786 KB SRAM, and integrated FPU-designed for secure, battery-operated edge nodes in industrial sensing and medical wearables. It delivers 240 DMIPS at up to 160 MHz, supports LPBAM autonomous peripheral operation down to Stop 2 mode, and features hardware crypto acceleration including HASH and NIST SP800-90B-compliant TRNG.
For engineers reviewing the STM32U575ZIT3Q datasheet, STM32U575ZIT3Q pinout, STM32U575ZIT3Q application, or STM32U575ZIT3Q equivalent, key selection criteria include TrustZone-enforced memory isolation, sub-µA low-power modes (e.g., 160 nA Shutdown), dual 14-/12-bit ADCs with Stop 2 autonomy, CAN FD + USB Type-C/USB PD controller integration, and UFBGA132 package compatibility with high I/O density and 1.08 V–3.6 V supply flexibility.
Technical Context
The STM32U575ZIT3Q implements a dual-bank Flash architecture with ECC and read-while-write capability, enabling secure over-the-air firmware updates without runtime interruption. Its FlexPowerControl system integrates SMPS + LDO with on-the-fly voltage scaling and three independent power domains (VCORE, VDD, VDDIO) managed by the PWR controller.
TrustZone® is implemented at silicon level with GTZC (Global TrustZone Controller), securable GPIOs, memory regions, and peripherals-including isolated SAI, SDMMC, and OCTOSPI interfaces. The device boots from secure ROM with Root of Trust, supports Secure Firmware Installation (SFI), and runs TF-M for PSA Certified Level 3 firmware upgrades.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M33 with TrustZone, FPU, MPU, and DSP extensions-enables secure real-time control with deterministic floating-point math. |
| Max Clock Speed | 160 MHz with ART Accelerator (0-wait-state execution)-achieves 240 DMIPS and 4.07 CoreMark®/MHz for high-throughput sensor fusion. |
| Flash Memory | 2 MB with ECC and dual-bank RWW-supports seamless firmware swap and secure code storage with 100 kcycle endurance in 512 KB section. |
| SRAM | 786 KB total: 722 KB with optional ECC (up to 322 KB protected), 64 KB retained in VBAT mode-enables large buffer storage with fault resilience. |
| Low-Power Modes | 160 nA Shutdown (24 wake-up pins), 530 nA Standby+RTC, 1.9 µA Stop 3 (16 KB SRAM retained)-extends battery life in intermittent-sensing applications. |
| Analog Peripherals | 14-bit 2.5-Msps ADC (autonomous in Stop 2), dual 12-bit DACs, 2 op-amps with PGA, 2 ultra-low-power comparators-supports precision analog front-end without CPU wake-up. |
| Security Features | Hardware TRNG (NIST SP800-90B), 96-bit UID, 512-byte OTP, HASH accelerator, tamper detection, and secure boot with HDP-meets IEC 62443-3-3 SL2 requirements. |
Pinout & Package
STM32U575ZIT3Q uses a 132-ball UFBGA package (7 × 7 mm, 0.5 mm pitch, A0G8 variant) with 114 user I/Os, including 14 independently powered I/Os supporting 1.08 V logic and most pins 5 V-tolerant. The package enables high-density PCB layout for space-constrained portable devices while maintaining thermal performance (θJA = 32 °C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VDDA, VDDIO2 | Core, analog, and I/O power supplies | Three independent supply domains allow mixed-voltage I/O interfacing and analog noise isolation; VDDIO2 supports 1.08–3.6 V for flexible peripheral voltage scaling. |
| VBAT | Backup domain power | Supplies RTC, 32×32-bit backup registers, and 2 KB backup SRAM during main power loss-enables timekeeping and state retention without external capacitor. |
| NRST | Active-low reset input | Asynchronous reset with internal pull-up; accepts 1.65–5.5 V logic-compatible with diverse reset supervisor ICs and push-button circuits. |
| PA0–PA15, PB0–PB15, etc. | General-purpose I/Os | Up to 136 fast I/Os with interrupt capability; most support 5 V tolerance and multiple alternate functions (e.g., USART, SPI, TIM, ADC)-reduces need for level shifters in mixed-voltage systems. |
| UCPD1_DB, UCPD1_CC1 | USB Type-C CC line interface | Dedicated pins for USB Power Delivery communication and role negotiation-eliminates external transceiver for USB-C port control in portable chargers and docking stations. |
| PC13–PC15 | RTC/LSE oscillator inputs | Support 32.768 kHz crystal connection with built-in load capacitance-enables precise real-time clock operation without external capacitors. |
Key Features
| Feature | Design Value |
|---|---|
| LPBAM (Low-Power Background Autonomous Mode) | Enables DMA-driven peripheral chains (e.g., ADC→DMA→memory) without CPU involvement-even in Stop 2 mode-reducing active time and power by >90% in sensor logging. |
| FlexPowerControl with SMPS | Integrated step-down SMPS replaces external DC-DC converter; achieves 85% efficiency at 100 mA and supports dynamic voltage scaling between 0.95 V and 1.15 V for optimal core performance vs. power trade-off. |
| ART Accelerator with ICACHE/DCACHE | 8 KB instruction cache + 4 KB data cache eliminate flash wait states and accelerate external memory access-critical for running algorithms from PSRAM/NOR in resource-constrained designs. |
| CORDIC + FMAC coprocessors | Hardware-accelerated trigonometric (sin/cos/tan) and filter (IIR/FIR) computations offload CPU-reduces latency in motor control and digital signal processing by up to 10× vs. software implementation. |
| Secure Boot with HDP | Hardware-defined Hide Protection Area isolates root-of-trust code from debug access and runtime modification-prevents firmware rollback and unauthorized bootloader replacement in certified medical devices. |
Applications
| Industrial Predictive Maintenance Sensor | Portable Medical ECG Monitor |
|---|---|
Use Scenario: Wireless vibration and temperature node deployed on rotating machinery, sampling every 5 seconds and transmitting alerts via BLE when anomaly thresholds are exceeded. IC Role / Device Role / Timing Role: Main system controller executing sensor fusion (ADC + op-amp + CORDIC), managing LPBAM-triggered acquisition, and handling secure OTA updates via TF-M. Use Value: 160 nA Shutdown current extends 2xAA battery life to >5 years; dual 14-/12-bit ADCs capture high-fidelity waveforms without CPU wake-up; TrustZone isolates BLE stack from sensor firmware. | Use Scenario: Wearable ECG patch acquiring 3-lead biopotential signals, performing real-time QRS detection, and storing 24-hour waveform history in encrypted SRAM. IC Role / Device Role / Timing Role: Analog front-end controller with programmable gain op-amps, oversampling ADC, and secure cryptographic engine for HIPAA-compliant data encryption before Bluetooth transmission. Use Value: 1.9 µA Stop 3 mode preserves 16 KB SRAM context during sleep intervals; 2 op-amps with PGA enable adjustable gain for varying skin-electrode impedance; 512-byte OTP stores device-specific keys. |
| Smart Building Occupancy Controller | USB-C Powered IoT Gateway |
Use Scenario: Battery-powered PIR + ambient light sensor node controlling HVAC and lighting based on occupancy patterns, communicating via LoRaWAN. IC Role / Device Role / Timing Role: Ultra-low-power coordinator managing autonomous timer-triggered ADC sampling, event-driven wake-up, and secure sensor data signing using HASH + TRNG. Use Value: 530 nA Standby+RTC enables multi-year operation on coin cell; 22 capacitive sensing channels support touch-based UI; ULPMark™-CP score of 450 validates energy efficiency across benchmark workloads. | Use Scenario: Compact gateway aggregating Zigbee/Z-Wave sensors and exposing them via USB-C host interface to laptops or tablets for configuration and firmware update. IC Role / Device Role / Timing Role: Dual-role USB-C controller (UCPD) managing power negotiation (up to 100 W), data role switching (DFP/UFP), and embedded PD policy engine-no external PD controller required. Use Value: Integrated UCPD eliminates discrete USB-C PD IC, reducing BOM count and PCB area; supports USB PD 3.0 with Programmable Power Supply (PPS); 133000 SecureMark™-TLS enables fast TLS handshake for secure cloud onboarding. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ultra-low-power secure MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32L562ZEJ6 | Same Cortex-M33 + TrustZone, but 512 KB Flash, 256 KB SRAM, no UCPD or CAN FD; lower max clock (110 MHz) | Lacks USB-C PD and CAN FD interfaces; suited for simpler secure sensor nodes without high-speed wired connectivity | Select when USB-C or automotive bus integration is unnecessary and cost-sensitive BOM optimization is prioritized. |
| NXP LPC55S69JBD100 | Cortex-M33 + TrustZone, 640 KB Flash, 320 KB SRAM, no SMPS, higher active current (25 µA/MHz), no LPBAM | No autonomous low-power peripheral chaining; requires CPU wake-up for all ADC/DMA operations-limits battery lifetime in duty-cycled apps | Choose only if existing NXP toolchain familiarity outweighs 3× higher active power and absence of hardware-accelerated low-power modes. |
Compared with STM32L562ZEJ6, the STM32U575ZIT3Q adds USB-C PD, CAN FD, larger memory, and superior low-power autonomy; versus LPC55S69JBD100, it delivers 4.5× better ULPMark™-CP score and integrated SMPS-making it the only choice for multi-year battery life with rich wired/wireless connectivity.
Availability
STM32U575ZIT3Q is available at Aetrix Electronics and suitable for industrial predictive maintenance sensors, portable medical monitors, smart building controllers, and USB-C-powered IoT gateways requiring stable component supply across long-lifecycle deployments.
Supply support for STM32U575ZIT3Q includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and analog components for industrial, automotive, and consumer markets.
The STM32U5 series targets ultra-low-power, high-security embedded applications-combining Arm TrustZone with ST's proprietary FlexPowerControl and LPBAM architecture to enable decade-long battery operation in certified edge devices.
FAQ
What is the maximum operating temperature range for STM32U575ZIT3Q?
The STM32U575ZIT3Q is rated for –40 °C to +125 °C operation, validated per DS13737 Rev 10 Section 5.3.1. This extended industrial temperature grade enables deployment in harsh environments such as motor drives, outdoor infrastructure, and under-hood automotive modules-without derating performance or reliability.
Does STM32U575ZIT3Q support hardware-based secure boot with anti-rollback protection?
Yes. The device implements secure boot from ROM with Root of Trust, including hardware-enforced anti-rollback via RDP (Readout Protection) levels and secure hide protection area (HDP). Boot entry is fixed and immutable; firmware images must be cryptographically signed and verified before execution-preventing unauthorized or downgraded firmware loading.
Can the STM32U575ZIT3Q operate from a single 1.8 V supply?
No. The core voltage (VCORE) requires 1.71–3.6 V, but the I/Os support independent supply down to 1.08 V. For 1.8 V system design, VDDIO2 can be set to 1.8 V while VCORE operates at minimum 1.71 V-enabling interoperability with 1.8 V logic families without level shifters, provided core voltage meets specification.
How many wake-up pins are available in Shutdown mode?
The STM32U575ZIT3Q provides 24 dedicated wake-up pins in Shutdown mode, as confirmed in DS13737 Rev 10 Section 3.9.3. These include all GPIOs configurable as EXTI lines, plus dedicated pins like RTC_ALARM and TAMPER-allowing flexible, low-latency event-driven wake-up from the lowest power state without external circuitry.
STM32U575ZIT3Q Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- -
- Series:
- -
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
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- Core Size:
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- Speed:
- -
- Connectivity:
- -
- Peripherals:
- -
- Number of I/O:
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- Program Memory Size:
- -
- Program Memory Type:
- -
- EEPROM Size:
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- RAM Size:
- -
- Voltage - Supply (Vcc/Vdd):
- -
- Data Converters:
- -
- Oscillator Type:
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- Operating Temperature:
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- Grade:
- -
- Qualification:
- -
- Mounting Type:
- -
- Supplier Device Package:
STM32U575ZIT3Q FAQ
1.How can I place an order for STM32U575ZIT3Q through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32U575ZIT3Q on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32U575ZIT3Q reliable?
The price and inventory of STM32U575ZIT3Q are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32U575ZIT3Q is usually 5 days.
3.What payment methods are accepted for STM32U575ZIT3Q?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32U575ZIT3Q transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32U575ZIT3Q?
STM32U575ZIT3Q orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32U575ZIT3Q order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32U575ZIT3Q?
For technical support, including STM32U575ZIT3Q datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32U575ZIT3Q requirements.
6.How does Aetrix verify that STM32U575ZIT3Q is sourced from the original manufacturer or authorized distributors?
All STM32U575ZIT3Q products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32U575ZIT3Q meets industry standards.
7.What is the process for return or replacement of STM32U575ZIT3Q?
All STM32U575ZIT3Q units undergo pre-shipment inspection (PSI). If there is an issue with STM32U575ZIT3Q, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32U575ZIT3Q part is unused and in its original packaging.
Return procedure for STM32U575ZIT3Q:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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