STMicroelectronics STM32U585AII6Q

Overview

STM32U585AII6Q from STMicroelectronics is an ultra-low-power Arm® Cortex®-M33 32-bit microcontroller with TrustZone® and FPU, delivering 240 DMIPS at up to 160 MHz. It integrates 2 MB Flash (with ECC), 786 KB SRAM, hardware crypto accelerators (AES, PKA, HASH, RNG), and supports LPBAM autonomous peripheral operation down to Stop 2 mode. It targets secure, battery-powered IoT edge nodes requiring real-time sensing, encrypted connectivity, and long-term firmware integrity.

For engineers reviewing the STM32U585AII6Q datasheet, STM32U585AII6Q pinout, STM32U585AII6Q application, or STM32U585AII6Q equivalent, key selection criteria include TrustZone-certified secure boot, ULPMark™-CP score of 450, 160 nA Shutdown current, dual Octo-SPI interfaces for external code/data, and integrated SMPS for dynamic voltage scaling in energy-constrained designs.

Technical Context

The device implements a dual-bank Flash architecture enabling read-while-write operations and secure firmware updates via Secure Firmware Installation (SFI). Its TrustZone-enabled memory protection unit (MPU) enforces strict isolation between secure and non-secure worlds, with dedicated GTZC controllers managing peripheral security attribution.

Power management leverages FlexPowerControl with embedded SMPS and LDO, supporting on-the-fly switching and voltage scaling across Run, Stop 2/3, Standby, and Shutdown modes. The low-power background autonomous mode (LPBAM) enables DMA-driven peripheral chains-including ADC, DAC, timers, and communication interfaces-without CPU intervention, even in Stop 2.

Key Specifications

Pinout & Package

STM32U585AII6Q is packaged in UFQFPN48 (7 × 7 mm, 0.5 mm pitch), a compact, thermally enhanced quad flat no-lead package suitable for space-constrained industrial and portable applications. Pin functions are validated per STMicroelectronics DS13086 Rev 10, Section 4.2.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar ultra-low-power secure MCU applications.

Compared with STM32L562VEJ6 and LPC55S69JBD100, the STM32U585AII6Q delivers superior ultra-low-power autonomy (LPBAM), higher memory density, integrated SMPS for dynamic efficiency, and PSA Level 3/SESIP3 certification - making it optimal for battery-powered, field-deployed secure edge nodes demanding long life and robust firmware integrity.

Availability

STM32U585AII6Q is available at Aetrix Electronics and suitable for smart utility meters, industrial predictive maintenance sensors, medical wearables, and secure edge gateways requiring stable component supply across multi-year production cycles.

Supply support for STM32U585AII6Q includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and analog components for industrial, automotive, and consumer markets.

The STM32U5 series is ST's flagship ultra-low-power, secure MCU product line targeting battery-operated IoT endpoints, medical wearables, and industrial edge devices where energy efficiency, cryptographic assurance, and long-term firmware trust are critical design requirements.

FAQ

What is the maximum operating temperature range for STM32U585AII6Q?

The STM32U585AII6Q is rated for industrial operation from –40 °C to +85 °C, with extended variants supporting up to +125 °C. This range is validated per DS13086 Rev 10, Section 5.3.1, and applies to all package types including the UFQFPN48 variant. Thermal derating begins above 85 °C ambient, requiring appropriate PCB thermal design for sustained high-frequency operation.

Does STM32U585AII6Q support USB Type-C Power Delivery negotiation?

Yes - the integrated UCPD (USB Type-C Power Delivery) controller supports full PD 3.0 negotiation, including programmable power supply (PPS), role swapping (DFP/UFP), and vendor-defined messages (VDMs). It operates independently of the main CPU and can manage power contracts while the system remains in Stop 2 mode, enabling always-on charging port intelligence.

How does the LPBAM feature reduce system power consumption?

LPBAM enables peripherals (e.g., ADC, timers, UART) to operate autonomously via GPDMA/LPDMA without CPU involvement, even in Stop 2 mode. For example, an ADC configured in LPBAM mode can sample, store results in SRAM, and trigger UART transmission - all while the CPU sleeps. This eliminates wake-up latency and CPU leakage, achieving up to 70% lower average current in sensor-logging applications.

Is the 2 MB Flash memory organized in dual banks with read-while-write capability?

Yes - the 2 MB Flash is split into two independent banks (Bank 1: 1 MB, Bank 2: 1 MB), each supporting simultaneous read and write operations. This architecture enables seamless firmware updates: one bank executes active code while the other receives and verifies new firmware, ensuring zero-downtime field upgrades and robust rollback mechanisms.