STMicroelectronics STM32U585RIT3TR
- Part No.:
- STM32U585RIT3TR
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 64-LQFP
- Datasheet:
-
STM32U585RIT3TR.pdf
- Description:
- IC MCU 32BIT 2MB FLASH 64LQFP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
STM32U585RIT3TR from STMicroelectronics is an ultra-low-power Arm® Cortex®-M33 32-bit MCU with TrustZone® and FPU, delivering 240 DMIPS at up to 160 MHz. It integrates 2 MB Flash (with ECC), 786 KB SRAM (722 KB with ECC ON), and hardware crypto accelerators (AES, PKA, HASH, RNG). Designed for secure, battery-constrained edge nodes, it supports LPBAM autonomous peripheral operation down to Stop 2 mode and achieves 19.5 µA/MHz in Run mode at 3.3 V.
For engineers reviewing the STM32U585RIT3TR datasheet, STM32U585RIT3TR pinout, STM32U585RIT3TR application, or STM32U585RIT3TR equivalent, key selection criteria include TrustZone-enabled secure boot, sub-µA low-power modes (160 nA Shutdown, 530 nA Standby with RTC), dual Octo-SPI interfaces, CAN FD, USB Type-C/USB PD controller, and 14-bit 2.5-Msps ADC with hardware oversampling.
Technical Context
The STM32U585RIT3TR implements a dual-bank Flash architecture enabling read-while-write operations and supports TrustZone-enforced secure/non-secure memory partitioning with configurable privilege levels. Its FlexPowerControl system combines embedded LDO and SMPS step-down converter with dynamic voltage scaling and on-the-fly switching.
It features three independent PLLs (system, USB/audio, ADC), ART Accelerator with 8-KB instruction cache and 4-KB data cache, and dual DMA controllers (GPDMA/LPDMA) functional in Stop mode. The device includes two 14-/12-bit ADCs-ADC1 operating autonomously in Stop 2-and hardware-accelerated math units (CORDIC, FMAC) for real-time signal processing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M33 with TrustZone, FPU, MPU, 240 DMIPS @ 160 MHz |
| Flash Memory | 2 MB with ECC, dual-bank RWW, 100 kcycle endurance for 512 KB section |
| SRAM | 786 KB total: 722 KB with optional ECC (up to 322 KB), 16 KB retained in Stop 3 |
| Low-Power Performance | 160 nA Shutdown (24 wake-up pins), 530 nA Standby with RTC, 1.9 µA Stop 3 with 16 KB SRAM |
| Analog Peripherals | 14-bit 2.5-Msps ADC1 (autonomous in Stop 2), 12-bit 2.5-Msps ADC4, 2×12-bit DAC, 2×OPAMP, 2×comparator |
| Security | PSA Level 3 & SESIP3 certified; TrustZone I/O/mem/peripheral isolation; Secure Boot; HUK; SFI; OTFDEC for Octo-SPI |
| Connectivity | CAN FD, USB OTG FS, USB Type-C/USB PD controller (UCPD), 6×U(S)ART, 4×I²C, 3×SPI, 2×SAI, 2×SDMMC |
Pinout & Package
STM32U585RIT3TR is housed in a 64-pin LQFP64 (10 × 10 mm) package with exposed thermal pad. Pin functions are defined across five voltage domains (VDD/VSS, VDDA/VSSA, VREF+, VBAT, VDDIO2), supporting flexible I/O supply (1.08–3.6 V) and 5 V-tolerant operation on most pins.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VSS | Main power supply and ground | Core logic supply (1.71–3.6 V); supports SMPS/LDO regulation and dynamic voltage scaling |
| VDDA, VSSA | Analog domain power and ground | Independent 1.62–3.6 V supply for ADC/DAC/OPAMP; enables noise-isolated analog operation |
| VREF+ | Analog reference input | External reference for ADC/DAC; internal 2.5 V reference available when not used |
| VBAT | Backup domain supply | Powers RTC, 32×32-bit backup registers, and 2 KB backup SRAM during main power loss |
| PA0–PA15, PB0–PB15, etc. | General-purpose I/Os | Up to 136 fast I/Os; most 5 V-tolerant; 14 support independent VDDIO2 (down to 1.08 V) |
| NRST | Active-low reset input | Asynchronous reset with Schmitt trigger; supports external pull-up and debouncing |
| BOOT0 | Boot mode selection | High at power-up selects system memory bootloader; controlled via option bytes or external circuit |
Key Features
| Feature | Design Value |
|---|---|
| LPBAM Autonomous Mode | Enables peripherals (ADC, timers, SPI) to operate without CPU intervention in Stop 2, reducing active time and energy use |
| TrustZone + GTZC | Hardware-enforced separation of secure/non-secure code/data; global trust zone controller manages peripheral security attribution |
| Octo-SPI Dual Interface | Two independent OCTOSPI controllers support XIP, on-the-fly decryption (OTFDEC), and high-bandwidth external memory expansion |
| Secure Root Services (RSS) | Embedded immutable services enable secure firmware installation (SFI), attestation, and key provisioning without external secure element |
| Ultra-Low-Power Timers | Four LPTIMs remain active in Stop modes, enabling precise timing (e.g., sensor sampling intervals) with sub-µA current draw |
| Chrom-ART Accelerator (DMA2D) | Hardware 2D graphics engine offloads CPU for GUI rendering, image blending, and format conversion in HMI applications |
Applications
| Smart Utility Meter | Industrial Wireless Sensor Node |
|---|---|
Use Scenario: Battery-powered electricity/water/gas meter with metrology, RF communication, and tamper detection. IC Role / Device Role / Timing Role: Main application processor executing metrology algorithms, managing secure OTA updates, and controlling RF transceiver timing via LPTIMs. Use Value: 530 nA Standby with RTC enables >15-year battery life; TrustZone isolates metrology firmware from communication stack; AES/PKA accelerates DLMS/COSEM security. |
Use Scenario: Self-powered condition-monitoring node on rotating machinery using vibration, temperature, and acoustic sensors. IC Role / Device Role / Timing Role: Real-time signal acquisition hub with autonomous ADC+DMA+LPTIM sequence triggering, local FFT preprocessing via CORDIC/FMAC. Use Value: LPBAM allows continuous sensor sampling in Stop 2 mode; 14-bit ADC + hardware oversampling achieves <100 µV ENOB; ultra-low leakage preserves supercapacitor charge. |
| Secure Medical Wearable | USB-C Power Delivery Accessory |
Use Scenario: ECG/PPG patch with clinical-grade biosignal acquisition, Bluetooth LE, and HIPAA-compliant data encryption. IC Role / Device Role / Timing Role: Secure sensor fusion controller with isolated secure boot, encrypted SRAM storage, and synchronized ADC/OPAMP sampling. Use Value: PSA Level 3 certification validates cryptographic integrity; 2×OPAMP + PGA enables low-noise front-end gain; VBAT retention preserves session state during battery swap. |
Use Scenario: USB-C wall adapter or power bank with programmable voltage/current negotiation and safety monitoring. IC Role / Device Role / Timing Role: UCPD controller managing PD policy engine, CC line detection, VBUS discharge control, and fault response within <100 µs. Use Value: Integrated UCPD PHY eliminates external transceiver; hardware CRC and secure OTP store vendor-defined PD contracts; 160 nA Shutdown minimizes no-load power loss. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ultra-low-power secure MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32U575RIT6 | Same core and peripherals but 1 MB Flash, 512 KB SRAM, no UCPD controller, lower crypto acceleration (no second AES) | Lacks USB-C PD control and reduced secure storage capacity; suitable for cost-sensitive non-PD designs | Select when USB-C PD functionality is unnecessary and BOM cost reduction is prioritized over future-proofing |
| NXP LPC55S69JBD100 | Arm Cortex-M33, 640 KB Flash, 320 KB SRAM, no TrustZone-certified boot ROM, single AES accelerator, no Octo-SPI | Requires external secure element for PSA Level 3; lacks autonomous low-power peripherals and external memory bandwidth | Choose only if existing NXP toolchain investment outweighs STM32U585's integrated security and LPBAM advantages |
Compared with STM32U575RIT6, the STM32U585RIT3TR adds USB-C PD control, doubled Flash/SRAM, dual AES, and OTFDEC-critical for field-upgradable secure accessories. Against LPC55S69JBD100, it delivers certified root-of-trust, higher memory bandwidth, and hardware-orchestrated low-power autonomy without external components.
Availability
STM32U585RIT3TR is available at Aetrix Electronics and suitable for smart utility meters, industrial wireless sensor nodes, secure medical wearables, and USB-C power delivery accessories requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for STM32U585RIT3TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power ICs, sensors, and automotive semiconductors since 1987.
The STM32U5 series targets ultra-low-power, security-critical edge applications-including battery-operated IoT endpoints and industrial gateways-by integrating Arm TrustZone, PSA-certified firmware services, and sub-µA power modes without sacrificing performance or peripheral richness.
FAQ
What is the maximum operating frequency and corresponding DMIPS rating?
The STM32U585RIT3TR runs at up to 160 MHz with the ART Accelerator enabled, achieving 240 DMIPS (1.5 DMIPS/MHz). This performance is sustained with zero-wait-state execution from Flash due to the 8-KB instruction cache, and verified per Dhrystone 2.1 benchmark in production conditions.
Does this MCU support hardware-based secure boot and runtime attestation?
Yes. It implements a certified secure boot chain anchored in immutable ROM code, validated root of trust, and secure hide protection area (HDP). Secure firmware installation (SFI) and runtime attestation are enabled via embedded Root Secure Services (RSS), meeting PSA Level 3 and SESIP3 requirements.
How many low-power modes are supported, and what is the lowest current consumption?
The device supports seven low-power modes: Shutdown (160 nA), Standby (210 nA), Standby with RTC (530 nA), Stop 3 (1.9 µA with 16 KB SRAM), Stop 2 (4.0 µA with 16 KB SRAM), and two Run modes with voltage scaling. All values are measured at 25 °C, 3.3 V, with RTC and backup registers active where applicable.
Is the UCPD (USB Type-C Power Delivery) controller fully integrated, or does it require external components?
The UCPD controller is fully integrated, including physical layer (PHY), CC line detection, VCONN switch, VBUS discharge FET driver, and PD policy engine. No external transceiver or discrete PD controller IC is required-only passive components (resistors, capacitors) and a VBUS sense resistor are needed for full USB-C PD 3.0 compliance.
STM32U585RIT3TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 64-LQFP
- Series:
- STM32U5
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-M33
- Core Size:
- 32-Bit
- Speed:
- 160MHz
- Connectivity:
- CANbus, I2C, IrDA, LINbus, MMC/SD/SDIO, SAI, SmartCard, SPDIF, SPI, UART/USART, USB, USB OTG
- Peripherals:
- Brown-out Detect/Reset, DMA, LCD, Motor Control PWM, POR, PWM, WDT
- Number of I/O:
- 51
- Program Memory Size:
- 2MB (2M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 784K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 3.6V
- Data Converters:
- A/D 17x12/14b SAR; D/A 2x12b
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32U585RIT3TR FAQ
1.How can I place an order for STM32U585RIT3TR through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32U585RIT3TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32U585RIT3TR reliable?
The price and inventory of STM32U585RIT3TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32U585RIT3TR is usually 5 days.
3.What payment methods are accepted for STM32U585RIT3TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32U585RIT3TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32U585RIT3TR?
STM32U585RIT3TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32U585RIT3TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32U585RIT3TR?
For technical support, including STM32U585RIT3TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32U585RIT3TR requirements.
6.How does Aetrix verify that STM32U585RIT3TR is sourced from the original manufacturer or authorized distributors?
All STM32U585RIT3TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32U585RIT3TR meets industry standards.
7.What is the process for return or replacement of STM32U585RIT3TR?
All STM32U585RIT3TR units undergo pre-shipment inspection (PSI). If there is an issue with STM32U585RIT3TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32U585RIT3TR part is unused and in its original packaging.
Return procedure for STM32U585RIT3TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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