My Inquiry
My Account
STMicroelectronics STM32U585VIT6QTR
- Part No.:
- STM32U585VIT6QTR
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 100-LQFP
- Datasheet:
-
STM32U585VIT6QTR.pdf
- Description:
- IC MCU 32BIT 2MB FLASH 100LQFP
- Quantity:
- Payment:
- Shipping:
Inventory:2,523
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
STM32U585VIT6QTR from STMicroelectronics is an ultra-low-power Arm® Cortex®-M33 32-bit microcontroller with TrustZone® and FPU, delivering 240 DMIPS at up to 160 MHz. It integrates 2 MB Flash (with ECC), 786 KB SRAM, hardware crypto accelerators (AES, PKA, HASH), and supports LPBAM autonomous peripheral operation down to Stop 2 mode. It is deployed in battery-powered industrial sensors requiring secure firmware updates and real-time analog acquisition.
For engineers reviewing the STM32U585VIT6QTR datasheet, STM32U585VIT6QTR pinout, STM32U585VIT6QTR application, or STM32U585VIT6QTR equivalent, key selection criteria include TrustZone-certified secure boot, sub-µA low-power modes (160 nA Shutdown), dual 14-/12-bit ADCs with Stop 2 autonomy, Octo-SPI on-the-fly decryption, and UCPD USB Type-C/Power Delivery controller integration.
Technical Context
The device implements Arm TrustZone for system-wide hardware isolation between secure and non-secure firmware domains, enforced by GTZC and securable peripherals. Its FlexPowerControl architecture enables dynamic voltage scaling via integrated SMPS and LDO, with four distinct low-power modes (Shutdown, Standby, Stop 2, Stop 3) each preserving specific memory and peripheral states.
Core timing relies on three PLLs (system, USB, audio/ADC), dual crystal oscillators (4–50 MHz HSE + 32 kHz LSE), and autotrimmed internal oscillators (±0.25% accuracy). The ART Accelerator includes 8 KB instruction cache and 4 KB data cache, enabling zero-wait-state execution from Flash and external memories.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M33 with TrustZone, FPU, MPU, DSP extensions - enables secure real-time control with cryptographic offload |
| Max Clock / Performance | 160 MHz / 240 DMIPS - supports high-throughput sensor fusion and audio processing without external co-processor |
| Memory | 2 MB Flash (ECC, RWW), 786 KB SRAM (ECC OFF) - sufficient for OTA-upgradable secure firmware + large buffer storage |
| Low-Power Modes | 160 nA Shutdown, 530 nA Standby+RTC - extends 10-year battery life in wireless sensor nodes |
| Analog Peripherals | 14-bit 2.5-Msps ADC (autonomous in Stop 2), dual 12-bit DAC, 2 OPAMPs, 2 comparators - enables precision local signal conditioning without waking core |
| Security | PSA Level 3 & SESIP3 certified; embedded Root Secure Services (RSS); HUK; TF-M support - meets IEC 62443-3-3 SL2 requirements for industrial edge devices |
| Connectivity | 1x CAN FD, 1x USB OTG FS, 1x UCPD, 6x USART, 4x I²C, 2x SAI - supports mixed wired/wireless industrial gateway topologies |
Pinout & Package
STM32U585VIT6QTR uses a 100-pin LQFP package (14 × 14 mm, pitch 0.5 mm), designated as part number code '1L' per ST's package documentation. This variant provides full peripheral availability including all 136 GPIOs (14 with independent 1.08 V supply), dual Octo-SPI interfaces, and complete analog subsystem routing.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VDDA, VDDIO2 | Main, analog, and I/O power supplies | Independent 1.71–3.6 V domains enable noise-isolated ADC operation and flexible I/O voltage translation |
| VSS, VSSA, VSSIO2 | Ground references | Dedicated analog and I/O ground planes minimize coupling into sensitive measurement paths |
| PA0–PA15, PB0–PB15, etc. | General-purpose I/Os | Up to 136 pins with interrupt capability; most 5V-tolerant; 14 support independent 1.08 V supply for ultra-low-voltage interface |
| PC13–PC15 | RTC/LSE domain pins | Support 32.768 kHz crystal or external clock for calendar RTC with VBAT backup retention |
| PD0–PD1 | OCTOSPI1 DQS/D0 | Enable high-speed octal SPI interface to external PSRAM/NOR with on-the-fly decryption (OTFDEC) |
| PE2–PE7 | UCPD1 CC1/CC2/VCONN/DP/DM | Hardware USB Type-C port controller with Power Delivery negotiation - no external transceiver required |
Key Features
| Feature | Design Value |
|---|---|
| LPBAM (Low-Power Background Autonomous Mode) | Permits DMA-driven peripheral chains (e.g., ADC → memory → timer trigger) while CPU remains in Stop 2 - eliminates wake-up latency for periodic sensing |
| TrustZone + GTZC | Hardware-enforced isolation of secure boot, crypto keys, and firmware partitions - prevents runtime tampering and side-channel leakage |
| ART Accelerator with ICACHE/DCACHE | Enables deterministic 0-wait-state execution from Flash at 160 MHz and efficient access to external Octo-SPI memories - reduces power vs. external RAM |
| Secure Firmware Installation (SFI) | Uses embedded RSS to validate and install signed firmware images - eliminates need for external secure element in field-deployed updates |
| On-the-fly Decryption (OTFDEC) | Decrypts external Octo-SPI NOR/PSRAM contents transparently during read - protects firmware IP without performance penalty |
Applications
| Industrial Wireless Sensor Node | Secure Edge Gateway |
|---|---|
Use Scenario: Battery-powered vibration/temperature node in predictive maintenance system, transmitting encrypted telemetry every 5 minutes via LoRaWAN. IC Role / Device Role / Timing Role: Primary MCU executing sensor fusion, secure TLS handshake, and LPBAM-triggered ADC sampling - operates autonomously in Stop 2 between transmissions. Use Value: 160 nA Shutdown and 530 nA Standby+RTC enable >10-year coin-cell operation; TrustZone isolates BLE stack from sensor firmware. | Use Scenario: DIN-rail mounted gateway aggregating Modbus RTU, CAN FD, and Ethernet traffic for cloud upload with local policy enforcement. IC Role / Device Role / Timing Role: Central secure host managing multiple protocol stacks, performing OTA validation, and enforcing firewall rules via hardware-accelerated crypto. Use Value: Dual AES coprocessors and PKA accelerate TLS 1.3 handshakes; UCPD manages USB-C debug port with password-protected access. |
| Medical Wearable Monitor | Smart Energy Meter |
Use Scenario: ECG/PPG patch continuously acquiring biopotentials, storing raw waveforms locally, and uploading anonymized features via Bluetooth LE. IC Role / Device Role / Timing Role: Real-time signal processor running CORDIC/FMAC for QRS detection and FFT; ADC4 acquires 12-bit data autonomously in Stop 2 mode. Use Value: 4.3 µA Stop 3 with full SRAM retains 30 seconds of waveform history; HUK ensures patient data encryption keys are never exposed in software. | Use Scenario: Revenue-grade meter with anti-tamper detection, metrology ADC, and secure remote firmware update over PLC or NB-IoT. IC Role / Device Role / Timing Role: Metrology controller interfacing with isolated sigma-delta ADCs, managing tamper logs in backup SRAM, and validating signed firmware patches. Use Value: Active tampers detect enclosure breach and erase keys; 96-bit unique ID enables per-device certificate binding for utility backend authentication. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ultra-low-power secure MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32U575ZIT6 | Same core, 1 MB Flash, 512 KB SRAM, no UCPD, no Octo-SPI, lower crypto acceleration (single AES) | Lacks USB-C PD control and external memory decryption - unsuitable for gateways requiring secure external code storage | Select when cost-sensitive designs omit USB-C and external PSRAM/NOR expansion |
| NXP LPC55S69JBD100 | Arm Cortex-M33, 640 KB Flash, 320 KB SRAM, no TrustZone-certified bootloader, no LPBAM, higher active current (25 µA/MHz) | No hardware-enforced secure boot lifecycle; lacks autonomous peripheral chaining - requires software-managed low-power sequencing | Select only if existing NXP toolchain investment outweighs security certification and ultra-low-power advantages |
Compared with STM32U575ZIT6 and LPC55S69JBD100, the STM32U585VIT6QTR uniquely combines PSA Level 3 certification, LPBAM, UCPD, and OTFDEC - making it the only option for battery-powered gateways requiring both field-upgradable secure firmware and USB-C host functionality.
Availability
STM32U585VIT6QTR is available at Aetrix Electronics and suitable for industrial wireless sensor nodes, secure edge gateways, medical wearables, and smart energy meters requiring stable component supply across multi-year production cycles.
Supply support for STM32U585VIT6QTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, specializing in microcontrollers, power management, and automotive ICs with strong focus on energy efficiency and functional safety.
The STM32U5 series targets ultra-low-power secure IoT endpoints, combining Arm TrustZone with ST's FlexPowerControl and hardware crypto engines to meet PSA Level 3 and SESIP3 certification requirements for industrial and medical edge devices.
FAQ
What is the maximum operating temperature range for STM32U585VIT6QTR?
The STM32U585VIT6QTR is rated for –40 °C to +125 °C operation, validated per DS13086 Rev 10 Section 5.3.1. This extended grade supports deployment in harsh industrial environments such as motor control cabinets and outdoor utility enclosures where ambient temperatures exceed +85 °C.
Does STM32U585VIT6QTR support hardware-based secure boot with root-of-trust?
Yes. It implements a hardware root of trust via unique boot entry, secure hide protection area (HDP), and factory-programmed 96-bit unique ID. Secure boot is enforced by TrustZone and GTZC, with RDP level 2 preventing debug access to secure firmware - certified to PSA Level 3 and SESIP3 Assurance Target.
Can the 14-bit ADC operate autonomously in low-power modes?
Yes. ADC1 supports hardware oversampling and can acquire samples autonomously in Stop 2 mode using LPDMA and timer triggers, retaining results in 16-KB SRAM. This enables periodic sensor sampling without CPU wake-up, reducing average system current to sub-µA levels.
Is the UCPD peripheral capable of full USB Type-C Power Delivery negotiation?
Yes. The integrated UCPD controller handles full USB Type-C v1.4 specification compliance, including SOP'/SOP" packet exchange, VCONN switching, and Power Delivery 3.0 message parsing - eliminating need for external UCPD transceivers in portable diagnostic or charging applications.
STM32U585VIT6QTR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 100-LQFP
- Series:
- STM32U5
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-M33
- Core Size:
- 32-Bit
- Speed:
- 160MHz
- Connectivity:
- CANbus, I2C, IrDA, LINbus, MMC/SD/SDIO, SAI, SmartCard, SPDIF, SPI, UART/USART, USB, USB OTG
- Peripherals:
- Brown-out Detect/Reset, DMA, LCD, Motor Control PWM, POR, PWM, WDT
- Number of I/O:
- 79
- Program Memory Size:
- 2MB (2M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 784K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 3.6V
- Data Converters:
- A/D 18x12/14b SAR; D/A 2x12b
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32U585VIT6QTR FAQ
1.How can I place an order for STM32U585VIT6QTR through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32U585VIT6QTR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32U585VIT6QTR reliable?
The price and inventory of STM32U585VIT6QTR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32U585VIT6QTR is usually 5 days.
3.What payment methods are accepted for STM32U585VIT6QTR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32U585VIT6QTR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32U585VIT6QTR?
STM32U585VIT6QTR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32U585VIT6QTR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32U585VIT6QTR?
For technical support, including STM32U585VIT6QTR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32U585VIT6QTR requirements.
6.How does Aetrix verify that STM32U585VIT6QTR is sourced from the original manufacturer or authorized distributors?
All STM32U585VIT6QTR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32U585VIT6QTR meets industry standards.
7.What is the process for return or replacement of STM32U585VIT6QTR?
All STM32U585VIT6QTR units undergo pre-shipment inspection (PSI). If there is an issue with STM32U585VIT6QTR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32U585VIT6QTR part is unused and in its original packaging.
Return procedure for STM32U585VIT6QTR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
STM32U585VIT6QTR Tags
-
ATTINY4-TSHR
Microchip Technology
-
ATTINY10-TSHR
Microchip Technology
-
ATTINY10-TS8R
Microchip Technology
-
ATTINY202-SSNR
Microchip Technology
-
ATTINY202-SSFR
Microchip Technology
-
ATTINY402-SSNR
Microchip Technology
-
PIC16F15213T-I/MF
Microchip Technology
-
PIC16F15213-E/MF
Microchip Technology
-
PIC10F200T-I/OT
Microchip Technology
-
ATTINY412-SSNR
Microchip Technology
-
PIC10F202T-I/OT
Microchip Technology
-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
