STMicroelectronics STM32U585ZIT6Q

Overview

STM32U585ZIT6Q from STMicroelectronics is an ultra-low-power Arm® Cortex®-M33 32-bit MCU with TrustZone®, FPU, and 240 DMIPS performance, featuring 2 MB Flash (ECC), 786 KB SRAM, and hardware crypto accelerators (AES, PKA, HASH, RNG). It operates from 1.71–3.6 V across –40 °C to +125 °C and delivers 4.3 µA Stop 3 mode with full SRAM retention-enabling battery-powered industrial sensors and secure IoT edge nodes.

For engineers reviewing the STM32U585ZIT6Q datasheet, STM32U585ZIT6Q pinout, STM32U585ZIT6Q application, or STM32U585ZIT6Q equivalent, key selection criteria include TrustZone-enabled secure boot, LPBAM autonomous peripheral operation in Stop 2 mode, dual Octo-SPI interfaces for encrypted external memory, and 14-bit ADC at 2.5 Msps with hardware oversampling.

Technical Context

The device implements Arm TrustZone for system-wide hardware isolation between secure and non-secure firmware domains, enforced by GTZC controllers for memory, peripherals, and I/Os. Its FlexPowerControl architecture enables low-power background autonomous mode (LPBAM) using DMA-driven peripheral chains that remain functional down to Stop 2 mode without CPU intervention.

Core timing relies on three PLLs (system, USB, audio/ADC), dual oscillators (4–50 MHz HSE + 32 kHz LSE), and clock recovery (CRS) synchronized to USB SOF. The ART Accelerator includes 8 KB instruction cache and 4 KB data cache, enabling zero-wait-state execution at up to 160 MHz from Flash or external memories.

Key Specifications

Pinout & Package

STM32U585ZIT6Q uses a 144-pin LQFP100 package (14 × 14 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions support dual bank Flash addressing, TrustZone-secured GPIOs, and dedicated crypto peripheral routing (SAES, PKA, HASH).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar ultra-low-power secure MCU applications.

Compared with STM32L562ZEJ6, STM32U585ZIT6Q adds Octo-SPI+OTFDEC for secure external code execution and PSA Level 3 certification-critical for remote firmware updates. Against LPC55S69JBD100, it provides deterministic LPBAM autonomy and lower Stop-mode currents, better suited for energy-constrained edge sensing.

Availability

STM32U585ZIT6Q is available at Aetrix Electronics and suitable for industrial sensor nodes, secure smart meters, medical wearables, and automotive body control modules requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for STM32U585ZIT6Q includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power ICs, sensors, and analog devices for industrial, automotive, and consumer markets.

The STM32U5 series targets ultra-low-power, high-security embedded applications-specifically designed for battery-operated IoT endpoints, certified metering systems, and safety-critical edge devices demanding PSA Level 3 and SESIP3 assurance.

FAQ

What is the maximum operating temperature range for STM32U585ZIT6Q?

The STM32U585ZIT6Q is qualified for operation from –40 °C to +125 °C ambient temperature, validated per AEC-Q100 Grade 2 for automotive use cases and industrial environments with extended thermal stress. This rating applies to all package variants including LQFP100 and UFBGA132.

Does STM32U585ZIT6Q support hardware-based secure boot with root-of-trust?

Yes-it implements a hardware root of trust via unique boot entry, secure hide protection area (HDP), and factory-programmed 96-bit unique ID. Secure firmware installation (SFI) is enabled by embedded Root Secure Services (RSS), supporting verified boot and TF-M-compliant firmware upgrades with AES-256 encryption.

How does LPBAM reduce power consumption in sensor applications?

LPBAM enables autonomous peripheral operation-such as ADC sampling, DMA transfer, and memory write-without CPU involvement, even in Stop 2 mode. This eliminates wake-up latency and active-mode overhead, reducing average current by >60% in periodic sensing tasks compared to polling-based architectures.

Can STM32U585ZIT6Q interface directly with external Octo-SPI NOR flash while maintaining data confidentiality?

Yes-its integrated On-the-Fly Decryption Engine (OTFDEC) performs real-time AES-128/256 decryption of Octo-SPI external memory reads. Keys are stored in secure SRAM or HUK-protected registers, preventing plaintext exposure on the bus and enabling secure code execution from external memory.