STMicroelectronics STM32U595QII6

Overview

STM32U595QII6 from STMicroelectronics is an ultra-low-power Arm® Cortex®-M33 32-bit microcontroller with TrustZone® security, FPU, and 240 DMIPS performance at up to 160 MHz. It integrates 4 MB Flash with ECC, 2.5 MB SRAM (with configurable ECC), LTDC display controller, MIPI® DSI host, Neo-Chrom GPU2D, and dual 14-bit ADCs operating at 2.5 Msps-designed for secure, graphics-rich IoT edge nodes requiring long battery life and real-time sensor fusion.

For engineers reviewing the STM32U595QII6 datasheet, STM32U595QII6 pinout, STM32U595QII6 application, or STM32U595QII6 equivalent, key selection considerations include TrustZone-enabled secure boot, LPBAM autonomous peripheral operation in Stop 2 mode, 150 nA Shutdown current, 16-pin LQFP64 package compatibility, and dual Octo-SPI interface support for external memory expansion.

Technical Context

The STM32U595QII6 implements a dual-bank Flash architecture with read-while-write capability and hardware ECC, enabling safe over-the-air firmware updates. Its FlexPowerControl system supports dynamic voltage scaling between SMPS and LDO regulators, with five low-power modes including Stop 2 (4.65 µA with 40 KB SRAM retained) and Shutdown (150 nA).

TrustZone® partitions memory and peripherals into secure/non-secure worlds, enforced by the Global TrustZone Controller (GTZC); cryptographic acceleration includes HASH, CORDIC, FMAC, and NIST SP800-90B-compliant TRNG. The Neo-Chrom GPU2D and Chrom-ART DMA2D offload 2D graphics rendering from the CPU while maintaining sub-millisecond frame latency.

Key Specifications

Pinout & Package

LQFP64 (10 × 10 mm, 0.5 mm pitch) package with exposed thermal pad; 64-pin layout optimized for compact PCB designs with full I/O remapping and flexible alternate function routing.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar ultra-low-power secure MCU applications.

Compared with STM32U575ZIT6, the STM32U595QII6 adds MIPI DSI, LTDC, GPU2D, and 2× SRAM - essential for rich UIs; versus i.MX RT1187, it trades peak performance for 60× lower shutdown current and certified PSA Level 3 security - critical for medical and industrial edge sensors.

Availability

STM32U595QII6 is available at Aetrix Electronics and suitable for smart wearables, secure industrial sensor hubs, medical point-of-care monitors, and energy-efficient smart home gateways requiring stable component supply and long-term lifecycle assurance.

Supply support for STM32U595QII6 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, MEMS, and automotive semiconductors since 1987.

The STM32U5 series targets ultra-low-power, secure, and graphics-capable edge devices - engineered for PSA Certified Level 3 compliance, ULPMark™ benchmark leadership, and seamless integration with ST's STM32Cube ecosystem and Azure RTOS.

FAQ

What is the maximum operating temperature range for the STM32U595QII6?

The STM32U595QII6 is rated for industrial operation from –40 °C to +85 °C, with extended qualification up to +125 °C for select variants. This rating applies to the LQFP64 package under specified voltage and derating conditions per DS13633 Rev 3 Section 5.3.1. Thermal design must ensure junction temperature remains within limits using the θ_JA value of 42 °C/W for the 64-pin LQFP package.

Does the STM32U595QII6 support hardware-accelerated cryptography beyond HASH and TRNG?

Yes - it includes dedicated CORDIC and FMAC coprocessors for trigonometric and filter math acceleration, plus TrustZone-enforced secure key storage in the HDP area. However, it does not integrate AES/SHA accelerators; those functions are implemented in software using the HASH peripheral and secure memory isolation. Full cryptographic library support is provided via ST's X-CUBE-SBSFU middleware.

Can the MIPI DSI interface drive a 1080p display at 60 Hz?

No - the MIPI DSI host supports two lanes at up to 500 Mbit/s each (1 Gbit/s total), which limits practical resolution to WXGA (1366×768) at 60 Hz with 24-bit color. Driving 1080p (1920×1080) would require ≥1.5 Gbit/s bandwidth. For higher resolutions, external bridge ICs or alternative interfaces like LVDS (via LTDC + external serializer) are recommended per AN5553 application note.

How many wake-up pins are available in Shutdown mode?

The STM32U595QII6 provides 24 dedicated wake-up pins in Shutdown mode, all capable of generating interrupts from the lowest power state. These include all GPIOs except those multiplexed exclusively for analog functions (e.g., VREF+, VREF–) and certain debug pins. Wake-up latency from Shutdown is 1.5 µs typical, as measured from pin assertion to first instruction fetch.