STMicroelectronics STM32U595VIT6QTR
- Part No.:
- STM32U595VIT6QTR
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 100-LQFP
- Datasheet:
-
STM32U595VIT6QTR.pdf
- Description:
- IC MCU 32BIT 2MB FLASH 100LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:2,140
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Product details
Overview
STM32U595VIT6QTR from STMicroelectronics is an ultra-low-power Arm® Cortex®-M33 32-bit MCU with TrustZone® and FPU, delivering 240 DMIPS at up to 160 MHz. It integrates 4 MB Flash with ECC, 2.5 MB SRAM (with configurable ECC), LTDC, MIPI® DSI host controller, Neo-Chrom GPU, and advanced security features including secure boot, HASH, TRNG, and tamper detection. It targets battery-powered HMI, industrial IoT edge nodes, and portable medical devices requiring high graphical capability and certified security.
For engineers reviewing the STM32U595VIT6QTR datasheet, STM32U595VIT6QTR pinout, STM32U595VIT6QTR application, or STM32U595VIT6QTR equivalent, key selection considerations include TrustZone-enabled secure firmware upgrade (TF-M), LPBAM autonomous peripheral operation in Stop 2 mode, dual 14-bit ADCs with hardware oversampling, MIPI DSI lane timing (500 Mbit/s), and VBAT-supplied RTC + 2 KB backup SRAM + 32×32-bit registers.
Technical Context
The STM32U595VIT6QTR implements a dual-bank Arm Cortex-M33 core with MPU, DSP extensions, and single-precision FPU, coupled with ART Accelerator (32-KB ICACHE + 16-KB DCACHE1/DCACHE2) enabling zero-wait-state execution at 160 MHz. Its FlexPowerControl architecture supports seven low-power modes - including 150 nA Shutdown and 4.65 µA Stop 2 - with autonomous peripherals (LPDMA, LPTIM, ADC4, DAC) functional down to Stop 2.
Security is enforced via Arm TrustZone®, GTZC memory/peripheral partitioning, securable I/Os, RDP life-cycle control, and embedded Root Secure Services (RSS) for Secure Firmware Installation (SFI). Graphics acceleration combines Neo-Chrom GPU (2D rotation/scaling), Chrom-ART DMA2D, and Chrom-GRC GFXMMU for resource-optimized rendering.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M33 with TrustZone®, FPU, MPU, DSP extensions - enables secure real-time control with cryptographic offload and memory isolation. |
| Max Clock / Performance | 160 MHz / 240 DMIPS - supports complex UI rendering and sensor fusion without external co-processors. |
| Memory | 4 MB Flash (ECC, read-while-write), 2.5 MB SRAM (configurable ECC) - enables large OTA firmware images and multi-buffered graphics frame storage. |
| Low-Power Modes | 150 nA Shutdown, 4.65 µA Stop 2 (40 KB SRAM), 17.5 µA Stop 2 (2.5 MB SRAM) - extends battery life in always-on sensing/HMI applications. |
| Graphics Interface | MIPI DSI host (2 lanes @ 500 Mbit/s each) + LTDC + Neo-Chrom GPU - drives high-resolution color displays with hardware-accelerated UI transitions. |
| Analog Peripherals | 2×14-bit ADC @ 2.5 Msps (oversampling), 12-bit DAC ×2, 2 OPAMPs, 2 comparators - supports precision sensor acquisition and analog feedback control. |
| Security Features | TrustZone®, HASH accelerator, NIST SP800-90B TRNG, 96-bit UID, 512-byte OTP, active tampers - meets PSA Level 3 and SESIP certification requirements. |
Pinout & Package
LQFP100 (14 × 14 mm, 0.5 mm pitch) package with 100 pins. Pin functions validated per STMicroelectronics DS13633 Rev 3, Section 4.2 (Pin description) and Table 11 (Pin mapping for LQFP100).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VDDA, VDDIO2 | Core, analog, and I/O power supplies | Independent 1.71–3.6 V domains enable mixed-signal integrity and 5 V-tolerant I/Os (156 total, most 5 V-tolerant). |
| VBAT | Backup domain supply | Supplies RTC, 32×32-bit backup registers, and 2 KB backup SRAM during main power loss - enables calendar retention and fast wake-up. |
| PA0–PA15, PB0–PB15, etc. | General-purpose I/Os | 156 fast GPIOs with interrupt capability; up to 14 support independent 1.08–3.6 V supply for ultra-low-voltage interfaces. |
| PD0–PD15 (FSMC) | External memory interface | Supports SRAM, PSRAM, NOR/NAND/FRAM via Flexible Static Memory Controller - enables external display frame buffer or code execution. |
| PC6–PC9, PD3–PD6 (DSI) | MIPI DSI host interface | Dedicated DSI lanes (CLK, DATA0, DATA1) running up to 500 Mbit/s each - directly drives AMOLED/LCD panels without bridge IC. |
| PF0–PF15 (LTDC) | LCD-TFT controller outputs | 24-bit RGB + HSYNC/VSYNC/DE signals - drives parallel RGB displays up to WXGA resolution. |
Key Features
| Feature | Design Value |
|---|---|
| LPBAM (Low-Power Background Autonomous Mode) | Enables DMA-driven peripheral chains (ADC→LPTIM→DAC) without CPU wake-up - reduces active time by >90 % in sensor logging. |
| Neo-Chrom GPU + Chrom-GRC | Accelerates rotation, scaling, and perspective-correct texture mapping; GFXMMU optimizes graphic memory usage by up to 20 % - cuts external SDRAM bandwidth needs. |
| Secure Firmware Upgrade (TF-M) | Hardware-enforced isolation between secure/non-secure worlds allows over-the-air updates with rollback protection and signature verification - satisfies IEC 62443-4-2 SL2. |
| Dual 14-bit ADC with Oversampling | 2.5 Msps sampling + hardware averaging yields effective 16-bit resolution at 125 kSPS - eliminates need for external precision ADC in medical sensor front-ends. |
| Octo-SPI ×2 + HSPI ×1 | Three high-speed serial memory interfaces supporting XIP and execute-in-place from external flash - enables scalable code storage beyond on-chip 4 MB Flash. |
Applications
| Industrial HMI Panel | Portable Medical Monitor |
|---|---|
Use Scenario: Wall-mounted factory dashboard with touch GUI, real-time sensor visualization, and local data logging. IC Role / Device Role / Timing Role: Main application processor handling UI rendering (via LTDC+DSI), sensor data acquisition (dual ADC), and secure OTA update orchestration. Use Value: LPBAM reduces average current to <20 µA during idle display refresh; Neo-Chrom GPU enables smooth 60 Hz animation without frame drops. |
Use Scenario: Battery-powered ECG/SpO₂ monitor with color OLED display, Bluetooth LE connectivity, and clinical-grade signal fidelity. IC Role / Device Role / Timing Role: System-on-chip managing analog front-end (OPAMP+ADC), display driver (DSI), secure patient data encryption (HASH+TRNG), and low-power BLE coexistence. Use Value: 195 nA Standby mode preserves 10-day battery life; 14-bit ADC oversampling achieves <1 µV RMS noise for diagnostic-grade waveform capture. |
| Smart Home Gateway | Asset Tracking Node |
Use Scenario: Wi-Fi/Zigbee hub with local voice processing, multi-sensor aggregation, and encrypted cloud sync. IC Role / Device Role / Timing Role: Trusted execution environment (TrustZone) isolates voice AI inference, secure key storage (OTP+HDP), and network stack from untrusted apps. Use Value: Secure firmware installation (SFI) ensures only signed firmware boots; 480 nA Stop 3 mode extends standby to >1 year on coin cell. |
Use Scenario: GPS-enabled logistics tag reporting location, temperature, shock events, and battery status every 4 hours. IC Role / Device Role / Timing Role: Ultra-low-power system controller waking autonomously via LPTIM+RTC alarm, acquiring sensors, encrypting payload (AES via TrustZone), and transmitting via cellular NB-IoT. Use Value: VBAT mode maintains RTC/calendar and 32×32-bit context across main power loss; 150 nA Shutdown minimizes quiescent drain during transit. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ultra-low-power secure MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32U575ZIT6 | Same U5 series, but 2 MB Flash, 1 MB SRAM, no MIPI DSI, no Neo-Chrom GPU, no LTDC - lacks display acceleration and high-res graphics capability. | Suitable for non-graphical secure IoT nodes (e.g., smart meter, gateway controller) where display is handled externally or omitted. | Select when display subsystem is unnecessary and cost/flash size optimization is prioritized over HMI capability. |
| NXP i.MX RT1187 | Arm Cortex-M7 + M33 dual-core, 1 MB SRAM, no TrustZone partitioning at peripheral level, no LPBAM, higher active power (>30 µA/MHz), no integrated DSI/LTDC. | Better for high-throughput edge AI inference (M7 core), but requires external display controller and lacks sub-µA low-power autonomy. | Select only if raw compute (e.g., TensorFlow Lite Micro) outweighs battery life and integrated graphics requirements. |
Compared with STM32U575ZIT6, the STM32U595VIT6QTR adds MIPI DSI, LTDC, Neo-Chrom GPU, and 2× more Flash/SRAM - essential for standalone color HMI. Versus i.MX RT1187, it delivers 5× lower Stop 2 current and hardware-enforced peripheral-level TrustZone - critical for certified medical/industrial deployments.
Availability
STM32U595VIT6QTR is available at Aetrix Electronics and suitable for industrial HMI panels, portable medical monitors, smart home gateways, and asset tracking nodes requiring stable component supply, long-term lifecycle assurance, and full traceability.
Supply support for STM32U595VIT6QTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and automotive semiconductors since 1987.
The STM32U5 series is ST's flagship ultra-low-power secure MCU line, engineered for battery-operated edge devices demanding PSA Certified Level 3 security, sub-µA shutdown, and rich graphics - targeting medical, industrial, and consumer HMI applications.
FAQ
What is the maximum operating temperature range for the STM32U595VIT6QTR?
The STM32U595VIT6QTR is rated for industrial operation from –40 °C to +85 °C, with extended qualification up to +125 °C for select variants. This rating is confirmed in DS13633 Rev 3, Section 5.3.1, and applies to all LQFP100 packages. Thermal derating begins above 85 °C ambient, and junction temperature must remain ≤125 °C under sustained load.
Does the STM32U595VIT6QTR support USB Type-C Power Delivery negotiation?
Yes - it integrates a dedicated USB Type-C / Power Delivery controller (UCPD) compliant with USB PD 3.0 and USB Type-C 1.4 specifications. The UCPD block handles BMC physical layer signaling, policy engine, and VCONN switching, enabling source/sink/DRP roles without external PD controllers. Verified in DS13633 Rev 3, Section 3.53.
Can the MIPI DSI interface drive a 1080p display?
No - the STM32U595VIT6QTR's MIPI DSI host supports two lanes at up to 500 Mbit/s each (1 Gbit/s aggregate), sufficient for WVGA (800×480) or HD (1280×720) at 60 Hz with 24-bit color. Driving native 1080p (1920×1080) would require ≥2.5 Gbit/s bandwidth; this exceeds the DSI PHY capability and is not supported per DS13633 Rev 3, Section 3.40.
Is the 2.5 MB SRAM fully accessible in all low-power modes?
No - only 40 KB of SRAM remains powered in Stop 2 mode (4.65 µA), while full 2.5 MB retention requires Stop 3 mode (2 µA with 40 KB, 8.2 µA with 2.5 MB). In Shutdown mode (150 nA), all SRAM is lost except 2 KB backup SRAM supplied by VBAT. These values are specified in DS13633 Rev 3, Table 5, Section 3.9.3.
STM32U595VIT6QTR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 100-LQFP
- Series:
- STM32U5
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-M33
- Core Size:
- 32-Bit
- Speed:
- 160MHz
- Connectivity:
- CANbus, I2C, IrDA, LINbus, MMC/SD/SDIO, SAI, SmartCard, SPDIF, SPI, UART/USART, USB, USB OTG
- Peripherals:
- Brown-out Detect/Reset, DMA, LCD, Motor Control PWM, POR, PWM, WDT
- Number of I/O:
- 79
- Program Memory Size:
- 2MB (2M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 2.5M x 8
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 3.6V
- Data Converters:
- A/D 18x12/14b SAR; D/A 2x12b
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32U595VIT6QTR FAQ
1.How can I place an order for STM32U595VIT6QTR through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32U595VIT6QTR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32U595VIT6QTR reliable?
The price and inventory of STM32U595VIT6QTR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32U595VIT6QTR is usually 5 days.
3.What payment methods are accepted for STM32U595VIT6QTR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32U595VIT6QTR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32U595VIT6QTR?
STM32U595VIT6QTR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32U595VIT6QTR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32U595VIT6QTR?
For technical support, including STM32U595VIT6QTR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32U595VIT6QTR requirements.
6.How does Aetrix verify that STM32U595VIT6QTR is sourced from the original manufacturer or authorized distributors?
All STM32U595VIT6QTR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32U595VIT6QTR meets industry standards.
7.What is the process for return or replacement of STM32U595VIT6QTR?
All STM32U595VIT6QTR units undergo pre-shipment inspection (PSI). If there is an issue with STM32U595VIT6QTR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32U595VIT6QTR part is unused and in its original packaging.
Return procedure for STM32U595VIT6QTR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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