STMicroelectronics STM32U595ZJT6Q
- Part No.:
- STM32U595ZJT6Q
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 144-LQFP
- Datasheet:
-
STM32U595ZJT6Q.pdf
- Description:
- IC MCU 32BIT 4MB FLASH 144LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:205
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Product details
Overview
STM32U595ZJT6Q from STMicroelectronics is an ultra-low-power Arm® Cortex®-M33 32-bit microcontroller with TrustZone® security, FPU, and 240 DMIPS performance at up to 160 MHz. It integrates 4 MB Flash with ECC, 2.5 MB SRAM (with configurable ECC), LTDC display controller, MIPI® DSI host, Neo-Chrom GPU2D, and dual 14-bit ADCs operating at 2.5 Msps - deployed in battery-powered industrial HMI and secure edge sensor gateways.
For engineers reviewing the STM32U595ZJT6Q datasheet, STM32U595ZJT6Q pinout, STM32U595ZJT6Q application, or STM32U595ZJT6Q equivalent, key selection criteria include TrustZone-enabled secure boot, LPBAM autonomous peripheral operation down to Stop 2 mode, 150 nA Shutdown current, 160 MHz clock with ART Accelerator, and dual Octo-SPI interfaces for external memory expansion.
Technical Context
The device implements a dual-bank Flash architecture supporting read-while-write and 100 kcycle endurance on 512 KB, with SRAM partitioning enabling ECC-on/off configuration (2514 KB total RAM with ECC off, 2450 KB with ECC on). Its power architecture combines embedded LDO and SMPS step-down converter with dynamic voltage scaling and switch-on-the-fly capability.
TrustZone security is hardware-enforced across memories, peripherals, and I/Os, backed by Root of Trust via unique boot entry and secure hide-protection area (HDP), plus Secure Firmware Installation (SFI) using embedded Root Secure Services (RSS) and TF-M–compatible firmware upgrade support.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M33 with TrustZone, FPU, MPU, DSP extensions - enables secure real-time control with cryptographic acceleration and memory isolation. |
| Max Clock / Performance | 160 MHz / 240 DMIPS - achieved with 32-KB ICACHE enabling zero-wait-state execution from Flash. |
| Memory | 4 MB Flash (ECC, RWW, 512 KB @ 100 kcycles) + 2.5 MB SRAM (configurable ECC) - supports robust firmware storage and large buffer handling for graphics/audio. |
| Low-Power Modes | 150 nA Shutdown (24 wake-up pins), 480 nA Standby with RTC, 2 µA Stop 3 with 40 KB SRAM - extends battery life in always-on edge nodes. |
| Graphics & Display | LTDC + MIPI DSI (2 lanes @ 500 Mbit/s each) + Neo-Chrom GPU2D + Chrom-ART DMA2D - enables smooth 2D UI rendering and high-resolution display driving without CPU load. |
| Analog Peripherals | Dual 14-bit ADCs @ 2.5 Msps (hardware oversampling), 12-bit DAC (2 ch), 2 op-amps with PGA, 2 ultra-low-power comparators - supports precision sensor acquisition and analog signal conditioning in Stop 2 mode. |
| Security Features | TrustZone, 96-bit UID, 512-byte OTP, HASH accelerator, NIST SP800-90B–compliant TRNG, active tampers - meets PSA Level 3 and SESIP certification requirements. |
| Communication | 1 CAN FD, 7 USARTs, 6 I²C (FM+), 3 SPIs + 2 Octo-SPI, 1 USB OTG HS, 1 UCPD, 2 SDMMC - enables multi-protocol connectivity for industrial gateway applications. |
Pinout & Package
LQFP144 (20 × 20 mm, 0.5 mm pitch) package with 156 fast I/Os - most 5V-tolerant, up to 14 I/Os support independent supply down to 1.08 V for mixed-voltage system interfacing.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VDDA, VDDIO2 | Power supply inputs | Separate domains for core (1.71–3.6 V), analog (1.62–3.6 V), and I/O (1.08–3.6 V) enable precise noise isolation and flexible voltage scaling. |
| PA0–PA15, PB0–PB15, etc. | General-purpose I/Os | 156 GPIOs with interrupt capability; up to 14 support independent VDDIO2 supply - critical for interfacing with legacy 1.8 V/2.5 V peripherals. |
| PC13–PC15 | RTC-related functions | PC13 = RTC_OUT, PC14/PC15 = 32.768 kHz crystal oscillator pins - required for calendar-based wake-up and time-stamped logging in VBAT mode. |
| PD0–PD1 | LTDC data bus | 16-bit parallel RGB interface pins - directly drive TFT panels up to WXGA resolution without external frame buffer. |
| PE2–PE7 | MIPI DSI lane signals | DSI_CLK, DSI_D0P/N, DSI_D1P/N - support dual-lane DSI transmission at 500 Mbit/s per lane for compact high-speed display links. |
| PF0–PF15 | Octo-SPI interface | OCTOSPI1_NCS, OCTOSPI1_IO0–IO7 - enable direct connection to octal-SPI NOR/PSRAM for code XIP or extended data storage. |
Key Features
| Feature | Design Value |
|---|---|
| LPBAM (Low-Power Background Autonomous Mode) | Peripherals (ADC, timers, SPI) operate autonomously via GPDMA/LPDMA in Stop 2 mode - eliminates CPU wake-ups for periodic sensing, reducing average current by >40%. |
| Neo-Chrom GPU2D + Chrom-ART Accelerator | Hardware-accelerated rotation, scaling, and alpha-blending - renders complex GUIs at 60 fps on 800×480 displays with <5% CPU utilization. |
| Flexible Power Architecture | SMPS + LDO coexistence with on-the-fly switching - achieves 85% efficiency at 100 mA while maintaining <10 mV ripple for analog subsystems. |
| Secure Boot & Firmware Upgrade | Root of Trust + SFI + TF-M integration - enforces signed image validation, rollback protection, and over-the-air update integrity without external secure element. |
| Dual Independent ADC Subsystems | ADC1/ADC2 (14-bit, 2.5 Msps) + ADC4 (12-bit, 2.5 Msps, Stop 2–capable) - allows simultaneous high-speed sensor sampling and low-power background monitoring. |
| Chrom-GRC (GFXMMU) | GPU memory management unit enabling 20% reduction in framebuffer bandwidth - lowers DDR bandwidth demand and extends battery runtime in graphics-intensive applications. |
Applications
| Industrial HMI Panel | Battery-Powered Sensor Gateway |
|---|---|
Use Scenario: Touch-enabled factory floor display with real-time machine status, alarm history, and local data logging. IC Role / Device Role / Timing Role: Main application processor running FreeRTOS + LVGL GUI stack; LTDC + DSI drive 7-inch WVGA display; LPBAM samples temperature/pressure sensors every 100 ms in Stop 2. Use Value: 18.5 µA/MHz Run mode + 2 µA Stop 3 preserves 10-year coin-cell battery life while sustaining responsive UI and deterministic control loop timing. | Use Scenario: Wireless edge node aggregating Modbus RTU, analog 4–20 mA, and digital I/O from field devices before forwarding via LoRaWAN. IC Role / Device Role / Timing Role: Central MCU managing protocol translation, secure OTA updates, and tamper-detection logic; TrustZone isolates communication stack from sensor firmware. Use Value: 150 nA Shutdown current + 24 wake-up pins allow event-driven wake-up from motion or voltage threshold crossing - extending shelf life and field deployment duration. |
| Secure Medical Wearable | Smart Building Controller |
Use Scenario: ECG/PPG patch with onboard signal processing, encrypted BLE telemetry, and rechargeable battery management. IC Role / Device Role / Timing Role: Dual ADCs acquire synchronized bio-signals; CORDIC/FMAC accelerate QRS detection; HASH + TRNG enable TLS 1.3 handshake with cloud backend. Use Value: NIST SP800-90B–certified TRNG and 512-byte OTP provide cryptographic key generation and storage meeting IEC 62304 Class B requirements. | Use Scenario: DIN-rail mounted HVAC controller with LCD display, relay drivers, environmental sensors, and BACnet/IP stack. IC Role / Device Role / Timing Role: Real-time scheduler manages 100+ PID loops; Neo-Chrom GPU renders animated HVAC schematics; Octo-SPI boots firmware from external PSRAM. Use Value: 4 MB Flash with ECC ensures firmware integrity over 15-year product lifecycle; SMPS efficiency >85% reduces thermal stress in enclosed enclosures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ultra-low-power secure MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32U575ZIT6 | Same Cortex-M33 core and TrustZone, but 2 MB Flash, 1 MB SRAM, no LTDC/DSI, no Neo-Chrom GPU - lacks display acceleration and high-res graphics support. | Suitable for headless secure IoT nodes without local display; lower cost where GUI rendering is handled externally or omitted. | Select when display subsystem and >2.5 MB SRAM are unnecessary - reduces BOM cost by ~18% and simplifies PCB layout. |
| NXP i.MX RT1176AVM8B | Arm Cortex-M7 + M4 dual-core, 1 MB SRAM, no TrustZone hardware isolation (uses software-defined secure world), 100-pin BGA only - higher performance but less mature ultra-low-power profile. | Better for Linux-capable edge AI inference; less suitable for sub-µA battery longevity due to 2.5 µA Stop mode vs. STM32U595's 480 nA Standby with RTC. | Choose for compute-heavy tasks requiring dual-core asymmetry; avoid when certified ultra-low-power operation or PSA Level 3 compliance is mandatory. |
Compared with STM32U575ZIT6, the STM32U595ZJT6Q adds display subsystems and larger memory for rich HMI, while versus i.MX RT1176AVM8B it delivers superior sub-µA power fidelity and hardware-enforced TrustZone - making it optimal for long-life, certified secure, graphics-enabled edge devices.
Availability
STM32U595ZJT6Q is available at Aetrix Electronics and suitable for industrial HMI, battery-powered sensor gateways, secure medical wearables, and smart building controllers requiring stable component supply across multi-year production cycles.
Supply support for STM32U595ZJT6Q includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, MEMS, and automotive semiconductors since 1987.
The STM32U5 series targets ultra-low-power, secure, and graphics-capable embedded applications - engineered for battery-operated edge intelligence, certified industrial control, and privacy-sensitive consumer devices demanding PSA Level 3 and SESIP alignment.
FAQ
What is the maximum operating temperature range for STM32U595ZJT6Q?
The STM32U595ZJT6Q is rated for operation from –40 °C to +125 °C ambient temperature. This extended grade is validated per ST's production test flow and supports deployment in harsh industrial environments such as motor drives, outdoor infrastructure, and automotive under-hood modules where thermal resilience is critical.
Does STM32U595ZJT6Q support external memory interfaces beyond Octo-SPI?
Yes - in addition to two Octo-SPI interfaces, the STM32U595ZJT6Q features a 16-bit HSPI interface (up to 160 MHz), Flexible Static Memory Controller (FSMC) supporting SRAM, PSRAM, NOR, NAND, and FRAM, and dual SDMMC interfaces. These enable boot-from-external-memory configurations and high-bandwidth data streaming for imaging or logging applications.
How does TrustZone implementation differ between STM32U595ZJT6Q and earlier STM32L5 series?
The STM32U595ZJT6Q enhances TrustZone with Global TrustZone Controller (GTZC) extensions including securable I/Os, enhanced peripheral classification, and tighter coupling with PWR/ RCC security states. Unlike STM32L5, it adds secure hide-protection area (HDP), root secure services (RSS), and integrated TF-M support - enabling full PSA Certified Level 3 compliance out-of-box.
Can the Neo-Chrom GPU2D render vector graphics or only bitmap operations?
The Neo-Chrom GPU2D accelerates raster operations only - including bitblt, rotation, scaling, perspective-correct texture mapping, and alpha blending - but does not perform vector path rendering or font rasterization. Vector graphics must be pre-rendered to bitmaps in system RAM or external memory before GPU submission via DMA2D or LTDC frame buffers.
STM32U595ZJT6Q Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 144-LQFP
- Series:
- STM32U5
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-M33
- Core Size:
- 32-Bit
- Speed:
- 160MHz
- Connectivity:
- CANbus, I2C, IrDA, LINbus, MMC/SD/SDIO, SAI, SmartCard, SPDIF, SPI, UART/USART, USB, USB OTG
- Peripherals:
- Brown-out Detect/Reset, DMA, LCD, Motor Control PWM, POR, PWM, WDT
- Number of I/O:
- 106
- Program Memory Size:
- 4MB (4M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 2.5M x 8
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 3.6V
- Data Converters:
- A/D 22x12/14b SAR; D/A 2x12b
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32U595ZJT6Q FAQ
1.How can I place an order for STM32U595ZJT6Q through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32U595ZJT6Q on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32U595ZJT6Q reliable?
The price and inventory of STM32U595ZJT6Q are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32U595ZJT6Q is usually 5 days.
3.What payment methods are accepted for STM32U595ZJT6Q?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32U595ZJT6Q transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32U595ZJT6Q?
STM32U595ZJT6Q orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32U595ZJT6Q order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32U595ZJT6Q?
For technical support, including STM32U595ZJT6Q datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32U595ZJT6Q requirements.
6.How does Aetrix verify that STM32U595ZJT6Q is sourced from the original manufacturer or authorized distributors?
All STM32U595ZJT6Q products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32U595ZJT6Q meets industry standards.
7.What is the process for return or replacement of STM32U595ZJT6Q?
All STM32U595ZJT6Q units undergo pre-shipment inspection (PSI). If there is an issue with STM32U595ZJT6Q, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32U595ZJT6Q part is unused and in its original packaging.
Return procedure for STM32U595ZJT6Q:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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